TEMIC U5020M-MFP

U5020M
Digital Window Watchdog Timer
Description
The digital window watchdog timer, U5020M, is a CMOS
integrated circuit. In application where safety is critical,
it is especially important to monitor the microcontroller.
Normal microcontroller operation is indicated by a cyclically transmitted trigger signal, which is received by a
window watchdog timer within a defined time window. A
missing or a wrong trigger signal makes the watchdog
timer reset the microcontroller. The IC is tailored for
microcontrollers which can work in both full-power and
sleep mode. With an additional voltage monitoring
(power-on reset and supply voltage drop reset) U5020M
offers a complete monitoring solution for microsystems
in automotive and industrial applications.
Features
D Low current consumption: IDD < 100 mA
D RC–oscillator
D Internal reset during power-up and supply voltage
drops (POR)
D Trigger input
D Six wake-up inputs
D Reset output
D Enable output
D “Short” trigger window for active mode
“long” trigger window for sleep mode
D Cyclical wake-up of microcontroller in sleep mode
Ordering Information
Extended Type Number
U5020M–FP
Package
SO16
Remarks
Block Diagram
C
VDD
R1
10 nF
VDD
OSC
15
C1
RC
Oscillator
OSC
Reset 10
mC
95 10387
13
Input ts 16
State machine
OSC
Trigger 11
Mode 12
Wake up 3–8
Input signal
conditioning
POR
9
Enable
Power–on
reset
14
GND
POR
External
switching
circuitry
Test logic
2
Test
1
Test
Figure 1. Block diagram with external circuit
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
1 (8)
Preliminary Information
U5020M
Pin Description
Pin
1
2
3 to 8
TM
1
16 ts
TM
2
15 Osc
Wake-up 3
14 GND
Wake-up
13 VDD
4
Wake-up 5
12 Mode
Wake-up 6
11 Trig
Wake-up 7
10 Reset
Wake-up 8
9
Symbol
Function
TM
Test must not be connected
TM
Test must be connected to GND
Wake-up Wake-up inputs (pull-down
resistor)
There are six digitally debounced
wake-up inputs. During the long
trigger mode each signal slope at
the inputs initiates a reset pulse at
Pin 10.
Ena
Enable output (push-pull)
It is used for the control of peripheral components. It is activated
after the processor triggers three
times correctly.
Reset
Reset output (open drain)
Resets the processor in the case of
a trigger error or if a wake-up
pulse occurs during the long
watchdog period.
Trig
Trigger input (pull-up resistor)
It is connected to the microprocessor’s trigger signal.
Mode Mode input (pull-up resistor)
The processor’s mode signal initiates the switchover between the
long and the short watchdog time.
VDD
Supply voltage
GND
Ground, reference voltage
Osc
RC oscillator
ts
Time switch input
Programming pin to select different time durations for the long
watchdog time.
9
10
11
12
Ena
95 10635
13
14
15
16
Figure 2. Pin connections
Functional Description
Supply, Pin 13
1t
where t 1.35 1.57 R
f
The U5020M requires a stabilized supply voltage
5% to comply with its electrical
VDD = 5 V
characteristic.
An external buffer capacitor of C = 10 nF may be
connected between Pin 13 and GND.
RC-Oscillator, Pin 15
The clock frequency, f, can be adjusted with the
components R1 and C1 according to the formula:
1
(C 1
0.01)
R 1 in kW, C 1 in nF and t in ms
The clock frequency determines all time periods of the
logic part as shown in the last section of the data sheet
(timing). With an appropriate selection of components,
the clock frequency, f, is nearly independent of the supply
voltage as shown in figure 3. Frequency tolerance
1%, C1 = 5%.
Dfmax = 10% with R1
2 (8)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
U5020M
1000.00
100.00
t (ms)
4.5 V
10.00
5.0 V
5.5 V
C1 = 500 pF
1.00
1
10
100
R1 (kW)
1000
95 10636
Figure 3. Period t vs. R1, @ C1 = 500 pF
Pin 13
V DD
to
t6
Pin 10
Reset Out
t1
Pin 12
Mode
95 10637
Figure 4. Power-up reset and mode switchover
Supply Voltage Monitoring, Pin 10
The integrated power-on reset (POR) circuitry sets the
internal logic to a defined basic status and generates a
reset pulse at the reset output, Pin 10, during ramp-up of
the supply voltage and in the case of voltage drops of the
supply. A hysteresis in the POR threshold prevents the
circuit from oscillating. During ramp–up of the supply
voltage the reset output stays active for time, to, in order
to bring the microcontroller in its defined reset status (see
figure 4). Pin 10 has an open-drain output.
Switch-over Mode Time, Pin 12
The switch-over mode time enables the synchronous
operation of micro and watchdog. After the power-up
reset time the watchdog has to be switched to its
monitoring mode by the micro with a “low” signal
transmitted to the mode pin (Pin 12) within the time out
period, t1,. If the low signal does not occur within time,
t1, (see figure 4) the watchdog generates a reset pulse, t6,
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
and the time, t1, starts again. Micro and watchdog are
synchronized with the switchover mode time, t1, each
time a reset pulse is generated.
Microcontroller in Active Mode
Monitoring with the “Short” Trigger
Window
After the switch-over mode the watchdog works in the
short watchdog mode and expects a trigger pulse from the
microcontroller within the defined time window, t3,
(enable time). The watchdog generates a reset pulse
which resets the microcontroller if
D the trigger pulse duration is too long,
D the trigger pulse is within the disable time, t2
D there is no trigger pulse
Figure 5 shows the pulse diagram with a missing trigger
pulse.
3 (8)
Preliminary Information
U5020M
V
DD
Pin 13
to
t1
Pin 10
Reset Out
t3
t2
Pin 12
Mode
Pin 11
Trigger
95 10638
Figure 5. Pulse diagram with no trigger pulse during the short watchdog time
Figure 6 shows a correct trigger sequence. The positive
edge of the trigger signal starts a new monitoring cycle
with the disable time, t2. To ensure a correct operation of
the microcontroller the watchdog needs to be triggered
three times correctly before it sets its enable output. This
feature is used to activate or deactivate safety critical
components, which have to be switched to a certain
condition (emergency status) in the case of a microcontroller malfunction. As soon as there is an incorrect
trigger sequence the enable signal is reset and it takes
again a three correct trigger sequence before enable is reset.
Microcontroller in Sleep Mode
Monitoring with the “Long” Trigger
Window
The long watchdog mode allows cyclical wake up of the
micro during the sleep mode. Like in the short watchdog
mode there is a disable time, t4, and an enable time, t5, in
which a trigger signal is accepted. The watchdog can be
switched from the short trigger window to the long trigger
window with a “high” potential at the mode pin (Pin 12).
In contrast to the short watchdog mode the time periods
are now much longer and the enable output remains
inactive that other components can be switched off to
effect a further decrease in current consumption. As soon
as a wake-up signal at one of the 6 wake up inputs (Pins
3 to 8) is detected, the long watchdog mode ends, a reset
pulse wakes-up the sleeping microcontroller and the
normal monitoring cycle starts with the mode switch-over
time.
With the help of a low or high potential at Pin 16 (time
switch) the long watchdog time can be selected in two
values.
Pin 13
VDD
t0
t1
Pin 10
Reset Out
t3
t2
t2
Mode
Pin 12
Pin 11
Trigger
t trig
Pin 9
Enable
95 10639
Figure 6. Pulse diagram of a correct trigger sequence during the short watchdog time
4 (8)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
U5020M
Figure 7 shows the switch-over from the short to the long
watchdog mode. The wake up signal during the enable
time, t5, activates a reset pulse, t6.
The watchdog can be switched back from the long to the
short watchdog mode with a low potential at the mode pin
(Pin 12).
t6
t1
Pin 10
Reset out
Wake-up
Pins 3 to 8
t4
t5
Pin 12
Mode
t2
Pin 11
Trigger
Pin 9
Enable
95 10640
Figure 7. Pulse diagram of the long watchdog time
Application Hint
In order to prevent the IC from an undesired reset output signal which may be caused by transcients on the supply under
certain conditions a pc board connection from Pin 2 to GND is strongly recommended.
Absolute Maximum Ratings
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Parameters
Supply voltage
Output current
Input voltage
Ambient temperature range
Storage temperature range
Symbol
VDD
IOUT
Value
6.5
VIN
Tamb
Tstg
–0.5 V to VDD + 0.5 V
–40 to +85
–55 to +150
2
Unit
V
mA
V
°C
°C
Thermal Resistance
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Junction ambient
Parameters
SO16
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
Symbol
RthJA
Value
160
Unit
K/W
5 (8)
Preliminary Information
U5020M
Electrical Characteristics
VDD = 5 V; Tamb = 25 °C; reference point is ground (Pin14); figure 4, unless otherwise specified
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Parameters
Supply voltage
Current consumption
Test Conditions / Pins
Pin 13
R1 = 66 k
Pin 13
Power-on reset
Power-on reset
Power-on reset
Inputs
Upper threshold (“1”)
Lower threshold (“0”)
Input voltage range
Input current
Logic functions
Pin 13
VDD
Threshold
Pin 13
VPOR
Hysteresis
Pin 13
Vhys
Pins 3 to 8, 11, 12 and 16
VIH
VIL
VIN
Depending on pin
I IN
Output Pin 9
Max. output current
Upper output voltage (“1”)
Lower output voltage (“0”)
Output Pin 10
Max. output current
Lower output voltage (“0”)
Timing
Debounce period
Debounce period
Max. trigger pulse period
Power-up reset time
Time out period
Short disable time
Short enable time
Long disable time
Long enable time
Long disable time
Long enable time
Reset out time
Symbol
VDD
IDD
Min.
4.5
4.0
1.0
–0.4
–20
2
4.5
2
IOUT = –1mA
IOUT
VOL
VDD + 0.2
20
3
96
Unit
V
A
V
V
mV
3.8
100
IOUT
VOH
VOL
Input switch = low (0)
Pin 16
Input switch = low (0)
Pin 16
Input switch = high (1)
Pin 16
Input switch = high (1)
Pin 16
Max.
5.5
100
1
IOUT = 1mA
IOUT = –1mA
Trig, Mode, Pins 11 and 12
Wake-up 1–6, Pins 3 to 8
Typ.
V
V
V
A
0.5
mA
V
V
0.5
mA
V
to
t1
t2
t3
t4
45
201
1112
130
124
71970
cyc
cyc
cyc
cyc
cyc
cyc
cyc
cyc
t5
30002
cyc
t4
1200
cyc
t5
400
cyc
t6
40
cyc
6 (8)
Preliminary Information
4
128
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
U5020M
Package Information
Package SO16
Dimensions in mm
5.2
4.8
10.0
9.85
3.7
1.4
0.25
0.10
0.4
1.27
6.15
5.85
8.89
16
0.2
3.8
9
technical drawings
according to DIN
specifications
1
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
13036
8
7 (8)
Preliminary Information
U5020M
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems
with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances ( ODSs).
The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban
on these substances.
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of
continuous improvements to eliminate the use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency ( EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively.
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain
such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
8 (8)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97