Features • • • • • • • • • Low Current Consumption: IDD < 100 µA RC Oscillator Internal Reset During Power-up and Supply Voltage Drops (POR) “Short” Trigger Window for Active Mode “Long” Trigger Window for Sleep Mode Cyclical Wake-up of the Microcontroller in Sleep Mode Trigger Input Six Wake-up Inputs Reset Output Enable Output Description The digital window watchdog timer, U5020M, is a CMOS integrated circuit. In applications where safety is critical, it is especially important to monitor the microcontroller. Normal microcontroller operation is indicated by a cyclically transmitted trigger signal, which is received by a window watchdog timer within a defined time window. A missing or a wrong trigger signal causes the watchdog timer to reset the microcontroller. The IC is tailored for microcontrollers which can work in both full-power and sleep mode. With an additional voltage monitoring (power-on reset and supply voltage drop reset), the U5020M offers a complete monitoring solution for microsystems in automotive and industrial applications. Digital Window Watchdog Timer U5020M Rev. 4755A–AUTO–11/03 Figure 1. Block Diagram with External Ciruit C 10 nF VDD R1 13 VDD OSC 15 Reset 10 Input ts 16 C1 Microcontroller RC Oscillator OSC State machine OSC Trigger 11 9 Input signal conditioning POR Mode 12 Enable Power-on reset POR 14 Wake up 3-8 Test logic 2 GND External switching circuitry 1 Test Test Pin Configuration Figure 2. Pinning SO16 2 TM 1 16 TS TM 2 15 OSC WAKE-UP 3 14 GND WAKE-UP 4 13 VDD WAKE-UP 5 12 MODE WAKE-UP 6 11 TRIG WAKE-UP 7 10 RESET WAKE-UP 8 9 ENA U5020M 4755A–AUTO–11/03 U5020M Pin Description Pin Symbol Function 1 TM Test must not be connected 2 TM Test must be connected to GND 3 to 8 WAKE-UP Wake-up inputs (pull-down resistor) There are six digitally debounced wake-up inputs. During the long trigger mode each signal slope at the inputs initiates a reset pulse at pin 10. 9 ENA Enable output (push-pull) It is used for the control of peripheral components. It is activated after the processor triggers three times correctly. 10 RESET Reset output (open drain) Resets the processor in the case of a trigger error or if a wake-up pulse occurs during the long watchdog period. 11 TRIG 12 MODE 13 VDD Supply voltage 14 GND Ground, reference voltage 15 OSC RC oscillator 16 TS Trigger input (pull-up resistor) It is connected to the microprocessor’s trigger signal. Mode input (pull-up resistor) The processor’s mode signal initiates the switchover between the long and the short watchdog time. Time switch input Programming pin to select different time durations for the long watchdog time. Functional Description Supply, Pin 13 The U5020M requires a stabilized supply voltage VDD = 5 V ±5% to comply with its electrical characteristics. An external buffer capacitor of C = 10 nF may be connected between pin 13 and GND. RC Oscillator, Pin 15 The clock frequency, f, can be adjusted by the components R1 and C1 according to the formula: 1 f = --t where t = 1.35 + 1.57 R1 (C1 + 0.01) R1 in kW, C1 in nF and t in µs The clock frequency determines all time periods of the logic part as shown in the table “Electrical Characteristics” under the subheading “Timing” on page 8. With an appropriate component selection, the clock frequency, f, is nearly independent of the supply voltage as shown in Figure 3 on page 4. Frequency tolerance Dfmax = 10% with R1 ±1%, C1 = ±5% 3 4755A–AUTO–11/03 Figure 3. Period t versus R1, at C1 = 500 pF 1000.00 100.00 t (µs) 4.5 V 10.00 5.0 V 5.5 V C1 = 500 pF 1.00 1 10 100 1000 R1 (kΩ) Figure 4. Power-up Reset and Mode Switchover Pin 13 VDD t0 t6 Pin 10 Reset out t1 Mode Pin 12 Supply Voltage Monitoring, Pin 10 The integrated power-on reset (POR) circuitry sets the internal logic to a defined basic status and generates a reset pulse at the reset output, pin 10, during ramp-up of the supply voltage and in the case of voltage drops of the supply. A hysteresis in the POR threshold prevents the circuit from oscillating. During ramp-up of the supply voltage, the reset output stays active for a specified period of time (t0) in order to bring the microcontroller in its defined reset status (see Figure 4). Pin 10 has an open-drain output. Switch-over Mode Time, Pin 12 The switch-over mode time enables the synchronous operation of microcontroller and watchdog. When the power-up reset time has elapsed, the watchdog has to be switched to monitoring mode by the microcontroller by a “low” signal transmitted to the mode pin (pin 12) within the time-out period, t1. If the low signal does not occur within t1, (see Figure 4) the watchdog generates a reset pulse, t 6 , and the time, t 1 , starts again. Microcontroller and watchdog are synchronized with the switchover mode time, t1, each time a reset pulse is generated. 4 U5020M 4755A–AUTO–11/03 U5020M Microcontroller in Active Mode Monitoring with the “Short” Trigger Window After the switch-over mode the watchdog operates in short watchdog mode and expects a trigger pulse from the microcontroller within the defined time window, t3, (enable time). The watchdog generates a reset pulse which resets the microcontroller if • the trigger pulse duration is too long • the trigger pulse is within the disable time, t2 • there is no trigger pulse Figure 5 shows the pulse diagram with a missing trigger pulse. Figure 5. Pulse Diagram with no Trigger Pulse During the Short Watchdog Time VDD Pin 13 t0 t1 Pin 10 Reset out t2 t3 Pin 12 Mode Pin 11 Trigger Figure 6 on page 6 shows a correct trigger sequence. The positive edge of the trigger signal starts a new monitoring cycle with the disable time, t2. To ensure correct operation of the microcontroller, the watchdog needs to be triggered three times correctly before it sets its enable output. This feature is used to activate or deactivate safety-critical components which have to be switched to a certain condition (emergency status) in the case of a microcontroller malfunction. As soon as there is an incorrect trigger sequence, the enable signal is reset and it takes a sequence of three correct triggers before enable is reset. Microcontroller in Sleep Mode Monitoring with the “Long” Trigger Window The long watchdog mode allows cyclical wake-up of the microcontroller during sleep mode. As in short watchdog mode, there is a disable time, t4, and an enable time, t5, in which a trigger signal is accepted. The watchdog can be switched from the short trigger window to the long trigger window with a “high” potential at the mode pin (pin 12). In contrast to the short watchdog mode, the time periods are now much longer and the enable output remains inactive so that other components can be switched off to effect a further decrease in current consumption. As soon as a wake-up signal at one of the 6 wake up inputs (pins 3 to 8) is detected, the long watchdog mode ends, a reset pulse wakes-up the sleeping microcontroller and the normal monitoring cycle starts with the mode switch-over time. By means of a low or high potential at pin 16 (time switch), two values for the long watchdog time can be selected. 5 4755A–AUTO–11/03 Figure 6. Pulse Diagram of a Correct Trigger Sequence During the Short Watchdog Time Pin 13 VDD t0 t1 Pin 10 Reset out t2 t3 t2 Mode Pin 12 Pin 11 Trigger ttrig Pin 9 Enable Figure 7 shows the switch-over from the short to the long watchdog mode. The wake-up signal during the enable time, t5, activates a reset pulse, t6. The watchdog can be switched back from the long to the short watchdog mode with a low potential at the mode pin (pin 12). Figure 7. Pulse Diagram of the Long Watchdog Time t6 t1 Pin 10 Reset out Wake-up Pins 3 to 8 t4 t5 Pin 12 Mode t2 Trigger Enable 6 Pin 11 Pin 9 U5020M 4755A–AUTO–11/03 U5020M Application Hint In order to prevent the IC from an undesired reset output signal which may be caused by transcients on the supply under certain conditions, a PC board connection from pin 2 to GND is strongly recommended. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Value Unit Supply voltage VDD 6.5 V Output current IOUT ±2 mA Input voltage VIN -0.5 V to VDD + 0.5 V V Ambient temperature range Tamb -40 to +85 °C Storage temperature range Tstg -55 to +150 °C Symbol Value Unit RthJA 160 K/W Thermal Resistance Parameters Junction ambient SO16 7 4755A–AUTO–11/03 Electrical Characteristics VDD = 5 V; Tamb = -40°C to +85°C; reference point is ground (pin14); Figure 4 on page 4, unless otherwise specified Parameters Test Conditions Pin Symbol Min. 13 VDD 4.5 Current consumption R1 = 66 kW 13 IDD Power-on reset Logic functions 13 VDD Power-on reset Threshold 13 VPOR 3.8 V Power-on reset Hysteresis 13 Vhys 100 mV Supply voltage Typ. Max. Unit 5.5 V 100 µA 1 V 3 to 8, 11, 12, 16 Inputs Upper threshold (“1”) VIH Lower threshold (“0”) VIL Input voltage range VIN I IN Input current Depending on pin 4.0 V 1.0 V -0.4 VDD + 0.2 V -20 20 µA Output Pin 9 IOUT 2 mA Upper output voltage (“1”) Maximum output current IOUT = 1 mA VOH 4.5 V Lower output voltage (“0”) IOUT = -1 mA VOL 0.5 V Output Pin 10 Maximum output current Lower output voltage (“0”) IOUT IOUT = -1 mA 2 mA VOL 0.5 V 4 cycle Timing Debounce period Trig, Mode 11, 12 3 Debounce period Wake-up 1-6 3 to 8 96 Maximum trigger pulse period 128 cycle 45 cycle Power-up reset time to 201 cycle Time-out period t1 1,112 cycle Short disable time t2 130 cycle Short enable time t3 124 cycle Long disable time Input switch = low (0) 16 t4 71,970 cycle Long enable time Input switch = low (0) 16 t5 30,002 cycle Long disable time Input switch = high (1) 16 t4 1,200 cycle Long enable time Input switch = high (1) 16 t5 400 cycle t6 40 cycle Reset-out time 8 U5020M 4755A–AUTO–11/03 U5020M Ordering Information Extended Type Number Package U5020M-FP Remarks SO16 – Package Information Package SO16 Dimensions in mm 5.2 4.8 10.0 9.85 3.7 1.4 0.25 0.10 0.4 1.27 6.15 5.85 8.89 16 0.2 3.8 9 technical drawings according to DIN specifications 1 8 9 4755A–AUTO–11/03 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. 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