FAN6103 Power Supply Supervisor Plus PWM Features Description PC Half-Bridge Power Supply Supervisor Plus PWM High Integration, Few External Components FAN6103 controller is designed for switching mode power supply for desktop PCs. It provides all the functions necessary to monitor and control the output of the power supply. Remote ON/OFF control, power good circuitry, and protection features against over-voltage and over-power are implemented. It directly senses all the output rails for OVP without the need of external dividers. An innovated AC-signal sampling circuitry provides a sufficient power-down warning signal for PG. Over-Voltage Protection for 3.3V, 5V, and 12V Under-Voltage Protection for 3.3V, 5V, and 12V Under-Voltage protection for –12V and/or –5V Over-Power and Short-Circuit Protection A built-in timer generates accuracy timing for control circuit, including the PS-off delay. The cycle-by-cycle PWM switching prevents the power transformer from saturation and ensures the fastest response for the short-circuit protection, which greatly reduces the stress for power transistors. Power-Down Warning Circuitry Power-Good Circuitry Delay Time for PSON and PG Signal Remote ON/OFF Function On-Chip Oscillator and Error Amplifier Latching PWM for Cycle-By-Cycle Switching Push-Pull PWM Operation and Totem-Pole Outputs Soft-Start and Maximum 93% Duty Cycle Utilizing minimum external components, the FAN6103 includes all of the functions for push-pull and/or halfbridge topology, decreasing the production cost and PCB space, while increasing the mean time between failures for power supply Applications Desktop PC Power Supply Ordering Information Part Number FAN6103NZ Operating Temperature Range -40°C to +105°C Eco Status RoHS Packing Method Package 16-Pin Dual Inline Package (DIP) Tube For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com FAN6103 — Power Supply Supervisor Plus PWM October 2009 -1 2V 12V 5V 3 .3 V 3 .3 V C o n tro lle r V33 V5 V12 U VAC VC C OP1 PG PSON V DD FAN6103 — Power Supply Supervisor Plus PWM Application Diagram 5V sb Pok PSon NVP -1 2V RI -5 V GN D OP2 IN C OM P OPP SS FA N 6 1 0 3 Figure 1. Typical Application © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 2 V 33 V5 V 12 UVAC RI PG GN D VCC 2 3 7 5 15 10 11 16 V REF 2µA 0.7V D SD D e la y 3 0 0m s UV D e te cto r OV P ro te cto r D e la y 3ms D SET CL R UV P ro te cto r S SET Q Q 3.2V R VCC 5V D 64µA NVP 6 2.1V D e la y 7m s B u ffe r 4 Q O .S . C Q 2.5V D e la y 7m s B u ffe r D e la y 1 5m se c V CC 1.4V P S ON CL R 8µA 2.4V OP P SET CL R 1 On/Off D elay 50 / 16ms 9 OP 1 8 OP 2 Q Q FAN6103 — Power Supply Supervisor Plus PWM Block Diagram D e la y 2m s 14 13 12 SS IN C OM P Figure 2. Function Block Diagram Marking Information F – Fairchild Logo Z – Plant Code X – 1-Digit Year Code Y – 1-Digit Week Code TT – 2 -Digit Die Run Code T – Package Type (N:DIP) P – Z: Pb Free M – Manufacture Flow Code Figure 3. Top Mark © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 3 FAN6103 — Power Supply Supervisor Plus PWM Pin Configuration Figure 4. Pin Configuration Pin Definitions Pin # Name Description 1 PSON Remote on/off logic input. Turn on/off the PWM output after the 16ms / 50ms delay. PSON = 0 means that the main SMPS is operational. PSON = 1 means that the main SMPS is off and the latch is reset. 2 V33 3.3V over-voltage/under-voltage control sense input. 3 V5 5V over-voltage/under-voltage control sense input. 4 OPP 5 UVAC 6 NVP The protection input for negative output, such as –12V and/or –5V; trip voltage = 2.1V. 7 V12 12V over-voltage/under-voltage control sense input. 8 OP2 The totem-pole output drivers of push-pull PWM. The output are enabled (LOW) only when the NAND gate inputs are HIGH; the maximum duty cycle on output OP2 is 46%. 9 OP1 The totem-pole output drivers of push-pull PWM. The output are enabled (LOW) only when the NAND gate inputs are HIGH the maximum duty cycle on output OP1 is 46%. 10 PG Power-good logic output, 0 or 1 (open-collector). PG = 1 means that the power is ready for operation. The PG delay is 300ms. 11 GND 12 COMP 13 IN The negative input of error amplifier. The positive input of error amplifier is a 2.5V reference voltage. 14 SS The soft-start, it is settable through an external capacitor. The current source output at this pin is 8µA and the voltage is clamped at 2.5V. 15 RI Reference Resistor. Connected to external resistor for the reference setting. 16 VCC Over-power sense input. This pin is connected to driver transformer or the output of current transformer. When not in use, this pin should be grounded. AC-fail detection. Detect main AC voltage under-voltage or failure. Ground. Error amplifier output and the input of the PWM comparator. Supply voltage; 4.5V ~ 5.5V, connected to 5V standby. © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 4 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC Parameter Min. DC Supply Voltage Max. Unit 16 V VH Supply Voltage on PSON, V33, V5, V12, OP1, OP2 Pins -0.3 16.0 V VL Supply Voltage on OPP, UVAC, RI, SS , NVP, IN, COMP, PG Pins -0.3 7.0 V 30 mA IOUT Output Current at PG PD Power Dissipation TA < 50°C 1500 mW ΘJA Thermal Resistance (Junction-to-Air) 82.5 °C/W TJ TSTG TL ESD Operating Junction Temperature -40 +125 °C Storage Temperature Range -55 +150 °C +260 °C Lead Temperature (Soldering) Electrostatic Discharge Capability Human Body Model, JESD22-A114 3000 Charged Device Model, JESD22-C101 1250 V FAN6103 — Power Supply Supervisor Plus PWM Absolute Maximum Ratings Notes: 1. All voltage values, except differential voltage, are given with respect to GND pin. 2. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 Min. Max. Unit -40 +105 °C www.fairchildsemi.com 5 VCC = 5V, TA = 25°C, and RI = 75kΩ unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Units 5.5 V 10 mA 5 10 mA 4.1 4.3 V VCC Section VCC DC Supply Voltage ICC1 Total Supply Current ICC2 Total Supply Current 4.5 PSON = LOW, OP1/OP2 = 1000pF PSON = HIGH, OP1/OP2 = 1000pF Protection Section 3.3V VOVP VUVP Over-Voltage Protection Under-Voltage Protection 3.9 5.0V 5.8 6.1 6.5 V 12.0V 13.9 14.5 14.9 V 3.3V 2.0 2.6 2.8 V 5.0V 3.0 3.6 3.9 V 120V 6.0 7.2 8.0 V 3.3V 2.5 2.8 3.0 V 5.0V 4.0 4.3 4.5 V 12.0V 9.4 10.1 10.4 V 2.25 2.32 2.39 V VUVS Under-Voltage Sense for PG Low VOPP Over-Power Protection (3) (with TOPP Delay Time) VOPPH Over-Power Protection (without Delay Time) 3.0 3.2 3.4 V Disable Under-Voltage / OverPower Protection Threshold 0.2 0.3 0.4 V VNVP Negative Voltage Protection Voltage Level 2.0 2.1 2.2 V INVP Negative Voltage Protection Source Current 63 67 71 µA TOVP Timing for Over-Voltage Protection 0.37 0.70 1.35 ms TUVP Timing for Under-Voltage Protection 0.80 2.40 3.75 ms TUVS Timing for Under-Voltage Sense for PG Low 0.37 1.20 1.88 ms TOPP Timing for Over-Power Protection 5 7 9 ms TNVP Timing for Negative Voltage Protection 3.3 7.0 10.2 ms 0.8 V VX VUVAC = 1.5V FAN6103 — Power Supply Supervisor Plus PWM Electrical Characteristics PWM Output Section VOL Output Voltage Low VOH Output Voltage High RO Output Impedance of VOH 4 1.5 V 3.3 kΩ Note: 3. VOPPS = (2/3) • VOPP + (1/3) • VUVAC. Continued on following page… © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 6 VCC = 5V, TA = 25°C, and RI = 75kΩ unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Units 200 300 400 ms 0.68 0.70 0.72 V 1 3 µs 300 500 ns 0.5 V 1 µA Power-Good Section tPG Timing for PG Delay RI = 75kΩ VUVAC UVAC Voltage Sense for PG tR PG Good Output Rising Time CL = 100pF, Pull 2.25V to 5.00V tF PG Good Falling Time CL = 100pF, Pull to 5.00V to 2.25V VOL2 PG Output Saturation Level IPG = 10mA ION2 PG Leakage Current Collector VPG = 5V Remote ON/OFF Section VIH High-Level Input Voltage VIL Low-Level Input Voltage VHYSTERESIS IPSON tPSON(ON) tPSON(OFF) tPSOFF 2 PSON Input Hysteresis Voltage V V 0.5 mA 0.3 V Remote Input Driving Current Timing PSON to ON 0.8 RI = 75kΩ 38 50 62 ms Timing PSON to OFF RI = 75kΩ 8 16 24 ms Timing PG LOW to Power OFF RI = 75kΩ 1.5 2.0 6.3 ms TA = 25°C 2.46 2.50 2.54 V 0.1 µA FAN6103 — Power Supply Supervisor Plus PWM Electrical Characteristics (Continued) Error Amplifier Section VREF IIB Reference Voltage Input Bias Current AVOL Open-Loop Voltage Gain 50 60 dB BW Unity Gain Bandwidth 0.3 1.0 MHz Power Supply Rejection Ratio 50 PSRR dB Oscillator Section fOSC PWM Frequency DCMAX Max Duty Cycle RI = 75kΩ 62 65 85 68 kHz 93 % 9 µA Soft-Start Section ISS Charge Current © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 7 8 www.fairchildsemi.com 7 2.60 4.5 4.4 VREF (V) ICC1 (mA) 2.55 4.3 4.2 2.50 4.1 2.45 4.0 3.9 2.40 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 Temperature (°C) 50 65 80 95 110 125 Figure 6. Reference Voltage vs. Temperature 6.75 66.0 6.71 65.0 FOSC (kHz) VOH (V) 35 Temperature (°C) Figure 5. Operating Supply Current vs. Temperature 6.67 6.63 6.59 64.0 63.0 62.0 6.55 61.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 Temperature (°C) 20 35 50 65 80 95 110 125 Temperature (°C) Figure 7. PWM Output Voltage vs. Temperature Figure 8. Frequency vs. Temperature 7.95 90.0 7.93 ISS (µA) 89.5 DCMAX (%) 20 FAN6103 — Power Supply Supervisor Plus PWM Typical Performance Characteristics 89.0 88.5 7.91 7.89 7.87 88.0 7.85 -40 -25 -10 5 20 35 50 65 80 95 -40 110 125 -25 Figure 9. Maximum Duty Cycle vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) Temperature (°C) Figure 10. Charge Current vs. Temperature www.fairchildsemi.com 8 4.20 2.63 4.15 2.59 VOVP (V) VUVP (V) 2.61 2.57 4.10 4.05 2.55 2.53 4.00 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 Temperature (°C) 50 65 80 95 110 125 Figure 12. 3.3V VOVP vs. Temperature 3.63 6.25 3.61 6.20 3.59 6.15 VOVP (V) VUVP (V) 35 Temperature (°C) Figure 11. 3.3V VUVP vs. Temperature 3.57 6.10 6.05 3.55 6.00 3.53 -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 95 110 125 5 20 35 50 65 80 95 110 125 Temperature (°C) Temperature (°C) Figure 13. 5V VUVP vs. Temperature Figure 14. 5V VOVP vs. Temperature 7.20 14.65 7.15 14.60 7.10 14.55 VOVP (V) VUVP (V) 20 FAN6103 — Power Supply Supervisor Plus PWM Typical Performance Characteristics (Continued) 7.05 7.00 14.50 14.45 6.95 14.40 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 Temperature (°C) 20 35 50 65 80 95 110 125 Temperature (°C) Figure 15. 12V VUVP vs. Temperature © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 5 Figure 16. 12V VOVP vs. Temperature www.fairchildsemi.com 9 FAN6103 is suitable for half-bridge, push-pull topology and incorporates with a three-channel supervisor. The PWM section comprises a built-in 65KHz oscillator and high-immunity circuits, which protect the system from noise interference and provide more noise margins. FAN6103 has OVP and UVP for 12V, 5V, and 3.3V. NVP is used for negative voltage protection, such as 12V and/or -5V. The UVAC is applied to detect AC line condition. -5 V 5V 6 4µA -1 2 V R2 R1 2 .1 V Figure 18. NVP Protection Circuit Over-Power Protection (OPP) AC-Fail Detection FAN6103 provides over-power protection to detect over-power or short-circuit conditions. When it detects the voltage level over 2.4V, the supervisor triggers PG to LOW and pulls the SS pin LOW to switch off the power. Through a resistor divider, UVAC is connected to the secondary power transformer for detecting the AC line condition. Once the voltage of UVAC is lower than 0.7V for a period of time, such as 200µs, the PG signal is pulled LOW to indicate an AC line power-down condition. The voltage amplitude of the PWM switching signal in the secondary power transformer is proportional to the AC line voltage. Adjust the ratio of resistor divider to determine the threshold of powerdown warning. A small capacitor is connected from UVAC to ground for filtering the switching noise. OP1 FAN6103 — Power Supply Supervisor Plus PWM Functional Description V DD 0. 7V OP2 + U V AC OPP Figure 19. AC Detection Circuit Figure 17. OPP Protection Circuit Negative-Voltage Protection (NVP) The NVP provides an under-voltage protection for negative voltage output. An under-voltage represents the phenomenal of the overload condition in negative voltage output. For example, the -12V output may drop to -10V during the overload situation. A resistor determining the threshold of the protection is connected from pin NVP to the negative voltage output. Via this resistor, NVP output a 64µA constant current to the negative voltage output. When the NVP voltage is over 2.1V for longer than 7ms, FAN6103 locks the power output off: VNVP = 64 μ A × (R1 + R2 ) + ( −12V ) (1) The power outputs are locked off when VNVP > 2.1V. © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 10 Timing Chart VCC PSON 3.3V,5V,12V tPSON(ON) tUVP NVP tPSON(OFF) SS(on/off) PG tNVP tPSOFF tPG VCC PSON Voltage < VUVAC UVAC OPP tOPP SS(on/off) PG Figure 20. Timing Diagram © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 11 FAN6103 — Power Supply Supervisor Plus PWM Physical Dimensions 19.68 18.66 16 A 9 6.60 6.09 1 8 (0.40) TOP VIEW 0.38 MIN 5.33 MAX 8.13 7.62 3.42 3.17 3.81 2.92 2.54 0.35 0.20 0.58 A 0.35 1.78 1.14 15 0 8.69 17.78 SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) DRAWING FILE NAME: N16EREV1 Figure 21. 16-Pin Dual In-Line Package (DIP) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 12 FAN6103 — Power Supply Supervisor Plus PWM © 2009 Fairchild Semiconductor Corporation FAN6103 • Rev. 1.0.0 www.fairchildsemi.com 13