FAIRCHILD SG6521

SG6521 — PC Power Supply Supervisors
Features
Description
ƒ
ƒ
Two 12V Sense Input Pins: VS12 and VS12B
The SG6521 is designed to provide the supply voltage,
current supervisor, remote on/off (PSON), power good
(PGO) indicator, and fault protection (FPO) functions for
switching power systems.
ƒ
Over-Current Protection (OCP) for 3.3V, 5V, and
two 12V
ƒ
Under-Voltage Protection (UVP) for 3.3V, 5V, and
two 12V
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
ƒ
Open-Drain Output for PGO and FPO Pins
Over-Voltage Protection (OVP) for 3.3V, 5V, and
two 12V
300ms Power-Good Delay
2.8ms PSON Control to FPO Turn-off Delay
48ms PSON Control Delay
No Lock-up During the Fast AC Power On/Off
Wide Supply Voltage Range: 4V to 15V
The power supply is turned on after a 48ms delay when
PSON signal is set from HIGH to LOW. To turn off the
power supply, the PSON signal is set from LOW to
HIGH with a delay of 48ms. The PGI circuitry provides a
power-down warning signal for PGO. When PGI input is
lower than the internal 1.25V reference voltage, PGO
signal is pulled LOW.
Over-Temperature Protection (OTP)
Additional Protection Input (Pext)
Applications
ƒ
ƒ
ƒ
For supervisory functions, it provides the over-voltage
protection (OVP) for 3.3V, 5V, and two 12V; overcurrent protection (OCP) for 3.3V, 5V, and two 12V;
under-voltage protection (UVP) for 3.3V, 5V, and two
12V. When 3.3V, 5V, or 12V voltage decreases to 2.3V,
3.5V, and 9V, respectively, the under-voltage protection
function is enabled. FPO is set HIGH to turn off the
PWM controller IC. The voltage difference across
external current shunt is used for OCP functions. An
external resistor can be used to adjust protection
threshold. An additional protection input pin provides
the flexibility for designing protection circuits.
Switch-Mode Power Supplies with Active PFC
Servo System Power Supplies
PC-ATX Power Supplies
Ordering Information
Part
Number
Operating Temperature
Range
Eco
Status
SG6521DZ
-40°C to +85°C
RoHS
16-pin Dual In-Line Package (DIP)
SG6521SZ
-40°C to +85°C
RoHS
16-pin Small Outline Package (SOP)
Package
Packing
Method
Rail
Tape & Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
SG6521 — PC Power Supply Supervisors
September 2008
SG6521 — PC Power Supply Supervisors
Application Diagram
Figure 1.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
Typical Application
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2
SG6521 — PC Power Supply Supervisors
Block Diagram
Figure 2. Function Block Diagram
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
3
SG6521 — PC Power Supply Supervisors
Pin Configuration
Figure 3. Pin Configuration(Top View)
Pin Definitions
Pin #
Name
Description
1
PGI
Power Good Input. For ATX SMPS, it detects AC line voltage through the main transformer.
2
GND
Ground.
3
FPO
Fault Protection Output. Output signal to control the primary PWM IC through an optocoupler. When FPO is low, the PWM IC is enabled.
4
PSON
5
IS12
6
RI
7
IS12B
12V Over-Current Protection Sense Input. For typical application, this pin is connected to the
positive end of a current shunt through one resistor. When the voltage on IS12 is higher than
that of VS12 by 5mV, OCP is enabled.
8
VS12B
Second 12V Over/Under-Voltage Control Sense Input.
9
Pext
External Protection Detects Input.
10
IS5
5V Over-Current Protection Sense Input.
11
IS33
3.3V Over-Current Protection Sense Input.
12
VS12
12V Over/Under-Voltage Control Sense Input.
13
VS33
3.3V Over/Under-Voltage Control Sense Input.
14
VS5
5V Over/Under-Voltage Control Sense Input.
15
VDD
Supply Voltage. 4.2V ~ 15V. For ATX SMPS, it is connected to 5V-standby and 12V through
diodes, respectively.
16
PGO
Power-Good Logic Output. 0 or 1 (open-drain). Power good=1 means that the power supply
is good for operation. The power good delay is 300ms.
Remote On/Off Logic Input from CPU or Main Board. The power supply is turned on/off
after a 48ms delay.
12V Over-Current Protection Sense Input. For typical applications, this pin is connected to
the positive end of a current shunt through one resistor. When the voltage on IS12 is higher
than that of VS12 by 5mV, OCP is enabled.
Reference Setting. One external resistor RI connected between the RI and GND pins
determines a reference current, IREF = 1.25/RI, for OCP programming.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VDD
DC Supply Voltage
VIN
Input Voltage
VOUT
TJ
TSTG
TL
ESD
Min.
Max.
Unit
16
V
PSON, PGI, VS5, IS5, VS33, IS33, Pext
-0.3
7.0
V
VS12, VS12B, IS12, IS12B
-0.3
15.0
V
FPO, PGO
-0.3
8.0
V
Operating Junction Temperature
-40
+125
°C
Storage Temperature Range
-55
+150
°C
+260
°C
Human Body Model:
JESD22-A114
3.0
KV
Machine Model:
JESD22-A115
200
V
Output Voltage
Lead Temperature (Soldering)
Electrostatic Discharge Capability
SG6521 — PC Power Supply Supervisors
Absolute Maximum Ratings
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Min.
Operating Ambient Temperature
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
-40
Typ.
Max.
Unit
+85
°C
www.fairchildsemi.com
5
VDD = 5V, and TA = 25°C unless otherwise noted.
Symbol
Parameter
Conditions
VDD Section
VDD
DC Supply Voltage
IDD1
Supply Current
PSON = LOW
IDD2
Supply Current
PSON = HIGH
tR
Supply Voltage Rising Time
VST
VDD Start Threshold Voltage
Over-Voltage (OVP) and Over-Current (OCP) Protections
VS33
VOVP
Over-Voltage Protection
VS5
VS12, VS12B
Ratio of Current Sense Sink Current
RI = 18.5kΩ ~75kΩ
IREF
to Current Sense Setting Pin (RI)
Source Current
VOFFSET OCP Comparator Input Offset Voltage
ILKG-FPO Leakage Current (FPO)
FPO = 5V
VOL-FPO Low-Level Output Voltage (FPO)
ISINK 20mA
tOVP
OVP Delay Time
tOCP
OCP Delay Time
VRI
RI Pin Voltage
IRI
Output Current RI
0.6V < PGI < 1.25V;
tST-OCP
Startup OCP / UVP Protection Time
FPO = Low
Under-Voltage Protection and PGI, PGO
VPGI_1
Input Threshold Voltage
PGI 1
VPGI_2
Input Threshold Voltage
PGI 2
VS33
VUVP
Under-Voltage Protection
VS5
VS12, VS12B
tOND
Under-Voltage Turn-on Delay
PGI>0.6V
tUVP
UVP Delay
PGI>1.25V
ILKG-PGO Leakage Current (PGO)
PGO = 5V
VDD = 12V; ISINK
VOL-PGO Low-Level Output Voltage (PGO)
10mA
tPG
Timing PG Delay
tND1
Noise Deglitch Time
PSON Control
IPSON
Input Pull-up Current
VIH
High-Level Input Voltage
VIL
Low-Level Input Voltage
tPSON
Timing PSON to On/Off
Typ.
Max.
Units
1.7
1.0
15.0
2.6
1.5
V
mA
mA
ms
V
4.2
1
4.2
3.7
5.7
13.2
3.9
6.1
13.8
4.1
6.5
14.4
7.6
8.0
8.4
-3
3
5
0.4
110
27.5
1.01•Typ.
62.5
mV
µA
V
µs
ms
V
µA
75
20.0
1.25
49
75
114
ms
0.98•Typ.
0.96•Typ.
2.1
3.3
8.5
49
2.4
1.25
0.60
2.3
3.5
9.0
75
3.2
1.02•Typ.
1.03•Typ.
2.5
3.7
9.5
114
4.0
5
V
V
ms
ms
µA
0.4
V
V
200
300
450
ms
90
150
210
µs
0.8
µA
V
V
120
2
PSON LOW to FPO
LOW
PSON HIGH to PGO
LOW
V
33
12.5
0.98•Typ.
12.5
PSON = 0V
tPSOFF
Timing PGO LOW to FPO HIGH
External Protection Detect Section
VTH
Pext Threshold
tPext
Pext Delay Time
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
Min.
SG6521 — PC Power Supply Supervisors
Electrical Characteristics
34
48
67
34
48
67
1.6
2.8
4.5
ms
1.20
2.4
1.25
3.2
1.30
4.0
V
ms
ms
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6
The SG6521 is designed to provide the supply voltage,
current supervisor, remote on/off (PSON), power-good
(PGO) indicator, and fault protection (FPO) functions for
switching power systems.
have a very small offset voltage ( ± 3mV). The sink
currents of IS33, IS5, and IS12 are eight times the
current at the RI pin. The current at the RI pin is VRI/RI.
Here is an example demonstrating how to set the over
current protection. If I1×R1 > IRI×R2, OCP is active. If
R1=5mΩ, RI=30KΩ, and the OCP active level is 35A,
then the R2 resistor is:
For supervisory functions, it provides the over-voltage
protection (OVP) for 3.3V, 5V, and two 12V; overcurrent protection (OCP) for 3.3V, 5V, and two 12V;
under-voltage protection (UVP) for 3.3V, 5V, and two
12V. When 3.3V, 5V, or 12V voltage decreases to 2.3V,
3.5V, and 9V, respectively, the under-voltage protection
function is enabled. FPO is set HIGH to turn off the
PWM controller IC. The voltage difference across
external current shunt is used for OCP functions. An
external resistor can be used to adjust protection
threshold. An additional protection input pin provides
the flexibility for designing protection circuits.
R2 =
I1 × R 1
= 525Ω
IRI × 8
where C is bypass noise, suggested value is between
1µF ~ 2.2µF
The power supply is turned on after a 48ms delay when
PSON signal is set from HIGH to LOW. To turn off the
power supply, the PSON signal is set from LOW to
HIGH with a delay of 48ms. The PGI circuitry provides a
power-down warning signal for PGO. When PGI input is
lower than the internal 1.25V reference voltage, PGO
signal is pulled LOW.
The SG6521 provides over-current protection for the
3.3V, 5V, and two 12V rails. Whenever an OCP
condition occurs at any of the voltage rails, PGO is
LOW and FPO is open. The internal OCP comparators
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
(1)
SG6521 — PC Power Supply Supervisors
Functional Description
Figure 4. OCP Setup
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7
SG6521 — PC Power Supply Supervisors
Timing Chart
Figure 5. Timing Diagram
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
8
2.000
8.300
1.900
8.100
1.800
IREF
IDD1 (mA)
8.500
7.900
7.700
1.700
1.600
7.500
-40
-25
-10
5
20
35
50
65
Temperature (℃)
80
95
110
1.500
125
-40
-25
-10
Figure 6. IREF vs. TA
5
20
35
50
65
Temperature (℃)
80
95
110
125
80
95
110
125
80
95
110
125
Figure 7. IDD1 vs. TA
SG6521 — PC Power Supply Supervisors
Typical Performance Characteristics
28.000
2.000
26.000
1.200
Tocp (mS)
VOFFSET(mV)
24.000
0.400
-0.400
22.000
20.000
-1.200
18.000
16.000
-2.000
-40
-25
-10
5
20
35
50
Temperature (℃)
65
80
95
110
-40
125
-25
-10
20
35
50
65
Temperature (℃)
Figure 9. TOCP vs. TA
1.30
1.30
1.28
1.28
1.26
1.26
V PG I(V)
VRI (V)
Figure 8. VOFFSET vs. TA
5
1.24
1.24
1.22
1.22
1.20
1.20
-40
-25
-10
5
20
35
50
65
Temperature (℃)
80
95
110
-40
125
Figure 10. VRI vs. TA
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
-25
-10
5
20
35
50
65
Temperature (℃)
Figure 11. VPGI vs. TA
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9
SG6521 — PC Power Supply Supervisors
Physical Dimensions
19.68
18.66
16
A
9
6.60
6.09
1
8
(0.40)
TOP VIEW
0.38 MIN
5.33 MAX
8.13
7.62
3.42
3.17
3.81
2.92
2.54
0.35
0.20
0.58 A
0.35
1.78
1.14
15
0
8.69
17.78
SIDE VIEW
NOTES: UNLESS OTHERWISE SPECIFIED
A THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BB
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) DRAWING FILE NAME: N16EREV1
Figure 12. 16-Lead, Dual Inline Package (DIP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
10
10.00
9.80
A
8.89
16
9
B
4.00
3.80
6.00
PIN ONE
NDICATOR
1.75
1
5.6
8
0.51
0.35
1.27
(0.30)
0.25
M
1.27
C B A
0.65
LAND PATTERN RECOMMENDATION
1.75 MAX
1.50
1.25
SG6521 — PC Power Supply Supervisors
Physical Dimensions (Continued)
SEE DETAIL A
0.25
0.10
C
0.25
0.19
0.10 C
0.50
0.25 X 45°
(R0.10)
NOTES: UNLESS OTHERWISE SPECIFIED
GAGE PLANE
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
(R0.10)
8°
0°
0.36
SEATING PLANE
0.90
0.50
(1.04)
DETAIL A
SCALE: 2:1
Figure 13. 16-Lead, Small Outline Integrated Circuit (SOIC)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
11
SG6521 — PC Power Supply Supervisors
© 2007 Fairchild Semiconductor Corporation
SG6521 • Rev. 1.0.0
www.fairchildsemi.com
12