FAIRCHILD FSTUD16211

Revised August 2001
FSTUD16211
24-Bit Bus Switch with −2V Undershoot Protection
and Level Shifting
General Description
Features
The Fairchild Switch FSTUD16211 provides 24-bits of
high-speed CMOS TTL-compatible bus switching. The low
on resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. A diode to VCC has been
integrated into the circuit to allow for level shifting between
5V inputs and 3.3V outputs.
■ Undershoot hardened to −2V (A and B Ports)
The device is organized as a 12-bit or 24-bit bus switch.
When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected
to Port 2B. When OE1/2 is HIGH, a high impedance state
exists between the A and B Ports. The A and B Ports have
“undershoot hardened” circuit protection to support an
extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC) senses
undershoot at the I/O’s, and responds by preventing voltage differentials from developing and turning on the switch.
■ Control inputs compatible with TTL level
■ Voltage level shifting
■ 4Ω switch connection between two ports
■ Minimal propagation delay through the switch
■ Low lCC
■ Zero bounce in flow-through mode
■ See Applications Note AN-5008 for details
■ Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number
FSTUD16211GX
(Note 1)
Package Number
BGA54A
(Preliminary)
FSTUD16211MTD
MTD56
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Note 1: BGA package available in Tape and Reel only.
Logic Diagram
UHC is a trademark of Fairchild Semiconductor Corporation.
© 2001 Fairchild Semiconductor Corporation
DS500390
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FSTUD16211 24-Bit Bus Switch with −2V Undershoot Protection and Level Shifting
June 2000
FSTUD16211
Connection Diagrams
Pin Descriptions
Pin Assignment for TSSOP
Pin Name
Description
OE1, OE2
Bus Switch Enables
1A, 2A
Bus A
1B, 2B
Bus B
NC
No Connect
Pin Assignment for FBGA
1
2
3
4
5
6
A
1A2
1A1
NC
OE2
1B1
1B2
B
1A4
1A3
1A7
OE1
1B3
1B4
C
1A6
1A5
GND
1B7
1B5
1B6
D
1A10
1A9
1A8
1B8
1B9
1B10
E
1A12
1A11
2A1
2B1
1B11
1B12
F
2A4
2A3
2A2
2B2
2B3
2B4
G
2A6
2A5
VCC
GND
2B5
2B6
H
2A8
2A7
2A9
2B9
2B7
2B8
J
2A12
2A11
2A10
2B10
2B11
2B12
Truth Table
Inputs
OE1
Pin Assignment for FBGA
(Top Thru View)
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2
Inputs/Outputs
OE2
1A, 1B
2A, 2B
L
L
1A = 1B
2A = 2B
L
H
1A = 1B
Z
H
L
Z
2A = 2B
H
H
Z
Z
Recommended Operating
Conditions (Note 5)
Supply Voltage (VCC)
−0.5V to +7.0V
DC Switch Voltage (VS) (Note 3)
−2.0V to +7.0V
Power Supply Operating (VCC)
DC Input Control Pin Voltage (VIN)(Note 4)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN < 0V
−50 mA
Output Voltage (VOUT)
DC Output (IOUT)
128 mA
Input Rise and Fall Time (tr, tf)
+/− 100 mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.5V to 5.5V
Switch Control Input
−65°C to +150 °C
0 ns/V to 5 ns/V
Switch I/O
0 ns/V to DC
Free Air Operating Temperature (TA)
-40 °C to +85 °C
Note 2: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 3: VS is the voltage observed/applied at either A or B Ports across the
switch.
Note 4: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 5: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
VIK
Clamp Diode Voltage
VIH
HIGH Level Input Voltage
4.5–5.5
VIL
LOW Level Input Voltage
4.5–5.5
VOH
HIGH Level
4.5–5.5
II
Input Leakage Current
Typ
(Note 6)
2.0
Units
V
5.5
±1.0
µA
0 ≤ VIN ≤ 5.5V
0
10
µA
VIN = 5.5V
±1.0
µA
0 ≤ A, B ≤ VCC
7
Ω
VIN = 0V, IIN = 64 mA
VIN = 0V, IIN = 30 mA
5.5
Switch On Resistance
4.5
See Figure 4
4
V
4.5
4
7
Ω
4.5
35
50
Ω
Quiescent Supply Current
1.5
mA
10
µA
2.5
mA
5.5
Increase in ICC per Input
VIKU
Voltage Undershoot
IIN = −18 mA
V
V
OFF-STATE Leakage Current
∆ ICC
Conditions
0.8
IOZ
(Note 7)
Max
−1.2
4.5
RON
ICC
TA = −40 °C to +85 °C
Min
5.5
−2.0
5.5
V
VIN = 2.4V, IIN = 15 mA
OE1 = OE2 = GND
VIN = VCC or GND, IOUT = 0
OE1 = OE2 = VCC
VIN = VCC or GND, IOUT = 0
One Input at 3.4V
Other Inputs at VCC or GND
0.0 mA ≥ IIN ≥ −50 mA
OE1, 2 = 5.5V
Note 6: Typical values are at VCC = 5.0V and TA= +25°C
Note 7: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
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FSTUD16211
Absolute Maximum Ratings(Note 2)
FSTUD16211
AC Electrical Characteristics
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
Min
tPHL, tPLH
Propagation Delay Bus to Bus
(Note 8)
tPZH, tPZL
Output Enable Time
Units
VCC = 4.5 – 5.5V
Figure
No.
Conditions
Max
1.5
0.25
ns
5.5
ns
VI = OPEN
Figures
2, 3
VI = 7V for tPZL
Figures
2, 3
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
6.5
ns
VI = 7V for tPLZ
Figures
2, 3
VI = OPEN for tPHZ
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 9)
Parameter
Typ
Max
Units
Conditions
CIN
Control pin Input Capacitance
3.5
pF
VCC = 5.0V
CI/O OFF
Input/Output Capacitance “OFF State”
5.5
pF
VCC = 5.0V, Switch OFF
Note 9: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 10)
Symbol
VOUTU
Parameter
Output Voltage During Undershoot
Min
Typ
2.5
VOH − 0.3
Max
Units
Conditions
V
Figure 1
Note 10: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage
undershoot event.
FIGURE 1.
Device Test Conditions
Parameter
Value
VIN
see Waveform
V
R1 = R2
100K
Ω
VTRI
11.0
V
VCC
5.5
V
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Transient
Input Voltage (VIN) Waveform
Units
4
FSTUD16211
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
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FSTUD16211
Output Voltage HIGH vs. Supply Voltage
FIGURE 4.
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FSTUD16211
Physical Dimensions inches (millimeters) unless otherwise noted
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA54A
Preliminary
7
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FSTUD16211 24-Bit Bus Switch with −2V Undershoot Protection and Level Shifting
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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