CMKDM8005 SURFACE MOUNT DUAL P-CHANNEL ENHANCEMENT-MODE SILICON MOSFETS w w w. c e n t r a l s e m i . c o m DESCRIPTION: The CENTRAL SEMICONDUCTOR CMKDM8005 consists of Dual P-Channel Enhancement-mode silicon MOSFETs designed for high speed pulsed amplifier and driver applications. These MOSFETs offer Very Low rDS(ON) and Low Threshold Voltage. MARKING CODE: C85M APPLICATIONS: • Load Switch / Level Shifting • Battery Charging • Boost Switch • Electro-luminescent Backlighting FEATURES: • ESD Protection up to 2kV • 350mW Power Dissipation • Very Low rDS(ON) • Low Threshold Voltage • Logic Level Compatible • Small, SOT-363 Surface Mount Package MAXIMUM RATINGS: (TA=25°C) Drain-Source Voltage SYMBOL VDS SOT-363 CASE Gate-Source Voltage 20 UNITS V 8.0 V Continuous Drain Current (Steady State) VGS ID 650 mA Continuous Source Current (Body Diode) IS 250 mA IDM PD 1.0 A 350 mW Maximum Pulsed Drain Current Power Dissipation Operating and Storage Junction Temperature Thermal Resistance TJ, Tstg ΘJA -65 to +150 °C 357 °C/W ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP MAX IGSSF, IGSSR VGS=4.5V, VDS=0 10 IDSS BVDSS VGS(th) VSD rDS(ON) rDS(ON) rDS(ON) Qg(tot) Qgs Qgd gFS VDS=16V, VGS=0 VGS=0, ID=250μA VDS=VGS, ID=250μA VGS=0, IS=250mA 100 20 VGS=1.8V, ID=150mA VDS=10V, VGS=4.5V, ID=200mA VDS=10V, VGS=4.5V, ID=200mA VDS=10V, VGS=4.5V, ID=200mA VDS=10V, ID=200mA 0.2 nA V 0.5 VGS=4.5V, ID=350mA VGS=2.5V, ID=300mA UNITS μA 1.0 V 1.1 V 0.25 0.36 Ω 0.37 0.5 Ω 0.8 Ω 1.2 nC 0.24 nC 0.36 nC S R2 (27-September 2011) CMKDM8005 SURFACE MOUNT DUAL P-CHANNEL ENHANCEMENT-MODE SILICON MOSFETS ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS TYP MAX UNITS Crss VDS=16V, VGS=0, f=1.0MHz 25 pF Ciss 100 pF 21 pF ton VDS=16V, VGS=0, f=1.0MHz VDS=16V, VGS=0, f=1.0MHz VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω 38 ns toff VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω 48 ns Coss SOT-363 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: C85M R2 (27-September 2011) w w w. c e n t r a l s e m i . c o m