SM802112 ClockWorks™ 3-Output, 480MHz/80MHz, Ultra-Low Jitter LVDS/CMOS Frequency Synthesizer General Description Features The SM802112 is a member of the ClockWorks™ family of devices from Micrel and provides extremely low-noise clock signals. It is based upon a unique patented RotaryWave® architecture that provides very-low phase noise. The device operates from a 3.3V or 2.5V power supply and synthesizes two LVDS output clocks, one at 480MHz and one at 80MHz and one LVCMOS clock at 80MHz. The SM802112 accepts an 80MHz LVCMOS reference clock or an 80MHz 1Vp-p sine wave. Data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com. • Generates two LVDS clock outputs, one at 480MHz and one at 80MHz • Generates one LVCMOS clock output at 80MHz • 2.5V or 3.3V operating range • Typical phase jitter @ 480MHz (12kHz to 20MHz): 290fs • Industrial temperature range (–40°C to +85°C) • Green, RoHS, and PFOS compliant • Available in 44-pin 7mm × 7mm QFN package Applications • Set Top Box Block Diagram ClockWorks is a trademark of Micrel, Inc RotaryWave is a registered trademark of Multigig, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com September 2011 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Ordering Information(1) Part Number Marking Shipping Temperature Range Package SM802112UMG 802112 Tray –40°C to +85°C 44-Pin QFN SM802112UMGTR 802112 Tape and Reel –40°C to +85°C 44-Pin QFN Note: 1. Devices are Green, RoHS, and PFOS compliant. Pin Configuration 44-Pin QFN (Top View) Pin Description Pin Number Pin Name Pin Type Pin Level 28, 29 /Q0, Q0 O, (DIF) LVDS Differential Clock Output from Bank 1, 480MHz. 4, 5 /Q1, Q1 O, (DIF) LVDS Differential Clock Output from Bank 2, 80MHz. 42, 41 /Q2, Q2 O, (DIF) LVCMOS 12, 13 VDD PWR Power Supply. 31, 37, 38 VDDO1 PWR Power Supply for Output Q0. 16, 43, 44 VDDO2 PWR Power Supply for Outputs Q1, Q2. PWR Core Power Supply Ground. The exposed pad must be connected to the VSS ground plane. 10, 21, 23 VSS (Exposed Pad) Pin Function Differential Clock Output from Bank 2, 80MHz. 24, 39 VSSO1 PWR Power Supply Ground for Outputs Q0. 3, 6, 40 VSSO2 PWR Power Supply Ground for Outputs Q1, Q2. September 2011 2 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Pin Description (Continued) Pin Number Pin Name Pin Type Pin Level Pin Function 17 REF_IN I, SE LVCMOS Reference Clock Input, 80MHz. 9, 11, 14, 20, 27, 30, 30 1, 2, 7, 8, 15, 18, 19, 22, 25, 26, 32, 33, 35, 36 September 2011 TEST Factory Test Pins. Do not connect anything to these pins. NC No Connect. Do not connect anything to these pins. 3 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VDD, VDDO1/2) ......................................+4.6V Input Voltage (VIN) .............................. −0.50V to VDD + 0.5V Lead Temperature (soldering, 20s)............................ 260°C Case Temperature ..................................................... 115°C Storage Temperature (Ts) ......................... −65°C to +150°C Supply Voltage (VDD, VDDO1/2)............ +2.375V to +3.465V Ambient Temperature (TA).......................–40°C to +85°C Junction Thermal Resistance(3) QFN (θJA) Still-Air......................................................24°C/W QFN (ψJB) Junction-to-Board ......................................8°C/W DC Electrical Characteristics(4) VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. Symbol Parameter Min. Typ. Max. Units VDD, VDDO1/2 2.5V Operating Voltage Condition 2.375 2.5 2.625 V VDD, VDDO1/2 3.3V Operating Voltage 3.135 3.3 3.465 V IDD Supply current VDD + VDDO 125 158 mA Outputs open LVDS DC Electrical Characteristics(4) VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. RL = 100Ω across Q and /Q. Symbol Parameter Condition Min. Typ. Max. Units VOD Differential Output Voltage Figures 1, 4 275 350 475 mV ΔVOD VOD Magnitude Change 40 mV VOS Offset Voltage 1.50 V ΔVOS VOS Magnitude Change 50 mV 1.15 1.25 Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. 4. The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established. September 2011 4 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 LVCMOS OUTPUT DC Electrical Characteristics(4) VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. RL = 50Ω to VDDO/2. Symbol Parameter Condition VOH Output High Voltage Figure 5 VOL Output Low Voltage Figure 5 Min. Typ. Max. Units VDD0 − 0.7 V 0.6 V REF_IN DC Electrical Characteristics(4) VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C. Symbol Parameter VIH Input High Voltage VIL Input Low Voltage IIN Input Current September 2011 Condition Min. VIN = 0V to VDD 5 Typ. Max. Units 1.1 VDD + 0.3 V −0.3 0.6 V −5 5 μA M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 AC Electrical Characteristics(4, 5) VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5% VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5% TA = −40°C to +85°C. Symbol Parameter FOUT Output Frequency FREF Reference Input Frequency TR/TF Condition 480 Q1, Q2 Outputs 80 Units MHz 80 MHz 100 250 400 LCMOS Output Rise/Fall Time 20% – 80% 100 250 500 LVDS Outputs 48 50 52 LVCMOS Output 45 50 55 60 150 ps 20 ms TSKEW Output-to-Output Skew TLOCK PLL Lock Time Q1 to Q2, Note 6 480MHz LVDS Integration Range (1kHz – 100MHz) RMS Phase Jitter 300 Input Phase Noise Output Phase Noise Spurious Noise Components ps % 600 (7) fs 80MHz LVDS, LVCMOS Integration Range (1kHz – 20MHz) Phase Noise Max. 20% – 80% Output Duty Cycle Phase Noise Typ. LVDS Output Rise/Fall Time ODC Tjit(∅) Min. Q0 Output 290 80MHz Input Frequency Offset Frequency: 1kHz 10kHz 100kHz 1MHz −124 −135 dBc −143 −145 480MHz Output Frequency Offset Frequency: 1kHz 10kHz 100kHz 1MHz 10MHz 20MHz 100MHz 80MHz for Q0 480MHz 600 −105 −115 −120 −120 dBc −150 −154 −160 −58 -48 dBc Notes: 5. All phase noise measurements were taken with an Agilent 5052B phase noise system. 6. Defined as skew between outputs at the same supply voltage and temperature. Measured as the difference of the output differential crossing point of Q1 and /Q1 80MHz LVDS, and the 50% point of LVCMOS Q2. LVCMOS Q2 and /Q2 are both ac coupled into 50 ohms. 7. REF_IN driven with a low-noise source, ClockWorks SM802001 programmed for an 80MHz CMOS output. If using an external reference input, use a low phase noise source. With an external reference, the phase noise will follow the input source phase noise up to about 1MHz. Measured with input noise of 1kHz -126dBc, 10kHz -136dBc, 100kHz -143dBc, 1MHz -146dBc. September 2011 6 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Application Information REF_IN Input LVCMOS Outputs LVCMOS output Q2 and /Q2 are 80MHz complimentary outputs to reduce switching noise. Terminate both outputs with identical loads to minimize noise. For a 1VP−P sine wave signal applied to REF_IN with the part operating at 3.3V, AC couple REF_IN with a 50Ω termination of 206Ω to VDD and 66Ω to ground, close to the input. This provides 50Ω Thevenin termination and a DC voltage of 0.8V. LVDS Outputs LVDS outputs are to be terminated with 100Ω across Q and /Q. For best performance load all outputs. You can DC or AC-couple the outputs. September 2011 7 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Phase Noise Plots Phase Noise Plot: 480MHz LVDS Phase Noise Plot: 80MHz LVDS September 2011 8 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Phase Noise Plots (Continued) Phase Noise Plot: 80MHz LVCMOS September 2011 9 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Figure 1. Duty Cycle Timing Figure 2. All Outputs Rise/Fall Time Figure 3. RMS Phase/Noise Jitter September 2011 10 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Figure 4. LVDS Output Load and Test Circuit Figure 5. LVCMOS Output Test Load LVDS and LVCMOS Output Load and Test Circuit September 2011 11 M9999-091411-A [email protected] or (408) 955-1690 Micrel, Inc. SM802112 Package Information 44-Pin QFN MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2011 Micrel, Incorporated. September 2011 12 M9999-091411-A [email protected] or (408) 955-1690