NUP2114UPXV5 Transient Voltage Suppressors Low Capacitance ESD Protection for High Speed Data http://onsemi.com The NUP2114UPXV5 transient voltage suppressor is designed to protect high speed data lines from ESD. Ultra−low capacitance and high level of ESD protection makes this device well suited for use in USB 2.0 applications. VP I/O Features • • • • • • Low Capacitance 0.8 pF Stand Off Voltage: 5 V Low Leakage Protection for the Following IEC Standards: IEC 61000−4−2 Level 4 ESD Protection UL Flammability Rating of 94 V−0 This is a Pb−Free Device I/O 1 Typical Applications • • • • • • • MARKING DIAGRAM 5 SOT−553 CASE 463B High Speed Communication Line Protection USB 2.0 High Speed Data Line and Power Line Protection Monitors and Flat Panel Displays MP3 Gigabit Ethernet Notebook Computers Digital Video Interface (DVI) and HDMI 1 P2MG G P2 = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −55 to +150 °C Lead Solder Temperature − Maximum (10 Seconds) TL 260 °C ESD 16000 400 13000 V Rating Human Body Model (HBM) Machine Model (MM) IEC 61000−4−2 Contact (ESD) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. See Application Note AND8308/D for further description of survivability specs. VP 1 VN 2 NC 3 5 I/O 4 I/O ORDERING INFORMATION Device Package Shipping NUP2114UPXV5T1G SOT−553 4000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2009 September, 2009 − Rev. 1 1 Publication Order Number: NUP2114UPXV5/D NUP2114UPXV5 ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol IF Parameter IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR V IR VF IT Maximum Reverse Leakage Current @ VRWM VBR Breakdown Voltage @ IT IT Test Current IF Forward Current VF Forward Voltage @ IF Ppk Peak Power Dissipation C VC VBR VRWM Working Peak Reverse Voltage IPP Uni−Directional TVS Max. Capacitance @ VR = 0 and f = 1.0 MHz *See Application Note AND8308/D for detailed explanations of datasheet parameters. ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise specified) Parameter Reverse Working Voltage Breakdown Voltage Symbol VRWM VBR Conditions Min Typ (Note 1) IT = 1 mA, (Note 2) Max Unit 5.0 V 6.0 Reverse Leakage Current IR VRWM = 5 V Junction Capacitance CJ VR = 0 V, f = 1 MHz between I/O Pins and GND Junction Capacitance CJ VR = 0 V, f = 1 MHz between I/O Pins Clamping Voltage VC @ IPP = 1 A (Note 3) Clamping Voltage VC Per IEC 61000−4−2 (Note 4) V 1.0 mA 0.8 1.0 pF 0.4 0.5 pF 9.1 V Figures 1 and 2 V 1. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 2. VBR is measured at pulse test current IT. 3. Surge current waveform per Figure 5. 4. Typical waveform. For test procedure see Figures 3 and 4 and Application Note AND8307/D. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 2 NUP2114UPXV5 IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 3. IEC61000−4−2 Spec ESD Gun Oscilloscope TVS 50 W Cable 50 W Figure 4. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger % OF PEAK PULSE CURRENT 100 PEAK VALUE IRSM @ 8 ms tr 90 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms 80 70 60 HALF VALUE IRSM/2 @ 20 ms 50 40 30 tP 20 10 0 0 20 40 t, TIME (ms) 60 Figure 5. 8 X 20 ms Pulse Waveform http://onsemi.com 3 80 NUP2114UPXV5 PACKAGE DIMENSIONS SOT−553, 6 LEAD CASE 463B−01 ISSUE B D −X− 5 A 4 1 e 2 E −Y− 3 b NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. L HE DIM A b c D E e L HE c 5 PL 0.08 (0.003) M X Y MILLIMETERS NOM MAX 0.55 0.60 0.22 0.27 0.13 0.18 1.60 1.70 1.20 1.30 0.50 BSC 0.10 0.20 0.30 1.50 1.60 1.70 MIN 0.50 0.17 0.08 1.50 1.10 INCHES NOM 0.022 0.009 0.005 0.063 0.047 0.020 BSC 0.004 0.008 0.059 0.063 MIN 0.020 0.007 0.003 0.059 0.043 MAX 0.024 0.011 0.007 0.067 0.051 0.012 0.067 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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