NUP6012PMU Six-Line Transient Voltage Suppressor Array ESD Protection Diodes with Ultra−Low (0.7 pF) Capacitance http://onsemi.com The six−line voltage transient suppressor array is designed to protect voltage−sensitive components that require ultra−low capacitance from ESD and transient voltage events. This device features a common anode design which protects six independent high speed data lines in a single six−lead UDFN low profile package. Excellent clamping capability, low capacitance, low leakage, and fast response time make these parts ideal for ESD protection on designs where board space is at a premium. Because of its low capacitance, it is suited for use in high frequency designs. D1 D2 D3 D4 D5 D6 Features • • • • • • • • Low Capacitance Data Lines (0.7 pF Typical) Protects up to Six Data Lines UDFN Package, 1.6 x 1.6 mm Low Profile of 0.50 mm for Ultra Slim Design ESD Rating: IEC61000−4−2: Level 4 − Contact (14 kV) D1, D2, D3, D4 ,D5 and D6 Pins = 5.2 V Minimum Protection RoHS Compliant This is a Pb−Free Device MARKING DIAGRAM 1 XX M G USB 2.0 High−Speed Interface Cell Phones MP3 Players SIM Card Protection Rating = Specific Device Code = Date Code = Pb−Free Package PIN CONNECTIONS D1 1 MAXIMUM RATINGS (TJ = 25°C, unless otherwise specified) Symbol XX MG G (Note: Microdot may be in either location) Typical Applications • • • • 1 UDFN6 1.6x1.6 MU SUFFIX CASE 517AP 6 D2 2 Value Unit TJ Operating Junction Temperature Range −40 to 125 °C TSTG Storage Temperature Range −55 to 150 °C TL Lead Solder Temperature – Maximum (10 seconds) 260 °C ESD IEC 61000−4−2 Contact 14000 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. GND D3 3 6 D6 5 D5 4 D4 ORDERING INFORMATION Device NUP6012PMUTAG Package Shipping† UDFN6 3000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2008 June, 2008− Rev. 0 1 Publication Order Number: NUP6012PMU/D NUP6012PMU ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR IF Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM VBR VC VBR VRWM Breakdown Voltage @ IT IT Test Current IF Forward Current VF Forward Voltage @ IF Ppk Peak Power Dissipation C I V IR VF IT IPP Max. Capacitance @ VR = 0 and f = 1.0 MHz Uni−Directional TVS ELECTRICAL CHARACTERISTICS (TJ = 25°C, unless otherwise specified) Conditions Parameter Reverse Working Voltage (D1, D2, D3, D4, D5 and D6) (Note 1) Breakdown Voltage (D1, D2, D3, D4, D5 and D6) IT = 1 mA, (Note 2) Reverse Leakage Current (D1, D2, D3, D4, D5 and D6) Capacitance (D1, D2, D3, D4, D5 and D6) Symbol Min Typ Max Unit VRWM − − 4.0 V VBR 5.2 5.5 − V @ VRWM IR − − 1.0 mA VR = 0 V, f = 1 MHz (Line to GND) CJ − 0.7 0.9 pF 1. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 2. VBR is measured at pulse test current IT. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 2 NUP6012PMU PACKAGE DIMENSIONS UDFN6, 1.6x1.6, 0.5P CASE 517AP−01 ISSUE O A B D 2X 0.10 C PIN ONE REFERENCE 2X E DETAIL A OPTIONAL CONSTRUCTION 0.10 C A (A3) DETAIL B 0.05 C A1 0.05 C SIDE VIEW DETAIL A 6X C A1 SEATING PLANE DIM A A1 A3 b D E e D2 E2 K L L1 MOLD CMPD EXPOSED Cu TOP VIEW 6X L L1 ÉÉÉ ÉÉÉ NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ÉÉÉ ÉÉÉ A3 DETAIL B OPTIONAL CONSTRUCTION SOLDERMASK DEFINED MOUNTING FOOTPRINT* D2 L 1 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.20 0.30 1.60 BSC 1.60 BSC 0.50 BSC 1.10 1.30 0.45 0.65 0.20 −−− 0.20 0.40 0.00 0.15 1.26 3 E2 6X 6X K 6 5 6X 0.52 b e 0.10 C A B BOTTOM VIEW 0.05 C NOTE 3 0.61 1.90 1 0.50 PITCH 6X 0.32 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 3 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NUP6012PMU/D