Ordering number : EN6507B Thick-Film Hybrid IC STK672-080-E Unipolar Constant-current Chopper (external excitation PWM) Circuit with Built-in Microstepping Controller Stepping Motor Driver (sine wave drive) Output Current 2.8A (no heat sink*) Overview The STK672-080-E is a stepping motor driver hybrid IC that uses power MOSFETs in the output stage. It includes a builtin microstepping controller and is based on a unipolar constant-current PWM system. The STK672-080-E supports application simplification and standardization by providing a built-in 4 phase distribution stepping motor controller. It supports five excitation methods: 2 phase, 1-2 phase, W1-2 phase, 2W1-2 phase, and 4W1-2 phase excitations, and can provide control of the basic stepping angle of the stepping motor divided into 1/16 step units. It also allows the motor speed to be controlled with only a clock signal. The use of this hybrid IC allows designers to implement systems that provide high motor torques, low vibration levels, low noise, fast response, and high-efficiency drive. This product is provided in a smaller package than SANYO's earlier STK672-050-E for easier mounting in end products. Applications • Facsimile stepping motor drive (send and receive) • Paper feed and optical system stepping motor drive in copiers • Laser printer drum drive • Printer carriage stepping motor drive • X-Y plotter pen drive • Other stepping motor applications Note*: Conditions: VCC1 = 24V, IOH = 2.0A, 2W1-2 excitation mode. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 61108HKIM/52004TN(OT)/22002TN(OT) No.6507-1/18 STK672-080-E Features • Can implement stepping motor drive systems simply by providing a DC power supply and a clock pulse generator. <Control Block Features> • One of five drive types can be selected with the drive mode settings (M1, M2, and M3) 1) 2 phase excitation drive 2) 1-2 phase excitation drive 3) W1-2 phase excitation drive 4) 2W1-2 phase excitation drive 5) 4W1-2 phase excitation drive • Phase retention even if excitation is switched. • Provides the MOI phase origin monitor pin. • The CLK input counter block can be selected to be one of the following by the high/low setting of the M3 input pin. 1) Rising edge only 2) Both rising and falling edges • The CLK input pin includes built-in malfunction prevention circuits for external pulse noise. • ENABLE and RESET pins provided. These are Schmitt trigger inputs with built-in 20kΩ (typical) pull-up resistors. • No noise generation due to the difference between the A and B phase time constants during motor hold since external excitation is used. • Microstepping operation supported even for small motor currents, since the reference voltage Vref can be set to any value between 0V and 1/2VCC2. <Driver Block> • External excitation PWM drive allows a wide operating supply voltage range (VCC1 = 10 to 45V) to be used. • Current detection resistor (0.15Ω) built-in the hybrid IC itself. • Power MOSFETs adopted for low drive loss. • Provides a motor output drive current of IOH = 2.8A. (at Tc = 105°C) Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage 1 VCC1 max No signal 52 V Maximum supply voltage 2 VCC2 max No signal -0.3 to +7.0 V VIN max Logic input pins -0.3 to +7.0 V Output current IOH max 0.5s, 1 pulse, with VCC1 applied Repeated avalanche capacity Ear max Allowable power dissipation Pd max Operating IC substrate temperature Tc max Junction temperature Tj max Storage temperature Tstg Input voltage θc-a = 0 3.3 A 30 mJ 8 W 105 °C 150 °C -40 to +125 °C Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Supply voltage 1 VCC1 With signals applied Supply voltage 2 VCC2 With signals applied Input voltage VIH Phase driver withstand voltage VDSS Tr1, 2, 3, and 4 (the A, A, B, and B outputs) Output current 1 IOH1 Tc = 105°C, CLK ≥ 200Hz Output current 2 IOH2 Tc = 80°C, CLK ≥ 200Hz Ratings Unit 10 to 45 V 5 ± 5% V 0 to VCC2 V 100 (min) V 2.8 A 3 A No.6507-2/18 STK672-080-E Electrical Characteristics at Tc = 25°C, VCC1 = 24V, VCC2 = 5V Parameters Symbols Rating Conditions min Control supply current ICC Output saturation voltage Vsat Average output current Ioave FET diode forward voltage Vdf Pin 6, with ENABLE pin held low. RL = 12Ω Load: R = 3.5Ω / L = 3.8mH For each phase unit typ 0.445 If = 1A max 2.1 14 mA 0.65 1 V 0.5 0.56 A 1 1.5 V [Control Inputs] Input voltage Input current VIH Except for the Vref pin VIL Except for the Vref pin 1 V IIH Except for the Vref pin 0 1 10 μA IIL Except for the Vref pin 125 250 510 μA 2.5 V 415 545 μA 0.4 V 4 V [Vref Input Pin] Input voltage VI Pin 7 Input current II Pin 7, 2.5V input 330 VOH I = –3mA, pins MOI 2.4 VOL I = +3mA, pins MOI 2W1-2, W1-2, 1-2 Vref θ = 1/8 100 % 2W1-2, W1-2 Vref θ = 2/8 92 % 2W1-2 Vref θ = 3/8 83 % 2W1-2, W1-2, 1-2 Vref θ = 4/8 71 % 2W1-2 Vref θ = 5/8 55 % 2W1-2, W1-2 Vref θ = 6/8 40 % 2W1-2 Vref θ = 7/8 2 Vref 0 [Control Outputs] Output voltage V [Current Distribution Ratio (A·B)] PWM frequency fc 37 21 % 100 % 47 57 kHz Note: A constant-voltage power supply must be used. The design target value is shown for the current distribution ratio. Package Dimensions unit:mm (typ) 4186 46.6 8.5 12.7 3.6 2.0 14 2.0=28 0.5 4.0 15 1 (6.6) 1.0 25.5 41.2 0.4 2.9 No.6507-3/18 9 M2 ENABLE 15 MOI 14 RESET 13 M3 12 CLOCK 11 CWB 10 8 M1 RC oscillator Excitation state monitor Rise/fall detection and switching Excitation mode control Reference clock generation Phase advance counter PWM control Phase excitation drive signal generation Pseudo-sine wave generator – + – + SUB 7 6 Current distribution ratio switching Vref VCC2 5 A 4 AB 3 B 2 BB 1 PG STK672-080-E Internal Block Diagram A13256 No.6507-4/18 STK672-080-E Test Circuit Diagrams Vsat Vdf VCC2 VCC1 6 6 Start 11 5 4 3 8 2 9 RL A 5 AB 4 B 3 BB 2 STK672-080-E Vref=2.5V A AB B BB STK672-080-E 7 V V VCC2 13 + 1 1 A A13257 A13258 IIH, IIL Ioave, ICC, fc VCC1 VCC2 VCC2 A M1 M2 M3 IIH CLK A CWB IIL RESET ENABLE A 2.5V Vref b a a 6 6 b Start 8 11 5 8 4 SW1 A 9 12 9 11 3 STK672-080-E 10 13 14 AB B SW2 STK672-080-E Vref 7 ENABLE 15 2 BB VCC1 SW3 15 7 + fc 13 1 1 A13259 A A13260 For Ioave measurement: Set switch SW1 to the b position, provide the Vref input and switch over switch SW2. For fc measurement: Set SW1 to the a position, set Vref to 0V, and switch over switch SW3. For ICC measurement: Set the ENABLE input to the low level. No.6507-5/18 STK672-080-E Power-on Reset The application must perform a power-on reset operation when VCC2 power is first applied to this hybrid IC. Application circuit that used 2W1-2 phase excitation (microstepping operation) mode. VCC2=5V 6 5 14 8 VCC2=5V 14 9 3 12 14 2 Two-phase stepping motor AB B + BB 15 ENABLE VF 0.3V 4 A 11 CLK RESET + 100μF or higher VCC1=10V to 45V SG STK672-080-E 1 PG 13 CBW 10 MOI 14 VCC2=5V We recommend a value of about 100Ω for Ro2 to minimize the influence of the Vref pin internal impedance, which is 6kΩ RoX: Input impedance: 6kΩ ±30% Ro1 Simple power on reset circuit (This circuit cannot be used for power supply voltage drop detection.) 7 RoX Vref Ro2 A13261 Setting the Motor Current The motor current IOH is set by the Vref voltage on the hybrid IC pin 7. The following formula gives the relationship between IOH and Vref. RoX = (Ro2 × 6kΩ) ÷ (Ro2 + 6kΩ) Vref = VCC2 × RoX ÷ (Ro1 + RoX) (1) (2) 1 × Vref (3) K Rs K: 4.7 (Voltage divider ratio), Rs: 0.15Ω (This is the hybrid IC's internal current detection resistor. It has a tolerance of ±3%.) IOH = Applications can use motor currents from the current (0.05 to 0.1A) set by the duty of the frequency set by the oscillator up to the limit of the allowable operating range, IOH = 2.8A Ioave IOL IOH 0A Motor current waveform A13262 Function Table M2 M1 M3 0 0 1 1 0 1 0 1 Phase switching clock edge timing 1 2 phase excitation 1-2 phase excitation W1-2 phase excitation 2W1-2 phase excitation Rising edge only 0 1-2 phase excitation W1-2 phase excitation 2W1-2 phase excitation 4W1-2 phase excitation Rising and falling edges Forward Reverse ENABLE Motor current is cut off when low 0 1 RESET Active low CWB No.6507-6/18 STK672-080-E Functional Description External Excitation Chopper Drive Block Description VCC1 IOFF Enable φA (control signal) ION Current divider L2 L1 Vref A=1 CR oscillator Divider 800kHz 45kHz S Q Latch circuit D1 MOSFET R – Noise filter + AND Rs A13263 Driver Block Basic Circuit Structure Since this hybrid IC adopts an external excitation method, no external oscillator circuit is required. When a high level is input to φA in the basic driver block circuit shown in the figure and the MOSFET is turned on, the comparator + input will go low and the comparator output will go low. Since a set signal with the PWM period will be input, the Q output will go high, and the MOSFET will be turned on as its initial value. The current ION flowing in the MOSFET passes through L1 and generates a potential difference in Rs. Then, when the Rs potential and the Vref potential become the same, the comparator output will invert, and the reset signal Q output will invert to the low level. Then, the MOSFET will be turned off and the energy stored in L1 will be induced in L2 and the current IOFF will be regenerated to the power supply. This state will be maintained until the time when an input to the latch circuit set pin occurs. In this manner, the Q output is turned off and on repeatedly by the reset and set signals, thus implementing constant current control. The resistor and capacitor on the comparator input are spike removal circuit elements and synchronize with the PWM frequency. Since this hybrid IC uses a fixed frequency due to the external excitation method and at the same time also adopts a synchronized PWM technique, it can suppress the noise associated with holding a position when the motor is locked. Input Pin Functions Pin No. Symbol 11 CLK Phase switching clock Function Built-in pull-up resistor CMOS Schmitt trigger input Pin circuit type 10 CWB Rotation direction setting (CW/CCW) Built-in pull-up resistor CMOS Schmitt trigger input 15 ENABLE Output cutoff Built-in pull-up resistor CMOS Schmitt trigger input 8, 9, 12 M1, M2, M3 Excitation mode setting Built-in pull-up resistor CMOS Schmitt trigger input 13 RESET System reset Built-in pull-up resistor CMOS Schmitt trigger input 7 Vref Current setting Input impedance 6kΩ (typ.) ±30% No.6507-7/18 STK672-080-E Input Signal Functions and Timing • CLK (phase switching clock) 1) Input frequency range: DC to 50kHz 2) Minimum pulse width: 10μs 3) Duty: 40 to 60% (However, the minimum pulse width takes precedence when M3 is high.) 4) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure 5) Built-in multi-stage noise rejection circuit 6) Function: - When M3 is high or open: The phase excited (driven) is advanced one step on each CLK rising edge. - When M3 is low: The phase is advanced one step by both rising and falling edges, for a total of two steps per cycle. CLK Input Acquisition Timing (M3 = Low) CLK input System clock Phase excitation counter clock Excitation counter up/down Control output timing Control output switching timing A13264 • CWB (Method for setting the rotation direction) 1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure 2) Function: - When CWB is low: The motor turns in the clockwise direction. - When CWB is high: The motor turns in the counterclockwise direction. 3) Notes: When M3 is low, the CWB input must not be changed for about 6.25μs before or after a rising or falling edge on the CLK input. • ENABLE (Controls the on/off state of the A, A, B, and B excitation drive outputs and selects either operating or hold as the internal state of this hybrid IC.) 1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure 2) Function: - When ENABLE is high or open: Normal operating state - When ENABLE is low: This hybrid IC goes to the hold state and excitation drive output (motor current) is forcibly turned off. In this mode, the hybrid IC system clock is stopped and no inputs other than the reset input have any effect on the hybrid IC state. No.6507-8/18 STK672-080-E • M1, M2, and M3 (Excitation mode and CLK input edge timing selection) 1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure 2) Function: M2 M1 M3 0 0 1 1 0 1 0 1 Phase switching clock edge timing 1 2 phase excitation 1-2 phase excitation W1-2 phase excitation 2W1-2 phase excitation Rising edge only 0 1-2 phase excitation W1-2 phase excitation 2W1-2 phase excitation 4W1-2 phase excitation Rising and falling edges 3) Valid mode setting timing: Applications must not change the mode in the period 5μs before or after a CLK signal rising or falling edge. Mode Setting Acquisition Timing CLK input System clock Mode setting M1 to M3 Mode switching clock Mode switching timing Hybrid IC internal setting state Phase excitation clock Excitation counter up/down A13265 • RESET (Resets all parts of the system.) 1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure 2) Function: - All circuit states are set to their initial values by setting the RESET pin low. (Note that the pulse width must be at least 10μs.) At this time, the A and B phases are set to their origin, regardless of the excitation mode. The output current goes to about 71% after the reset is released. 3) Notes: When power is first applied to this hybrid IC, Vref must be established by applying a reset. Applications must apply a power on reset when the VCC2 power supply is first applied. • Vref (Sets the current level used as the reference for constant-current detection.) 1) Pin circuit type: Analog input structure 2) Function: - Constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a voltage less than the control system power supply voltage VCC2 minus 2.5V. - Applications can apply constant-current control proportional to the Vref voltage, with this value of 2.5V as the upper limit. Output Pin Functions Pin No. Symbol Function Pin circuit type 14 MOI Phase excitation origin monitor Standard CMOS structure Output Signal Functions and Timing • A, A, B, and B (Motor phase excitation outputs) 1) Function: - In the 4 phase and 2 phase excitation modes, a 3.75μs (typical) interval is set up between the A and A and B and B output signal transition times. No.6507-9/18 STK672-080-E Phase States During Excitation Switching • Excitation phases before and after excitation mode switching <clockwise direction> 2W1-2 phase → 1-2 phase 2W1-2 phase → 2 phase A 0 3 28 27 25 28 B 24 8 B 5 8 B 12 20 12 16 9 11 12 20 17 19 A 0 4 28 26 6 28 4 B 24 B 24 8 B 12 29 4 28 0 4 24 18 14 18 16 2 3 5 25 8 B 8 23 10 12 A 0 B 9 11 19 14 13 17 15 A 1-2 phase → W1-2 phase 1-2 phase → 2 phase 7 21 A A 1 30 0 2 28 4 26 6 24 22 8 20 10 18 12 16 14 B 16 31 27 6 20 12 W1-2 phase → 2W1-2 phase A 20 12 16 22 10 20 A 0 30 26 1-2 phase → 2W1-2 phase A A 30 2 1 29 4 28 B 24 A W1-2 phase → 1-2 phase 2 28 20 A 30 31 0 1 2 3 29 4 28 5 27 30 0 2 26 6 28 4 25 26 7 6 B 24 24 8 8 B 22 10 23 20 9 12 18 16 14 22 10 11 21 12 20 13 19 18 17 161514 A W1-2 phase → 2 phase 22 15 16 16 A 30 4 28 0 4 8 24 4 B 24 20 A 31 1 2W1-2 phase → W1-2 phase 28 4 20 12 5 0 26 28 B 8 B 20 22 6 4 25 B 12 16 B B 8 20 12 16 10 9 21 12 20 28 0 4 24 18 16 13 14 17 A A A 2 phase → W1-2 phase 2 phase → 1-2 phase A 0 2 phase → 2W1-2 phase A A 30 29 5 6 B 24 28 4 20 12 B 8 B 22 28 4 20 12 28 4 20 12 B B B 21 14 16 A A 13 17 A Excitation phase according to the first clock input pulse after changing the excitation mode setting (M1 and M2) Excitation phase immediately before setting the excitation mode A13266 No.6507-10/18 STK672-080-E • Excitation phases before and after excitation mode switching <counterclockwise direction> 2W1-2 phase → 1-2 phase 2W1-2 phase → 2 phase 31 A 0 28 2W1-2 phase → W1-2 phase A 0 1 29 4 5 28 4 7 B 24 25 B 24 8 B 20 23 28 0 4 8 24 16 21 20 15 16 12 13 1716 A A A W1-2 phase → 1-2 phase W1-2 phase → 2 phase A 0 30 8 B 9 12 20 12 6 28 4 B 24 8 B 20 12 16 12 22 22 5 B 8 B 10 23 A 0 14 13 17 15 A 1-2 phase → 2W1-2 phase A 30 30 2 3 4 28 4 20 12 26 B 8 B 22 B 9 11 19 A 28 7 21 1-2 phase → W1-2 phase 1-2 phase → 2 phase B 24 3 A A 1 30 0 2 28 4 26 6 24 22 8 20 10 18 12 16 14 25 8 31 27 12 18 16 14 29 6 20 16 A 4 28 0 4 24 26 B 24 W1-2 phase → 2W1-2 phase A 0 2 30 28 20 A 30 31 0 1 2 3 29 4 28 5 27 30 0 2 26 6 28 4 25 26 7 6 B 24 24 8 8 B 22 10 23 20 9 1816 1412 22 10 11 21 20 12 13 19 18 17 161514 20 16 27 6 28 0 4 24 28 0 4 24 B B 12 B 8 20 12 16 23 10 7 11 12 20 19 14 18 16 A 15 A A 2 phase → W1-2 phase 2 phase →1-2 phase A 0 2 phase → 2W1-2 phase A A 2 3 27 B 24 26 4 28 20 12 B 8 B 28 4 20 12 B B 10 28 4 20 12 B 11 16 A 19 18 A A A13267 No.6507-11/18 STK672-080-E Excitation Time and Timing Charts • CLK rising edge operation 2 Phase Excitation Timing Chart (M3 = 1) 1-2 Phase Excitation Timing Chart (M3 = 1) 1 M1 0 M1 0 M2 0 M2 0 1 M3 0 M3 0 1 CLK A A CLK A A B B B B MOSFET Gate Signal RESET CWB MOSFET Gate Signal RESET CWB MOI 100% 100% 71% 71% Vref A 100% 71% Comparator Reterence Voltage Comparator Reterence Voltage MOI Vref A 100% 71% Vref B Vref B W1-2 Phase Excitation Timing Chart (M3 = 1) 2W1-2 Phase Excitation Timing Chart (M3 = 1) 1 M1 0 M1 0 M2 0 1 M2 0 1 M3 0 1 1 M3 0 RESET CWB CLK A A B B MOI CLK MOSFET Gate Signal MOSFET Gate Signal RESET CWB A A B B MOI 100% 92% 40% Vref A 100% 92% 71% 40% Vref B Comparator Reterence Voltage Comparator Reterence Voltage 71% 100% 92% 83% 71% 55% 40% 20% Vref A 100% 92% 83% 71% 55% 40% 20% Vref B A13268 No.6507-12/18 STK672-080-E • CLK rising and falling edge operation 1-2 Phase Excitation Timing Chart (M3 = 0) W1-2 Phase Excitation Timing Chart (M3 = 0) 1 M1 0 M1 0 M2 0 M2 0 M3 0 M3 0 CLK A A B B CLK A A B B MOI MOI 100% 100% 92% 71% 71% Vref A 100% 71% Comparator Reterence Voltage Comparator Reterence Voltage MOSFET Gate Signal RESET CWB MOSFET Gate Signal RESET CWB 40% Vref A 100% 92% 71% 40% Vref B Vref B 2W1-2 Phase Excitation Timing Chart (M3 = 0) 4W1-2 Phase Excitation Timing Chart (M3 = 0) 1 M1 0 M1 0 M2 0 1 M2 0 M3 0 M3 0 1 RESET CWB CLK A A B B MOI CLK 100% 92% 83% 71% 55% 40% 20% Vref A 100% 92% 83% 71% 55% 40% 20% Vref B MOSFET Gate Signal A A B B MOI Comparator Reterence Voltage Comparator Reterence Voltage MOSFET Gate Signal RESET CWB 97%100% 88% 92% 77% 83% 71% 66% 55% 48% 40% 31% 14% 20% Vref A 97%100% 88% 92% 77% 83% 66% 71% 48% 55% 40% 31% 14% 20% Vref B A13269 No.6507-13/18 STK672-080-E Thermal Design <Hybrid IC Average Internal Power Loss Pd> The main elements internal to this hybrid IC with large average power losses are the current control devices, the regenerative current diodes, and the current detection resistor. Since sine wave drive is used, the average power loss during microstepping drive can be approximated by applying a waveform factor of 0.64 to the square wave loss during 2 phase excitation. The losses in the various excitation modes are as follows. 2 phase excitation ·fclock I Pd2EX = (Vsat+Vdf) · fclock · IOH · t2 + OH · (Vsat · t1+Vdf · t3) 2 2 1-2 phase excitation Pd1-2EX = 0.64 · {(Vsat+Vdf) · ·fclock I fclock · IOH · t2 + OH · (Vsat · t1+Vdf · t3)} 4 4 ·fclock I fclock ·IOH · t2 + OH · (Vsat · t1+Vdf · t3)} 8 8 W1-2 phase excitation PdW1-2EX = 0.64 · {(Vsat+Vdf) · ·fclock I 2W1-2 phase excitation Pd2W1-2EX = 0.64 · {(Vsat+Vdf) · fclock ·IOH · t2 + OH · (Vsat · t1+Vdf · t3)} 16 16 4W1-2 phase excitation Pd4W1-2EX = 0.64 · {(Vsat+Vdf) · I OH ·fclock fclock ·IOH · t2 + · (Vsat · t1+Vdf · t3)} 16 16 Here, t1 and t3 can be determined from the same formulas for all excitation methods. t1 = VCC 1 + 0.35 t3 = − L · n ( ) R I OH ·R + VCC 1 + 0.35 −L · n (1 – R + 0.35 · IOH) R + 0.35 VCC 1 However, the formula for t2 differs with the excitation method. 2 phase excitation t2 = W1-2 phase excitation t2 = 2 fclock – (t1+t3) 1-2 phase excitation 7 – t1 fclock t2 = 2W1-2 phase excitation 4W1-2 phase excitation 3 fclock t2 = – t1 15 – t1 fclock IOH t3 t1 t2 A13270 Motor Phase Current Model Figure (2 Phase Excitation) fclock Vsat Vdf IOH t1 t2 t3 : CLK input frequency (Hz) : The voltage drop of the power MOSFET and the current detection resistor (V) : The voltage drop of the body diode and the current detection resistor (V) : Phase current peak value (A) : Phase current rise time (s) VCC1 : Supply voltage applied to the motor (V) : Constant-current operating time (s) L : Motor inductance (H) : Phase switching current regeneration time (s) R : Motor winding resistance (Ω) No.6507-14/18 STK672-080-E <Determining the Size of the Hybrid IC Heat Sink> Determine θc-a for the heat sink from the average power loss determined in the previous item. Tc max: Hybrid IC substrate temperature (°C) Tc max Ta θc-a = [°C/W] Ta: Application internal temperature (°C) Pd EX PdEX: Hybrid IC internal average loss (W) Determine θc-a from the above formula and then size S (in cm2) of the heat sink from the graphs shown below. The ambient temperature of the device will vary greatly according to the air flow conditions within the application. Therefore, always verify that the size of the heat sink is adequate to assure that the Hybrid IC back surface (the aluminum plate side) will never exceed a Tc max of 105°C, whatever the operating conditions are. θc-a - Pd 16 12 nt 8 40° C 60 °C 4 50°C No. Fin 25.5 (°C/W) 0 0 2 4 6 10 12 14 16 2m mA l pl at e 10 7 (fla 5 t bl ack 3 (no sur Vertical standing type Natural convection air cooling sur f fac ace fin ish ) e fi nis h ) 2 1.0 8 θc-a - S 2 Heat sink thermal resistance, θc-a - °C/W θc-a= Tc max -- Ta (°C/W) Pd Tc max=105°C bie am ed nte ure ara rat Gu mpe te Heat sink thermal resistance, θc-a - °C/W 20 No. Fin 25.5 (°C/W) 10 IC internal average power loss, Pd - W 2 3 5 7 100 2 3 5 Heat sink surface area, S - cm2 Next we determine the usage conditions with no heat sink by determining the allowable hybrid IC internal average loss from the thermal resistance of the hybrid IC substrate, namely 25.5°C/W. For a Tc max of 105°C at an ambient temperature of 50°C PdEX = 105 - 50 = 2.15W 25.5 For a Tc max of 105°C at an ambient temperature of 40°C PdEX = 105 - 40 = 2.54W 25.5 This hybrid IC can be used with no heat sink as long as it is used at operating conditions below the losses listed above. (See ΔTc – Pd curve in the graph on page 17.) <Hybrid IC internal power element (MOSFET) junction temperature calculation> The junction temperature, Tj, of each device can be determined from the loss Pds in each transistor and the thermal resistance θj-c. Tj = Tc + θj-c × Pds (°C) Here, we determine Pds, the loss for each transistor, by determining PdEX in each excitation mode. Pds = PdEX/4 The steady-state thermal resistance θj-c of a power MOSFET is 15.6°C/W. No.6507-15/18 STK672-080-E fc - VCC2 53 51 51 PWM frequency, fc - kHz 53 49 47 45 43 41 47 45 43 41 39 37 37 4.5 5.0 5.5 1.2 0 =1 Tc 0.8 C 5° 5 =2 Tc °C 0.6 0.4 0.2 0.5 1.0 1.5 2.0 2.5 3.0 Motor current, IOH - A 40 60 80 100 Substrate temperature, Tc - °C 120 ITF02415 Vdf - IOH 1.4 C 25° Tc= 1.2 °C 105 Tc= 1.0 0.8 0.6 0.4 0.2 0 0 3.5 0.5 1.0 1.5 2.0 2.5 Motor current, IOH - A ITF02416 IOH - VCC1 2.5 20 1.6 1.4 1.0 0 ITF02414 Vsat - IOH 1.6 0 0 35 6.0 Supply voltage, VCC2 - V Output saturation voltage, Vsat - V 49 39 35 4.0 fc - Tc 55 Internal diode forward voltage, Vdf - V PWM frequency, fc - kHz 55 3.0 ITF02417 IOH - Tc 2.5 IOH=2 2.0 Motor current, IOH - A Motor current, IOH - A 2.0 1.5 1.0 1.5 IOH=1A 1.0 0.5 0.5 Vref=0 0 0 10 20 30 40 Motor voltage, VCC1 - V 0 50 0 20 40 IVref - Vref 350 =2 Tc 300 C 5° 250 200 150 100 50 0 0 80 100 120 ITF02419 IVref - Tc 450 Reference voltage input current, IVref - μA Reference voltage input current, IVref - μA 450 400 60 Substrate temperature, Tc - °C ITF02418 Vref=2.5V 400 350 Vref=2V 300 250 200 Vref=1V 150 100 50 0 0.5 1.0 1.5 Reference voltage, Vref - V 2.0 2.5 ITF02420 0 20 40 60 80 Substrate temperature, Tc - °C 100 120 ITF02421 No.6507-16/18 STK672-080-E Vref - IOH 2.0 Reference voltage, Vref - V Substrate temperature increase, ΔTc - °C Test motor: PK264-02B VCC1=24V 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 70 60 50 40 30 20 10 0 0 0 0.5 1.0 1.5 2.0 Motor current, IOH - V 0 2.5 0.5 1.0 1.5 2.0 2W1-2ex Motor current, IOH - A 3.0 40 2ex 30 20 10 VCC1 : 24V Test motor : PK264-02B Motor current : IOH : 2-phase excitation: 1.5A 2W1-2 phase excitation: 2A With no heat sink 0 100 2 3 5 7 1k 2 3 Ho ld 2.5 CLK frequency, PPS - Hz 2 3 5 7 100k ITF02424 3.5 00Hz mo de 2.0 1.5 1.0 Motor voltage: 24V Motor resistance (R): 0.4Ω Inductance (L): 1.2mH 0.5 5 7 10k 3.0 3.5 CLK ≥ 2 50 2.5 Hybrid IC internal average power dissipation, Pd - W ITF02423 Motor Current I OH Derating Curves vs. Operating Substrate Temperature Tc. ITF02422 Substrate Temperature Rise Test 60 Substrate temprature increase, ΔTc - °C ΔTc - Pd 80 0 0 20 40 60 80 100 Operating substrate temprature, Tc - °C 120 ITF02425 Notes • The current ranges shown above apply when the output voltage is not in the avalanche range. • The operating substrate temperature Tc values shown above are measured during motor operation. Since Tc varies with the ambient temperature Ta, the value of IOH, and whether IOH is continuous or intermittent, it must be measured in an actual operating system. No.6507-17/18 STK672-080-E SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of June, 2008. Specifications and information herein are subject to change without notice. PS No.6507-18/18