Ordering number : EN7815A Monolithic Linear IC LA6261 For Optical Disk Drive 6-Channel Driver (BTL: 4 channels, H bridge: 2 channels) Overview The LA6261 is a 6-channel driver IC that incorporates 4 channels of BTL output and 2 channels of H-bridge output. It is optimal for the actuator driver for CDs, MDs, and other optical disk drives. Features • Six power amplifier channels on a single chip (BTL: 4 channles, H-bridge: 2 channels) • IO max: 700mA (Each channel) • Built-in level shifter circuits (BTL amplifier ) • Built-in thermal protection (thermal shutdown) circuit • Separate power supply for H-bridge (2 channels) • Onchip 3.3V regulator controller (uses an external output transistor) • Adjustment pin for the H-bridge output Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Maximum output current Maximum input voltage Symbol Conditions Ratings VCC max IO max for each of the channel 1 to 6 Unit 14 V 0.7 A VINB 13 V MUTE pin voltage VMUTE 13 V Allowable power dissipation Pd max 0.8 W Independent IC 2 W Operating ambient temperature Topr Mounted on the specified board * -30 to +85 °C Storage ambient temperature Tstg -55 to +150 °C * Mounted on a specified board: 76.1mm×114.1mm×1.6mm, glass epoxy. Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings Unit 5.6 to 13 V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 11707 MS IM B8-7314 No.7815-1/7 LA6261 Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8V, VREF = 1.65V Parameter Symbol Ratings Conditions min typ Unit max All Blocks No-load current drain ON ICC-ON All outputs on *1, FWD=REV=0V VREF input voltage range VREF-IN 30 50 0.5 VCC-1.5 -50 +50 mA V BTL AMP Output offset voltage VOFF BTL amplifier, the voltage difference between mV each channel outputs Input voltage range VIN Applied to pins VIN1 to VIN4 0 Output voltage VO Voltage between VO+ and VO- for each 4 Closed-circuit voltage gain VG VCC V 5 V 4 deg channel when RL=8Ω *2 The gain from the input to the output MUTE ON voltage VMTON *3 2 SVCC MUTE OFF voltage VMTOFF *3 0 0.5 Slew rate SR For the independent amplifier. V V 0.5 V/µs 6.7 V Times 2 when between outputs *4 H-bridge Block Output voltage VO-LOAD Voltage between VO+ and VO- for each channel when RL=10Ω 6.2 Input low level VIN-L 0 1 V Input high level VIN-H 2 SVCC V Output setting voltage VCONT Voltage between VO+ and VO- for each channel when VCONT=3V and RL=10Ω 2.8 V Regulator Block Output voltage Vreg IL=100mA ∆VRL Output load variation ∆VVCC Supply voltage variation 3.05 3.3 3.55 V IL=0 to 200mA -50 0 10 mV VCC=6 to 12V, IL=100mA -15 21 60 mV *1: The total current dissipation for SVCC, PVCC1, and PVCC2 with no load *2: Output in the saturated state *3: When the MUTE pin is high, the BTL output will be on, and when low, the BTL output will be OFF (HI impedance). *4: Design guarantee value Package Dimensions unit : mm (typ) 3251 Pd max - Ta 17.8 (6.2) 19 1 2.0 18 0.3 0.25 2.45max (2.25) 0.8 2.7 0.1 (0.5) 0.65 (4.9) 7.9 10.5 36 Allowable power dissipation, Pd max - W 3.0 Mounted on a Specified board : 76.1mm×114.3mm×1.6mm, glass epoxy 2.5 2.0 Mounted on a specified board 1.5 1.0 1.04 Independent IC 0.8 0.5 0.42 0 --30 0 20 40 60 Ambient temperature, Ta - °C 80 100 ILA06754 SANYO : HSOP36R(375mil) No.7815-2/7 LA6261 Block Diagram 1 + -- -+ CH3 36 CH4 2 35 3 + -- -+ 34 4 33 -+ 5 32 Pre Drive CH2 6 CH5 31 -+ 7 30 8 29 -+ Pre Drive 9 CH1 28 CH6 -+ + -- VOLTAGE CONTROL AMP 10 27 BTL 22kΩ 11kΩ -+ 11 26 -+ 1kΩ 12 22kΩ -+ 11kΩ 22kΩ 11kΩ 15 -+ 24 Mode Select 1kΩ 14 BUFFER AMP for 1 / 2 VCC SVCC -+ 13 25 BUFFER AMP for VREF 23 22 Reference Voltage 1kΩ 16 21 22kΩ TSD 11kΩ 1kΩ 18 Mode Select -+ 17 Bandgap 20 19 ILA06744 No.7815-3/7 LA6261 Pin Description Pin No. Pin Name Description 1 VO3+ Channel 3 (BTL) output (+) 2 VO3- Channel 3 (BTL) output (-) 3 VO2+ Channel 2 (BTL) output (+) 4 VO2- Channel 2 (BTL) output (-) 5 VO1+ Channel 1 (BTL) output (+) 6 VO1- Channel 1 (BTL) output (-) 7 PGND Power system ground for channels 1 to 4 (BTL) 9 PVCC1 Power system power supply for channels 1 to 4 (BTL) 35 VO4+ Channel 4 (BTL) output (+) 36 VO4- Channel 4 (BTL) output (-) Equivalent Circuit Diagram Pin9 Pin 1 to 6, 35, 36 (shorted to SVCC) Pin7 8 REGIN Regulator (to the base of the external PNP transistor) SVCC 10kΩ PVCC Pin 8 100Ω PGND 10 REGOUT Regulator (to the collector of the external PNP transistor) PVCC Pin 10 PGND VIN1 Channel 1 input 12 VIN1G Channel 1 input (gain adjustment) 13 VIN2 Channel 2 input 14 VIN2G Channel 2 input (gain adjustment) 15 VIN3 Channel 3 input 16 VIN3G Channel 3 input (gain adjustment) 17 VIN4 Channel 4 input 18 VIN4G Channel 4 input (gain adjustment) PVCC 11kΩ Pin 11, 13, 15, 17 PGND 300Ω 11 PVCC 1kΩ 300Ω Pin 12, 14, 16, 18 PGND SGND FWD5 Channel 5 output direction switching (FWD), H-bridge logic input 20 REV5 H-bridge logic input 22 FWD6 REV6 Pin 19, 20, 22, 23 Channel 6 output direction switching (FWD), H-bridge logic input 23 PVCC Channel 5 output direction switching (REV), Channel 6 output direction switching (REV), PGND 50kΩ 50kΩ 19 SGND H-bridge logic input Continued on next page. No.7815-4/7 LA6261 Continued from preceding page. Pin No. Pin Name Description 21 VCONT5 Channel 5 output voltage setting 24 VCONT6 Channel 6 output voltage setting Equivalent Circuit Diagram PVCC Pin 21, 24 PGND PGND 25 VREFIN Reference voltage input PVCC 300Ω 300Ω Pin 25 PGND SGND 28 PVCC2 Power system power supply for for channels 5 and 6 (H-bridge) 30 PGND2 Power system ground for channels 5 and 6 (H-bridge) 31 VO6+ Channel 6 (H-bridge) output (+) 32 VO6- Channel 6 (H-bridge) output (-) 33 VO5+ Channel 5 (H-bridge) output (+) 34 VO5- Channel 5 (H-bridge) output (-) Pin 28 Pin 31, 32 33, 34 Pin 30 29 MUTE BTL mute signal input PVCC 100kΩ PGND 26 SGND Signal system ground 27 SVCC Signal system power supply (shorted to PVCC1) 100kΩ Pin 29 SGND Truth Table INPUT OUTPUT FWD5(6) REV5(6) VO5(6)+ VO5(6)- L L Z Z L H H L H L L H H H L L *Z: HI-Impedance No.7815-5/7 LA6261 Sample Application Circuit 36 2 VO3-- VO4+ 36 3 VO2+ VO5-- 34 4 VO2-- VO5+ 33 5 VO1+ VO6-- 32 6 VO1-- VO6+ 31 7 PGND1 PGND2 30 8 REGIN MUTE 29 9 PVCC1 PVCC2 28 10 REGOUT SVCC 27 + SGND 26 -- VREFIN 25 VCONT6 24 M VO4-- TRACKING COIL FOCUS COIL SLED MOTOR LOADING MOTOR M VO3+ M 1 M SPINDLE MOTOR CHANGER MOTOR -- -+ INPUT + 3.3V Regulated Voltage + -- INPUT INPUT 11 VIN1 12 VIN1G 13 VIN2 14 VIN2G REV6 23 INPUT 15 VIN3 FWD6 22 INPUT 16 VIN3G VCONT5 21 INPUT 17 VIN4 REV5 20 INPUT 18 VIN4G FWD5 19 INPUT 1.65V INPUT INPUT ILA06743 No.7815-6/7 LA6261 Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. 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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of January, 2007. Specifications and information herein are subject to change without notice. PS No.7815-7/7