Ordering number : EN7946A
Monolithic Digital IC
LB11946
PWM Current Control
Stepping Motor Driver
Overview
The LB11946 is a stepping motor driver IC that implements PWM current control bipolar drive with a fixed off time. This
IC features 15 current setting levels using a fixed VREF voltage and support for micro-stepping drive from 1-2 phase
excitation drive to 4W1-2 phase excitation drive. This device is optimal for driving stepping motors such as those used for
carriage drive and paper feed in printers.
Features
• PWM current control (with a fixed off time)
• Logic input serial-parallel converter (allows 1-2, W1-2, 2W1-2, and 4W1-2 phase excitation drive)
• Current attenuation switching function (with slow decay, fast decay, and mixed decay modes)
• Built-in upper and lower side diodes
• Simultaneous on state prevention function (through current prevention)
• Noise canceller function
• Thermal shutdown circuit
• Shutoff on low logic system voltage circuit
• Low-power mode control pin
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Motor supply voltage
VBB
Peak output current
IO peak
Continuous output current
IO max
Logic system supply voltage
VCC
Logic input voltage range
VIN
Emitter output voltage
VE
Conditions
tw ≤ 20µS
Ratings
Unit
50
V
1.2
A
1.0
A
7.0
V
-0.3 to VCC
V
VCC = 5V specifications
1.0
V
VCC = 3.3V specifications
0.5
V
3.0
W
Allowable power dissipation
Pd max
Operating temperature
Topr
Independent IC
-25 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
22509 MS 20090212-S00006 / N2206 / 73004TN(OT) No.7946-1/14
LB11946
Recommended Operating Conditions at Ta = 25°C
Parameter
Symbol
Motor supply voltage
VBB
Logic system supply voltage
VCC
Reference voltage
VREF
Conditions
Ratings
Unit
10 to 45
V
VCC = 5V specifications
4.5 to 5.5
V
VCC = 3.3V specifications
3.0 to 3.6
V
VCC = 5V specifications
0.0 to 3.0
V
VCC = 3.3V specifications
0.0 to 1.0
V
Electrical Characteristics at Ta = 25°C, VCC = 5V, VBB = 42V, VREF = 1.52V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Output Block
Output stage supply current
IBB ON
0.9
1.3
1.7
mA
Output saturation voltage
VO(sat) 1
IO = +0.5A (sink)
0.7
1.05
mA
1.1
1.4
VO(sat) 2
IO = +1.0A (sink)
V
1.4
1.7
V
VO(sat) 3
VO(sat) 4
IO = -0.5A (source)
1.9
2.2
V
IO = -1.0A (source)
2.2
2.5
Output leakage current
IO1 (leak)
VO = VBB (sink)
V
50
µA
IO2 (leak)
VO = 0V (source)
-50
µA
Output sustain voltage
VSUS
L = 15mH, IO = 1.0A, Design guarantee *
45
V
D0 = 1, D1 = 1, D2 = 1, D3 = 1 When these data
24
35
46
mA
22
32
42
mA
0.05
0.1
mA
IBB OFF
0.52
Logic Block
Logic system supply current
ICC ON
values are set
Input voltage
ICC OFF1
D0 = 0, D1 = 0, D2 = 0, D3 = 0
ICC OFF2
ST = LOW
VIH
2
V
VIL
Input current
IIH
VIH = 2 V
IIL
VIL = 0.8 V
Sense voltages
VE
D0 = 1, D1 = 1, D2 = 1, D3 = 1 When these data
0.8
V
35
µA
µA
6
0.470
0.50
0.525
V
D0 = 1, D1 = 1, D2 = 1, D3 = 0
0.445
0.48
0.505
V
D0 = 1, D1 = 1, D2 = 0, D3 = 1
0.425
0.46
0.485
V
D0 = 1, D1 = 1, D2 = 0, D3 = 0
0.410
0.43
0.465
V
D0 = 1, D1 = 0, D2 = 1, D3 = 1
0.385
0.41
0.435
V
D0 = 1, D1 = 0, D2 = 1, D3 = 0
0.365
0.39
0.415
V
D0 = 1, D1 = 0, D2 = 0, D3 = 1
0.345
0.37
0.385
V
D0 = 1, D1 = 0, D2 = 0, D3 = 0
0.325
0.35
0.365
V
D0 = 0, D1 = 1, D2 = 1, D3 = 1
0.280
0.30
0.325
V
D0 = 0, D1 = 1, D2 = 1, D3 = 0
0.240
0.26
0.285
V
D0 = 0, D1 = 1, D2 = 0, D3 = 1
0.195
0.22
0.235
V
D0 = 0, D1 = 1, D2 = 0, D3 = 0
0.155
0.17
0.190
V
D0 = 0, D1 = 0, D2 = 1, D3 = 1
0.115
0.13
0.145
V
D0 = 0, D1 = 0, D2 = 1, D3 = 0
0.075
0.09
0.100
V
-1.2
-0.8
values are set
Reference current
IREF
VREF = 1.5V
-0.5
CR pin current
ICR
CR = 1.0V
-1.6
MD pin current
IMD
MD = 1.0V, CR = 4.0V
-5.0
µA
mA
µA
Logic system on voltage
VLSDON
2.6
2.8
3.0
V
Logic system off voltage
VLSDOFF
2.45
2.65
2.85
V
LVSD hysteresis
VLHIS
0.03
0.15
0.35
V
Thermal shutdown temperature
Ts
Design guarantee *
170
°C
*Design guarantee: Design guarantee value, Do not measurement.
No.7946-2/14
LB11946
AC Electrical Characteristics at VCC = 5V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Clock frequency
Fclk
Data setup time
TDS
0.9
200
2.5
550
kHz
µS
Data hold time
TDH
0.9
2.5
µS
Minimum clock high-level pulse width
TSCH
0.9
2.5
µS
Minimum clock low-level pulse width
TSCL
0.9
2.5
µS
SET pin stipulated time
Tlat
0.9
2.5
µS
SET pin signal pulse width
Tlatw
1.9
5.0
µS
Fclk
TSCH TSCL
CLK
TSD TDH
DATA
D4
D5
D6
D10
D11
Tlat
SET
Tlatw
No.7946-3/14
LB11946
Electrical Characteristics at Ta = 25°C, VCC = 3.3V, VBB = 42V, VREF = 1.0V
(When measuring the sense voltage: VREF = 1.03V)
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Output Block
Output stage supply current
Output saturation voltage
IBB ON
0.9
1.3
1.7
mA
IBB OFF
0.52
0.7
1.05
mA
VO(sat) 1
IO = +0.5A (sink)
1.2
1.5
V
VO(sat) 2
IO = +1.0A (sink)
1.5
1.8
V
VO(sat) 3
IO = -0.5A (source)
2.0
2.3
V
2.3
2.6
V
50
µA
VO(sat) 4
IO = -1.0A (source)
Output leakage current
IO1 (leak)
VO = VBB (sink)
IO2 (leak)
VO = 0V (source)
-50
µA
Output sustain voltage
VSUS
L = 15mH IO-1.5A, Design guarantee *
45
V
ICC ON
D0 = 1, D1 = 1, D2 = 1, D3 = 1
21
Logic Block
Logic system supply current
30
39
28
36.5
mA
0.03
0.1
mA
When these data values are set
Input voltage
ICC OFF1
D0 = 0, D1 = 0, D2 = 0, D3 = 0
ICC OFF2
ST = 0.8V
VIH
19
2
V
VIL
Input current
Sense voltages
mA
0.8
V
35
µA
IIH
VIH = 2V
IIL
VIL = 0.8V
VE
D0 = 1, D1 = 1, D2 = 1, D3 = 1 VREF = 1.03V
0.303
0.330
0.356
V
D0 = 1, D1 = 1, D2 = 1, D3 = 0 VREF = 1.03V
0.290
0.315
0.341
V
D0 = 1, D1 = 1, D2 = 0, D3 = 1 VREF = 1.03V
0.276
0.300
0.324
V
D0 = 1, D1 = 1, D2 = 0, D3 = 0 VREF = 1.03V
0.263
0.286
0.309
V
D0 = 1, D1 = 0, D2 = 1, D3 = 1 VREF = 1.03V
0.250
0.272
0.294
V
D0 = 1, D1 = 0, D2 = 1, D3 = 0 VREF = 1.03V
0.236
0.257
0.278
V
D0 = 1, D1 = 0, D2 = 0, D3 = 1 VREF = 1.03V
0.223
0.243
0.263
V
D0 = 1, D1 = 0, D2 = 0, D3 = 0 VREF = 1.03V
0.209
0.228
0.247
V
D0 = 0, D1 = 1, D2 = 1, D3 = 1 VREF = 1.03V
0.183
0.200
0.217
V
D0 = 0, D1 = 1, D2 = 1, D3 = 0 VREF = 1.03V
0.155
0.170
0.185
V
D0 = 0, D1 = 1, D2 = 0, D3 = 1 VREF = 1.03V
0.128
0.143
0.158
V
D0 = 0, D1 = 1, D2 = 0, D3 = 0 VREF = 1.03V
0.102
0.114
0.126
V
D0 = 0, D1 = 0, D2 = 1, D3 = 1 VREF = 1.03V
0.074
0.085
0.096
V
D0 = 0, D1 = 0, D2 = 1, D3 = 0 VREF = 1.03V
0.047
0.057
0.067
Reference current
IREF
VREF = 1.0V
CR pin current
ICR
CR = 1.0V
MD pin current
IMD
MD = 1.0V, CR = 4.0V
LVSD voltage
VLSDON
Logic system off voltage
VLSDOFF
LVSD hysteresis
VLHIS
Thermal shutdown temperature
Ts
Design guarantee *
µA
6
-0.91
V
µA
-0.5
-0.7
-0.49
2.6
2.8
3.0
V
2.45
2.65
2.85
V
0.03
0.15
0.35
mA
µA
-5.0
170
V
°C
*Design guarantee: Design guarantee value, Do not measurement.
No.7946-4/14
LB11946
AC Electrical Characteristics at VCC = 3.3V
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Clock frequency
Fclk
Data setup time
TDS
0.9
200
2.5
550
kHz
µS
Data hold time
TDH
0.9
2.5
µS
Minimum clock high-level pulse width
TSCH
0.9
2.5
µS
Minimum clock low-level pulse width
TSCL
0.9
2.5
µS
SET pin stipulated time
Tlat
0.9
2.5
µS
SET pin signal pulse width
Tlatw
1.9
5.0
µS
Fclk
TSCH TSCL
CLK
TSD TDH
DATA
D4
D5
D6
D10
D11
Tlat
SET
Tlatw
No.7946-5/14
LB11946
Package Dimensions
unit : mm (typ)
3147C
15
12.7
11.2
R1.7
0.4
8.4
28
1
14
20.0
4.0
4.0
26.75
(1.81)
1.78
1.0
0.6
SANYO : DIP28H(500mil)
Pd max -- Ta
Allowable power dissipation, Pd max -- W
3.5
3.0
Independent IC
2.0
2.0
1.56
1.5
1.0
0.5
0
-25
0
25
50
75
85
100
Ambient temperature, Ta -- °C
VCC
VREF1
NC
CR1
MD
CLK
DATA
SET
ST
NC
CR2
NC
VREF2
GND
Pin Assignment
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VBB
NC
E1
D-GNDA
NC
OUTA
OUTA
OUTB
OUTB
NC
D-GNDB
E2
NC
VBB
LB11946
Note: The D-GNDA and D-GNDB pins are the anode sides of the lower side diodes
No.7946-6/14
LB11946
Timing Chart
TSCH
CLOCK
TSCL
DATA
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
SET
Serially Transferred Data Definition
No.
IA4
IA3
IA2
IA1
DE1
PH1
IB4
IB3
IB2
IB1
DE2
PH2
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
Output mode
OUTA
OUTA
OUTB
I/O
DEC
OUTB
ratio
MODE
0
1
1
1
1
1
1
1
1
1
1
1
1
H
L
H
L
100%
SLOW
1
1
1
1
0
1
1
1
1
1
0
1
1
H
L
H
L
96
SLOW
2
1
1
0
1
1
1
1
1
0
1
1
1
H
L
H
L
91
SLOW
3
1
1
0
0
1
1
1
1
0
0
1
1
H
L
H
L
87
SLOW
4
1
0
1
1
1
1
1
0
1
1
1
1
H
L
H
L
83
SLOW
5
1
0
1
0
1
1
1
0
1
0
1
1
H
L
H
L
78
SLOW
6
1
0
0
1
1
1
1
0
0
1
1
1
H
L
H
L
74
SLOW
7
1
0
0
0
1
1
1
0
0
0
1
1
H
L
H
L
70
SLOW
8
0
1
1
1
1
1
0
1
1
1
1
1
H
L
H
L
61
SLOW
9
0
1
1
0
1
1
0
1
1
0
1
1
H
L
H
L
52
SLOW
10
0
1
0
1
1
1
0
1
0
1
1
1
H
L
H
L
44
SLOW
11
0
1
0
0
1
1
0
1
0
0
1
1
H
L
H
L
35
SLOW
12
0
0
1
1
1
1
0
0
1
1
1
1
H
L
H
L
26
SLOW
13
0
0
1
0
1
1
0
0
1
0
1
1
H
L
H
L
17
SLOW
14
1
1
1
1
0
0
1
1
1
1
0
0
L
H
L
H
100
FAST
15
1
1
1
0
0
0
1
1
1
0
0
0
L
H
L
H
96
FAST
16
1
1
0
1
0
0
1
1
0
1
0
0
L
H
L
H
91
FAST
17
1
1
0
0
0
0
1
1
0
0
0
0
L
H
L
H
87
FAST
18
1
0
1
1
0
0
1
0
1
1
0
0
L
H
L
H
83
FAST
19
1
0
1
0
0
0
1
0
1
0
0
0
L
H
L
H
78
FAST
20
1
0
0
1
0
0
1
0
0
1
0
0
L
H
L
H
74
FAST
21
1
0
0
0
0
0
1
0
0
0
0
0
L
H
L
H
70
FAST
22
0
1
1
1
0
0
0
1
1
1
0
0
L
H
L
H
61
FAST
23
0
1
1
0
0
0
0
1
1
0
0
0
L
H
L
H
52
FAST
24
0
1
0
1
0
0
0
1
0
1
0
0
L
H
L
H
44
FAST
25
0
1
0
0
0
0
0
1
0
0
0
0
L
H
L
H
35
FAST
26
0
0
1
1
0
0
0
0
1
1
0
0
L
H
L
H
26
FAST
27
0
0
1
0
0
0
0
0
1
0
0
0
L
H
L
H
17
FAST
28
0
0
0
0
*
*
0
0
0
0
*
*
OFF
OFF
OFF
OFF
0
-
Note *: Either 0 or 1.
Note *1: In mixed decay mode, set D4 and D10 to 0 and set the MD pin to a level in the range 1.5 to 4.0V.
No.7946-7/14
LB11946
Current Settings Truth Table * Items in parentheses are defined by the serial data.
IA4
IA3
IA2
IA1
(D0)
(D1)
(D2)
(D3)
1
1
1
1
11.5/11.5 × VREF/3.04RE = Iout
100
1
1
1
0
11.0/11.5 × VREF/3.04RE = Iout
95.65
1
1
0
1
10.5/11.5 × VREF/3.04RE = Iout
91.30
1
1
0
0
10.0/11.5 × VREF/3.04RE = Iout
86.95
1
0
1
1
9.5/11.5 × VREF/3.04RE = Iout
82.61
1
0
1
0
9.0/11.5 × VREF/3.04RE = Iout
78.26
1
0
0
1
8.5/11.5 × VREF/3.04RE = Iout
73.91
1
0
0
0
8.0/11.5 × VREF/3.04RE = Iout
69.56
0
1
1
1
7.0/11.5 × VREF/3.04RE = Iout
60.87
0
1
1
0
6.0/11.5 × VREF/3.04RE = Iout
52.17
0
1
0
1
5.0/11.5 × VREF/3.04RE = Iout
43.48
0
1
0
0
4.0/11.5 × VREF/3.04RE = Iout
34.78
0
0
1
1
3.0/11.5 × VREF/3.04RE = Iout
26.08
0
0
1
0
2.0/11.5 × Vref/3.04RE = Iout
17.39
Set current Iout
Current ratio (%)
Note: The current ratios shown are calculated values.
Block Diagram
OUTA
OUTA
VBB
OUTB
OUTB
VCC
MD
ST
Control
logic
circuit
Control
logic
circuit
D-GND
D-GND
Thermal
shutdown
circuit
VREF1
Current
selection
circuit
One-shot
multivibrator
Blanking
time
One-shot
multivibrator
Blanking
time
Serial-parallel
converter
VREF
Current
selection
circuit
GND
CR1
E1
CLK DATA SET
E2
CR2
No.7946-8/14
LB11946
0.1µF
1.5V
680pF
30kΩ
680pF
30kΩ
5V
10µF
Sample Application Circuit at VCC = 5V
23
22
21
20
VREF1
NC
CR1
MD
CLK
DATA
SET
ST
19
18
17
15
NC
E1
D-GNDA
NC
OUTA
OUTA
OUTB
OUTB
NC
D-GNDB
E2
NC
VBB
LB11946
16
GND
24
VREF2
25
NC
26
CR2
27
NC
28
VBB
MD voltage setting
(1.6 to 3.9V)
Fast mode: GND
Slow mode: VCC
VCC
Logic level input
1
2
3
4
5
6
7
8
9
10
11
12
13
14
47µF
42V
1Ω
1Ω
M
0.1µF
1..0V
680pF
30kΩ
680pF
30kΩ
3.3V
10µF
Sample Application Circuit at VCC = 3.3V
23
22
21
20
VREF1
NC
CR1
MD
CLK
DATA
SET
ST
19
17
16
15
VBB
NC
E1
D-GNDA
NC
OUTA
OUTA
OUTB
OUTB
NC
D-GNDB
E2
NC
VBB
LB11946
18
GND
24
VREF2
25
NC
26
CR2
27
NC
28
VCC
Logic level input
1
2
3
4
5
6
7
8
9
10
11
12
13
14
47µF
42V
1Ω
M
1Ω
MD voltage setting
(1.2 to 2.5V)
Fast mode: GND
Slow mode: VCC
No.7946-9/14
LB11946
SLOW DECAY Current Path
The reregenerative current at upper-side transistor switching operates
VBB
Current path at output ON
Regenerative current
at upper-side transistor OFF
ON
OFF
I
OUTA
OUTA
SBD
SBD
ON
constant
Output OFF
VE
Sensing voltage comparator
Motor current I
I = VE/Re
VREF
Re
VREF
Internal reference voltage
by setting voltage circuit
3.04
Fig.1
FAST DECAY Current Path
VBB
Current path at output ON
ON
OFF
Current path at Fast DECAY
OUTA
OUTA
SBD
SBD
ON
OFF
VE
Sensing voltage comparator
VREF
Re
VREF
3.04
Fig.2
No.7946-10/14
LB11946
Switching Time Chart at PWM operation
SLOW DECAY (Upper-side Chopping)
Serial transmission data (D4, D10) = High
MD pin: Low setting
E pin
Output
current
tn
CR pin
OUT pin
Switching waveform
FAST DECAY
Serial transmission data (D4, D10) = Low
MD pin: Low setting
Spike noise
E pin
Output
current
CR pin
OUT pin
Switching waveform
No.7946-11/14
LB11946
MIX DECAY
Spike noise
tm
E pin
Output
current
tn
MD pin
voltage
CR pin
t on
OUT pin
t off
Switching waveform
MIX DECAY logic setting
serial transmission data (D4, D10) = Low
MD pin: 1.6V to 3.0V at VCC = 5V specification.
1.2V to 2.5V at VCC = 3.3V specification.
t on: Output ON time
t off: Output OFF time
tm: FAST DECAY time at MIX DECAY mode
tn: Noise cancel time
The following operation by comparison between CR voltage and MD pin voltage in turning off time.
CR voltage > MD pin voltage: both sides chopping
CR voltage < MD pin voltage: upper side chopping
No.7946-12/14
LB11946
Attached Documents
1. Switching Off Time and Noise Canceller Time Calculations
Notes on the CR Pin Setting (switching off time and noise canceller time)
The noise canceller time (Tn) and the switching off time (Toff) are set using the following formulas.
(1) When VCC is 5 V
Noise canceller time (Tn)
Tn ≈ C × R × ln {(1.5 − RI) / (4.0 − RI)}[s]
CR pin charge current: 1.25mA
Switching off time (Toff)
Toff ≈ −C × R × ln (1.5/4.8)[s]
Component value ranges
R: 5.6kΩ to 100kΩ
C: 470pF to 2000pF
(2) When VCC is 3.3 V
Noise canceller time (Tn)
Tn ≈ C × R × ln {(1.06 − RI) / (2.66 − RI)}[s]
CR pin charge current: 0.7 mA
Switching off time (Toff)
Toff ≈ −C × R × ln (1.06 / 3.1)[s]
CR Pin Internal Circuit Structure
VCC line
One-shot multivibrator
Blanking time circuit
CR pin
R:30kΩ
C:680pF
E1
2. Notes on the MD Pin
(1) If slow decay mode is set up by setting the D4 and D10 bits in the input serial data to 1, the MD pin must be shorted
to ground.
(2) If fast decay mode is set up by setting the D4 and D10 bits in the input serial data to 0, mixed decay mode can be
set with the MD pin.
When the VCC = 5V specifications are used the setting voltage range for mixed decay mode is 1.6 to 3.9V.
When the VCC = 3.3V specifications are used the setting voltage range for mixed decay mode is 1.2 to 2.5V.
If mixed decay mode will not be used with the fast decay mode setting, either:
(a) Short the MD pin to ground to select fast decay mode, or
(b) Short the MD pin to VCC to select slow decay mode.
No.7946-13/14
LB11946
Usage Notes
(1) Notes on the VREF pin
Since the VREF pin inputs the reference voltage used to set the current, applications must be designed so that noise
does not occur at this pin.
(2) Notes on the ground pins
Since this IC switches large currents, care is required with respect to the ground pins.
The PCB pattern in sections where large currents flow must be designed with low impedances and must be kept
separate from the small-signal system.
In particular, the ground terminals of the E1 and E2 pin sense resistors (Re) and the external Schottky barrier diode
ground terminals must be located as close as possible to the IC ground. The capacitors between VCC and ground
and between VBB and ground must be as close as possible to the corresponding VCC and VBB pin in the pattern.
(3) Power on sequence
When turning the power systems on
VCC → logic level inputs (CLK, DATA, SET, and ST) → VREF → VBB
When turning the power systems off
VBB → VREF logic level inputs (CLK, DATA, SET, and ST) → VCC
Note that if the power supply for the logic level inputs is on when the VCC power supply is off, a bias with an unstable
state will be applied due to the protection diodes at the VCC pins, and this can cause incorrect operation.
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PS No.7946-14/14