Ordering number : ENN7229 Monolithic Digital IC LB11920 Three-Phase Brushless Motor Driver for Office Equipment Applications Overview Package Dimensions The LB11920 is a direct PWM drive motor driver IC for 3-phase power brushless motors. The PWM duty can be controlled by IC inputs, and it can be used over the wide supply voltage range of 9.5 to 30 V. unit: mm 3147C-DIP28H (500mil) [LB11920] 28 15 12.7 11.2 0.4 R1.7 1 14 20.0 26.75 4.0 Three-phase bipolar drive (35 V, 3.5 A) Direct PWM drive Built-in high and low side kickback absorbing diodes Braking function (short-circuit braking) Built-in forward/reverse direction switching circuit Full complement of built-in protection circuits, including current limiter, low-voltage protection, motor lock (physical constraint) protection, and thermal protection circuits • The PWM duty can be controlled by IC inputs 4.0 • • • • • • 8.4 Functions and Features (1.81) 1.78 0.6 1.0 SANYO: DIP-28H Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage 1 VM max 35 V Supply voltage 2 VCC max 7 V Output voltage VOUT max Output current IO max OUT1 to OUT3 35 V T ≤ 500 ms 3.5 A 3 W Allowable power dissipation 1 Pd max1 Independent IC Allowable power dissipation 2 Pd max2 With an infinitely large heat sink. 20 W Operating temperature Topr –20 to +80 °C Storage temperature Tstg –55 to +150 °C Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN O3003SI (OT) No. 7229-1/10 LB11920 Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage range 1 VM 9.5 to 30 V Supply voltage range 2 VCC 4.5 to 5.5 V HP pin applied voltage VHP 0 to 32 V HP pin output current IHP 0 to 3 mA Electrical Characteristics at Ta = 25°C, VM = RF = 27 V, VCC = 5 V Parameter Symbol Conditions Ratings min typ max Unit Supply current 1 IVCC-1 VCC pin 9 13 mA Supply current 2 IVCC-2 VCC pin at stop mode 2.0 3.0 mA Output saturation voltage 1 VO sat1 IO = 1.0 A, VO (SINK) + VO (SOURCE) 1.7 2.4 V Output saturation voltage 2 VO sat2 IO = 2.0 A, VO (SINK) + VO (SOURCE) 2.0 2.9 V Output saturation voltage 3 VO sat3 IO = 3.0 A, VO (SINK) + VO (SOURCE) 2.4 3.5 V Output leakage current IO leak 100 µA [Output block] Output delay time 1 td1 PWMIN “H” → “L” 1.25 2.5 µs Output delay time 2 td2 PWMIN “L” → “H” 1.8 3.6 µs Lower diode forward 1 VD1-1 ID = –1.0 A 1.1 1.5 V Lower diode forward 2 VD1-2 ID = –2.0 A 1.3 1.9 V Lower diode forward 3 VD1-3 ID = –3.0 A 1.5 2.3 V Upper diode forward 1 VD2-1 ID = 1.0 A 1.3 1.7 V Upper diode forward 2 VD2-2 ID = 2.0 A 2.0 2.7 V Upper diode forward 3 VD2-3 ID = 3.0 A 2.7 3.7 V [Hall Amplifier Block] Input bias current IHB –2 Common-mode input voltage range 1 VICM1 Hall device used Common-mode input voltage range 2 VICM2 For input one-side bias (Hall IC application) Hall input sensitivity at differential input –0.1 µA 0.5 VCC – 2.0 0 VCC 50 V V mVp-p Hysteresis width ∆VIN 20 30 50 mV Input voltage L → H VSLH 5 15 25 mV Input voltage H → L VSHL –25 –15 –5 mV Output H level voltage VOH (PWM) 2.75 3.0 3.25 Output L level voltage VOL (PWM) 1.0 1.2 1.3 V VPWM = 2.1 V –60 –45 –30 µA C = 1000 pF 15.8 20 24.2 kHz 1.6 1.8 2.1 Vp-p 3.6 3.9 4.2 V –15 –11 –7 µA [PWM oscillator] External C charge current ICHG (PWM) Oscillator frequency f (PWM) Amplitude V (PWM) V [CSD circuit] Operating voltage External C charge current Operating time VOH (CSD) ICHG (CSD) T (CSD) VCSD = 0V C = 10 µF *Design target value Note: *This parameter is a design target value and is not measured. 3.5 s Continued on next page. No. 7229-2/10 LB11920 Continued from preceding page. Parameter Symbol Conditions Ratings min typ max Unit [HP pin] Output low level voltage VOL (HP) IHP = 2 mA Output leakage current Ileak (HP) VHP = 30 V 0.1 0.4 V 10 µA [Thermal shutdown operation] Thermal shutdown operating temperature TTSD *Design target value (junction temperature) Hysteresis width ∆TSD *Design target value (junction temperature) 150 180 °C 45 °C [Current limiter circuit(RF pin)] Limiter voltage VRF 0.45 0.5 0.55 V V [Low-voltage protection circuit] Operating voltage VSDL 3.6 3.8 4.0 Release voltage VSDH 4.1 4.3 4.5 V Hysteresis width ∆VSD 0.35 0.5 0.65 V [PWMIN pin] Input frequency f (PI) 50 kHz H level input voltage VIH (PI) 2.0 VCC V L level input voltage VIL (PI) 0 1.0 V Input open voltage VIO (PI) VCC – 0.5 VCC V Hysteresis width VIS (PI) 0.15 0.25 0.35 V H level input current IIH (PI) VPWMIN = VCC –10 0 10 µA L level input current IIL (PI) VPWMIN = 0 V –116 –87 –58 µA V [S/S pin] H level input voltage VIH (SS) 2.0 VCC L level input voltage VIL (SS) 0 1.0 V Input open voltage VIO (SS) VCC – 0.5 VCC V Hysteresis width VIS (SS) 0.15 0.25 0.35 V H level input current IIH (SS) VS/S = VCC –10 0 10 µA L level input current IIL (SS) VS/S = 0 V –116 –87 –58 µA V [F/R pin] H level input voltage VIH (FR) 2.0 VCC L level input voltage VIL (FR) 0 1.0 V Input open voltage VIO (FR) VCC – 0.5 VCC V Hysteresis width VIS (FR) 0.15 0.25 0.35 V H level input current IIH (FR) VF/R = VCC –10 0 10 µA L level input current IIL (FR) VF/R = 0 V –116 –87 –58 µA [BR pin] H level input voltage VIH (BR) 2.0 VCC V L level input voltage VIL (BR) 0 1.0 V Input open voltage VIO (BR) VCC – 0.5 VCC V Hysteresis width VIS (BR) 0.15 0.25 0.35 V H level input current IIH (BR) VBR = VCC –10 0 10 µA L level input current IIL (BR) VBR = 0 V –116 –87 –58 µA Note: *This parameter is a design target value and is not measured. No. 7229-3/10 LB11920 Pd max — Ta Allowable power dissipation, Pdmax — W 24 With an infinitely large heat sink 20 16 12 8 4 3 Without any heat sink 0 –20 0 20 40 60 80 Ambient temperature, Ta — °C 100 ILB01545 Truth Table Source F/R = “L” Sink F/R = “H” IN1 IN2 IN3 IN1 IN2 IN3 1 OUT2 → OUT1 H L H L H L 2 OUT3 → OUT1 H L L L H H 3 OUT3 → OUT2 H H L L L H 4 OUT1 → OUT2 L H L H L H 5 OUT1 → OUT3 L H H H L L 6 OUT2 → OUT3 L L H H H L PWMIN Pin S/S Pin Input state IC state Input state IC state High or open Stopped High or open Output off L Start L Output on Input state IC state BR Pin High or open — L Brake state The PWMIN pin must be held at the low-level voltage when this IC is operated with a voltage applied to the TOC pin. Pin Assignment OUT1 NC GND2 VM RF GND3 IN3+ IN3– IN2+ IN2– IN1+ IN1– CSD TOC 28 27 26 25 24 23 22 21 20 19 18 17 16 15 13 14 LB11920 1 OUT2 2 3 OUT3 GND2 4 5 6 7 8 9 10 11 12 NC VM RF HP BR PWMIN F/R S/S VCC GND1 PWM Top view No. 7229-4/10 5V VCC + S/S S/S VREF RESET OSC PWM + PWMIN IN PWM F/R F/R BR BR VCC HP H IN1 H IN2 IN3 H HALL HYS AMP HALL LOGIC LOGIC + PWM TOC – CIRCUIT CSD DRIVER TSD GND2 OUT3 OUT2 OUT1 RF LIM Rf 27 V CURR VM + GND3 GND1 LVSD CSD LB11920 Equivalent Circuit Block Diagram No. 7229-5/10 LB11920 Pin Functions Pin No. Pin Function Equivalent circuit VM 28 OUT1 1 OUT2 2 OUT3 3, 26 GND2 5, 25 VM 6, 24 RF 300 Ω Motor drive output pin RF 5 25 6 24 1 2 3 26 Output GND pin Power pin 28 Output Tr power and output current detector pins, which connect low resistance (Rf) to VM. The output current is restricted to the current value set with IOUT = VRF/Rf. VCC 7 7 HP Hall element signal three-phase composite output. Withstand voltage 35 V max. 8 BR 50 kΩ VCC Brake input pin. “L” for brake and “H” or open for normal rotation. 3.5 kΩ 8 9 PWM IN 50 kΩ VCC PWM pulse input pin. L for output drive and H or open for output OFF 3.5 kΩ 9 10 F/R Forward/reverse input pin 50 kΩ VCC 3.5 kΩ 10 Continued on next page. No. 7229-6/10 LB11920 Continued from preceding page. Pin No. Pin Function Equivalent circuit VCC S/S 50 kΩ Start/stop control pin. 11 Start with L and stop with H or in the open condition 3.5 kΩ 11 12 VCC 13 GND1 Control circuit power pin GND pin (control circuit block) VCC PWM Pin to set the PWM oscillation frequency. 200 Ω Connect a capacitor between this pin and GND. 14 2 kΩ 14 VCC PWM waveform comparator pin. TOC Normally use with “L” or open. To control the output duty by applying the voltage to this pin without using the PWMIN pin, set the PWMIN pin to “L”. 15 50 kΩ 15 VCC Pin to set the operation time of motor lock protection circuit. CSD Insertion of a capacitor (about 10 µF) between CSD and GND enables setting of the protection operation time of about 3.5 sec. 300 Ω 500 Ω 16 16 Continued on next page. No. 7229-7/10 LB11920 Continued from preceding page. Pin No. Pin Function Equivalent circuit VCC 18 IN1+ 17 IN1– Hall amplifier input. 20 IN2+ 19 IN2– IN+ > IN– is the input high state, and the reverse is the input low state. 22 IN3+ 21 IN3– 23 GND3 4 27 NC Connect a capacitor between the IN+ and IN– inputs if there is noise in the Hall sensor signals. 18 20 22 300 Ω 300 Ω 19 21 23 SUBGND pin to connect to GND1 that is GND of the control circuit NC pin that can be used for wiring. LB11920 Function Description 1. Output drive circuit This IC is of a direct PWM drive type that suffers less power loss at the output. On the basis of the signal (“H” level for OFF and “L” level for ON) entered in the PWMIN pin, the lower output Tr performs PWM switching, causing change in the motor drive power. To control by means of the DC voltage, apply the voltage to the TOC pin (in this case, the PWMIN pin should be in the “L” level input condition). The TOC pin voltage is compared with the oscillation voltage of PWM pin, determining the duty. As the TOC pin voltage is lower, the output duty increases. 2. Hall input signal For Hall input, entry of the signal whose amplitude is larger than the hysteresis width (50 mV max) is necessary. Considering effects of noise and phase delay, entry of the amplitude of 120 mVp-p (at differential input) or more is recommended. When noise causes disturbance in the output waveform (at phase switching) or in the HP output (Hall signal threephase composite output), insert a capacitor, etc. as near as possible to the pin between inputs to prevent such effects. The Hall input is used as a signal for judgment of the input of the motor lock protection circuit. Though it is designed to ignore noise to a certain extent, due attention should be paid to check for incorrect operation of the protection circuit. Both upper and lower outputs are OFF when all three phases of Hall input signal are in the common-mode input condition. When the Hall IC output is to be entered, entry of 0 - VCC can be made for another single-side input by fixing either one side (+ or –) of input to the voltage within the common-mode input range with the Hall element used. 3. Current limiting circuit The current limiting circuit performs limiting with the current determined from I = VRF/Rf (VRF = 0.5 Vtyp, Rf: current detector resistance)(that is, this circuit limits the peak current). The control operation functions to reduce the on state duty of the output and thus reduce the current. Switching during current limiting is made on the basis of the frequency oscillated with the PWM pin. The PWM frequency is determined from the capacitance C (F) of capacitor connected to the PWM pin. fPWM ≈ 1/ (50000 × C) The PWM frequency of 15k to 25 kHz is recommended. As PWM oscillation is used also as a clock signal of the internal logic circuit, its oscillation is necessary even in the application where current limiting is not needed. Continued on next page. No. 7229-8/10 LB11920 Continued from preceding page. 4. Power save circuit This IC enters the power save condition to decrease the current dissipation in the stop mode. In this condition, the bias current of most of circuits is cut off. 5. Forward/backward changeover The motor rotation can be changed over with the F/R pin. Following cautions should be observed when F/R changeover is to be made while the motor is running: • The circuit incorporates a measure against the through current at a time of changeover. However it is necessary to take an appropriate measure to prevent the voltage from exceeding the rated voltage (35 V) because of rising of the VM voltage at changeover (instantaneous return of the motor current to the power supply). When this is a problem, increase the capacitance of a capacitor between VM and GND. • When the motor current after changeover is the current limit or more, the lower Tr is turned OFF. But the upper Tr enters the short-brake condition, and the current determined from the motor counter-electromotive voltage and coil resistance flows. It is necessary to prevent this current from exceeding the rated current (3.5 A). (F/R changeover at high rotation speed is dangerous.) 6. Brake operation Brake operation is made through setting of the BR pin to the “L” level. This operation consists of a short-brake operation in which all of lower outputs are turned OFF while all of upper outputs are turned ON. While the brake is operating, current limiting and motor lock protection circuits are not operative. Apply brake only when the current during operation does not exceed the rated current (3.5 A). The circuit incorporates a measure against the through current at a time of changeover. However it is necessary to take an appropriate measure to prevent the voltage from exceeding the rated voltage (35 V) because of rising of the VM voltage at changeover (instantaneous return of the motor current to the power supply). When this is a problem, increase the capacitance of a capacitor between VM and GND. 7. Motor lock protection circuit A motor lock protection circuit is incorporated for protection of IC and motor when the motor is locked. The lower output Tr is turned OFF when the Hall input signal is not switched for a certain period in the motor drive condition. The time is set by means of a capacity of a capacitor connected to the CSD pin. Time setting of about 3.5 sec is possible for the capacitance of 10 µF. (Variance ±30%) Set time (s) ≈ 0.35 × C (µF) Due care must be taken on any leakage current in the capacitor used because it may adversely affect error of the set time, etc. To cancel the motor lock protection condition, one of following steps must be taken: • Stop mode • Maintaining the output duty 0% condition through input of PWMIN or TOC for more than the period of tPWM × 8. (tPWM: IC internal PWM oscillation period) • Power must be applied again (in the stop condition). Connect the CSD pin to GND when the motor lock protection circuit is not to be used. The motor lock protection active period at restart becomes shorter than the setting when the stop time to cancel motor lock protection is shorter because the charge of capacitor cannot be fully discharged. Therefore, it is necessary to provide a certain allowance to the stop period while referring to the following formula as a guideline. Stop time(ms) ≥ 15 × C (µF) 8. Circuit for low-voltage protection This circuit detects the voltage applied to the VCC pin. When this voltage drops below the operation voltage (see the electric characteristics), the lower side output is turned OFF. To prevent repetition of output ON/OFF near the protection activation voltage, the hysteresis is provided. Accordingly, the output is not recovered unless the voltage rises by about 0.5 V above the activation voltage. 9. HP output For the HP output, the composite signal of three phases of Hall element signal is output. This is an open collector output. This can be used for the motor rotation detection signal, etc. Continued on next page. No. 7229-9/10 LB11920 Continued from preceding page. 10. Power supply stabilization This IC has a large output current, which causes deviation of the power line readily. To ensure stability, it is necessary to insert a capacitor with sufficient capacitance between the VM pin and GND. To eliminate the highfrequency noise due to switching, insert a ceramic capacitor of about 0.1 µF as near as possible to the pin between VM (pin 5) and GND 2 (pin 3). When inserting diode in the power line to prevent breakdown due to reverse connection of power supply, select the sufficiently large capacitance because the power line tends to develop deviation readily. The VCC voltage that is a control power supply must also be fully stabilized by means of a capacitor when such voltage tends to fluctuate because of routing. 11. Routing of a printed circuit board Two pins are provided for each of VM, RF, and GND2 pins where large current flows. On the printed circuit board, both of these pins should be connected and used. If the use of only one pin is possible in certain cases, use pins 3, 5, and 6. GND3 that is a sub-GND (internal separation layer) should be connected with control GND or GND1 with the shortest possible wiring. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of October, 2003. Specifications and information herein are subject to change without notice. PS No. 7229-10/10