Ordering number : EN5505D LB1845 Monolithic Digital IC PWM Current Controlling Stepping Motor Driver Overview The LB1845 is a PWM current control type stepping motor driver that uses a bipolar drive scheme. It is particularly suitable for driving carriage and paper feed stepping motors in printers and similar products. Features • PWM current control (fixed off time scheme) • Digital load current selection function • Sustained output voltage: 45V • Built-in thermal shutdown circuit Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Motor supply voltage VBB max Peak output current IO peak Continuous output current IO max Logic block supply voltage VCC Logic input voltage range VIN -0.3 to VCC V Emitter output voltage VE 1.0 V 3.0 W Allowable power dissipation tW ≤ 20µs Pd max1 Independent IC Pd max2 With an arbitrarily large heat sink 45 V 1.75 A 1.5 A 7.0 V 20.0 W Operating temperature Topr -20 to +85 °C Storage temperature Tstg -55 to +150 °C Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before usingany SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. O1806 MS IM / D3096HA (OT) No.5505-1/9 LB1845 Recommended Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Motor supply voltage VBB 10 to 44.5 V Logic block supply voltage VCC 4.75 to 5.25 V Reference voltage VREF 1.5 to 7.5 V Electrical Characteristics at Ta = 25°C, VBB = 38V, VCC = 5V, VREF = 5V Parameter Symbol Conditions Ratings min typ max unit [Output Block] Output stage supply current Output saturation voltage 1 Output leakage current IBB ON 12 16 IBB OFF 0.7 0.9 VO(sat)1 IO = +1.0A Sink 1.2 1.4 VO(sat)2 IO = +1.5A Sink 1.4 1.7 VO(sat)3 IO = -1.0A Source 1.1 1.3 VO(sat)4 IO = -1.5A Source 1.3 1.6 IO(leak)1 VO = VBB Sink IO(leak)2 VO = 0V Source Sustained output voltage V(sus) 50 -50 * 45 mA V µA V [Logic Block] Logic supply current ICC ON I0 = 0.8V, I1 = 0.8V 19.5 25.3 ICC OFF I0 = 2.4V, I1 = 2.4V 15.5 20.1 Input voltage VIH 2.4 VIL Input current Current control threshold voltage 0.8 IIH VIH = 2.4V IIL VIL = 0.8V -10 I0 = 0.8V, I1 = 0.8V 9.5 10 10.5 I0 = 2.4V, I1 = 0.8V 13.5 15 16.5 I0 = 0.8V, I1 = 2.4V 25.5 30 34.5 VREF/VSENSE Thermal shutdown temperature 10 TS 170 mA V µA °C * Note: Design guaranteed value. Package Dimensions unit: mm (typ) 3147C 15 12.7 11.2 R1.7 0.4 8.4 28 1 14 20.0 4.0 4.0 26.75 (1.81) 1.78 0.6 1.0 SANYO : DIP28H(500mil) No.5505-2/9 LB1845 Pd max - Ta Allowable Power Dissipation, Pd max - W 24 20 With an arbitrarily large heat sink 16 12 10.4 8 4 3 Independent IC 1.56 0 --20 0 20 40 60 80 Ambient Temperature, Ta- °C 100 ILB00880 Truth Table ENABLE PHASE OUTA OUTB L H H L L L L H H - OFF OFF I0 I1 Output Current L L VREF/(10×RE) = IOUT H L VREF/(15×RE) = IOUT×2/3 L H VREF/(30×RE) = IOUT×1/3 H H 0 Note: Outputs is OFF when ENABLE is high or in the I0 = I1 = high state. VCC RC1 VREF1 PHASE1 ENABLE1 I11 I01 I02 I12 ENABLE2 PHASE2 VREF2 RC2 GND Pin Assignment 28 27 26 25 24 23 22 21 20 19 18 17 16 15 2 3 4 5 6 7 8 9 10 11 12 13 SENSE1 E1 D-GND NC OUT 1B OUT 1A OUT 2B OUT 2A NC D-GND E2 SENSE2 14 VBB 1 VBB LB1845 ILB00881 No.5505-3/9 LB1845 Block Diagram VBB SBD OUT 1A V BB SBD OUT 1B VBB SBD OUT 2B SBD OUT 2A Output block Output block Output block Output block Output block Output block – + Output block PHASE1 Output block Thermal shutdown VCC PHASE2 – + RC1 – + ENABLE2 I02 – + I12 SENSE2 1kΩ 470pF 56kΩ 0.82Ω(1W) E2 D-GND – + 330pF 1kΩ – + RC2 GND SENSE1 0.82Ω(1W) E1 – + ONE SHOT 470pF I1 1 ONE SHOT 56kΩ – + – + 330pF I0 1 – + Current control block ENABLE1 VREF2 Current control block VREF1 ILB00882 Application Circuit Diagram Ccc RC1 27 VREF1 26 E1 3 D-GND 4 NC 5 SBD OUT1B Motor SBD 7 I01 22 8 I02 21 9 I12 20 OUT2A SBD D-GND 11 Rc Cc E2 12 ENABLE2 19 PWM2 NC 10 Re ENABLE1 24 I11 23 OUT2B Rt PHASE1 25 6 OUT1A SBD Ct PHASE2 18 VREF2 17 SENSE2 13 RC2 16 VBB 14 GND 15 Digital control signals SENSE1 2 Digital control signals Re VCC 28 PWM1 Cc VBB 1 Rc 100µF Cbb R1 Ct Off time setting values toff≈CtRt Re=0.82Ω(1W) VREF=5V Rt=56kΩ Ct=470pF Rc=1kΩ Cc=330pF Cbb=100µF ILB00883 No.5505-4/9 LB1845 Pin Description Pin No Pin 1, 14 VBB Function Output stage power-supply voltage 2 SENSE1 Set current detection pins. 13 SENSE2 Connect these pins, fed back through noise filters, to E1 and E2. 3 E1 12 E2 4, 11 D-GND Internal diode anode connection 6 OUT1B Outputs 7 OUT1A 8 OUT2B 9 OUT2A 15 GND Ground 27 RC1 Used to set the output off time for the switched output signal. The set current is controlled by the resistors Re inserted between these pins and ground. 16 RC2 26 VREF1 Output current settings The fixed off times are set by the capacitors and resistors connected to these pins. toff = CR. 17 VREF2 The output current is determined by the voltage (in the range 1.5 to 7.5V) input to these pins. 25 PHASE1 Output phase switching inputs. 18 PHASE2 High-level input: OUTA = high, OUTB = low 24 ENABLE1 Output on/off settings 19 ENABLE2 High-level input: output off 22, 23 I01, I11 21, 20 I02, I12 28 VCC Low-level input: OUTA = low, OUTB = high Low-level input: output on Digital inputs that set the output current The output currents can be set to 1/3, 2/3, or full by setting these pins to appropriate combinations of high and low levels. Logic block power supply Timing chart for pin switching operations during PWM drive RC pin td Spike noise E pin SENSE pin VOUT pin toff ILB00884 Figure 1 Switching Waveforms toff: Output off time. Determined by external capacitor and resistor Ct and Rt. (toff ≈ Ct × Rt) td: Delay time between the point the set current is sensed at the SENSE pin and the point the output turns off. No.5505-5/9 LB1845 Usage Notes 1. External diode Since this IC adopts a system based on lower side transistor switching drive, an external diode for the regenerative current that occurs during switching is required between VBB and VOUT. Use a Schottky barrier diode with a low feedthrough current. 2. Noise filters Since spike noise (see Figure 1) occurs when switching to the on state due to the external diode’s feedthrough current, applications must remove noise from the SENSE pin with a noise filter (Cc, Rc) between the E pin and the SENSE pin. However, note that if the values of Cc and Rc are too large, the SENSE voltage rise will be slowed, and the current setting will be shifted towards a higher current level. 3. VREF pin It is possible to change the output current continuously by continuously changing the VREF pin voltage. However, this voltage cannot be set to 0V. The VREF pin input impedance is 26kΩ (±30%) when VREF is 5V. Since this pin is used to set the output current, applications must be designed so that noise does not appear on this pin's input. 4. GND pin Since this IC switches large currents, care must be taken to avoid ground loops when the IC is mounted in the application. The section of the PCB that handles large currents should be designed with a low-impedance pattern, and must be separated from the small signal sections of the circuit. In particular, the ground for the sense resistor Re must be as close as possible to the IC ground. 5. Operation in hold mode There are cases where a current somewhat larger than the current setting may flow in hold mode (light load mode). Since this IC adopts a lower side switching, lower side sense system, the emitter voltage falls and the sense voltage goes to 0 when the switching state goes to off. The circuit then always turns the output on after the toff period has elapsed. At this time, due to the light load, the existence of the time td, and the fact that the output goes on even if the output current is higher than the set current, the output current will be somewhat higher than the set current. Applications should set the current setting somewhat lower than required if this occurs. 6. Function for preventing the upper and lower outputs being on at the same time This IC incorporates a built-in circuit that prevents the through currents that occur when the phase is switched. The table lists the output on and off delay times when PHASE and EANBLE are switched. When PHASE is switched When ENABLE is on Sink side Source side On delay time 10µs 9µs Off delay time 1.5µs 3µs On delay time 9µs 9µs Off delay time 1.5µs 6.5µs 7. 1-2 phase excitation and the double 1-2 phase excitation control sequence To reduce the vibration that occurs when the motor turns, this IC supports 1-2 phase excitation and double 1-2 phase excitation by using the output current setting digital input pins I0 and I1 without changing the VREF pin voltage. Tables 1 and 2 list that control sequence, and Figure 2 and Figure 3 present the composite vector diagram for this sequence.2. Noise filters No.5505-6/9 LB1845 Table 1 [1-2 phase excitation] 1/2 Step ENABLE1 = ENABLE2 = 0 Phase A No Phase B PH1 I11 I01 0 0 0 0 1 0 0 2 * 3 4 5 Current Current PH2 I12 I02 1 * 1 1 0 1 2/3 0 0 1 2/3 1 1 0 0 0 0 1 1 0 1 2/3 0 0 1 2/3 1 0 0 1 * 1 1 0 1 0 1 2/3 1 0 1 2/3 6 * 1 1 0 1 0 0 1 7 0 0 1 2/3 1 0 1 2/3 Value Value Table 2 [Double 1-2 phase excitation] about 1/4 Step ENABLE1 = ENABLE2 = 0 Phase A No Phase B PH1 I11 I01 0 0 0 0 1 0 0 0 Current Current PH2 I12 I02 1 * 1 1 0 1 0 1 0 1/3 Value Value 2 0 0 1 2/3 0 0 1 2/3 3 0 1 0 1/3 0 0 0 1 4 * 1 1 0 0 0 0 1 5 1 1 0 1/3 0 0 0 1 6 1 0 1 2/3 0 0 1 2/3 7 1 0 0 1 0 1 0 1/3 8 1 0 0 1 * 1 1 0 9 1 0 0 1 1 1 0 1/3 10 1 0 1 2/3 1 0 1 2/3 11 1 1 0 1/3 1 0 0 1 12 * 1 1 0 1 0 0 1 13 0 1 0 1/3 1 0 0 1 14 0 0 1 2/3 1 0 1 2/3 15 0 0 0 1 1 1 0 1/3 Composite Vector Diagram [1-2 phase excitation] [Double 1-2 phase excitation] Phase B Phase B (2) (4) (1) (3) (2) (1) (0) Phase A ILB00885 Figure 2 Composite Vector Diagram for the Sequence in Table 1 (1/4 cycle) (0) Phase A ILB00886 Figure 3 Composite Vector Diagram for the Sequence in Table 2 (1/4 cycle) No.5505-7/9 LB1845 10 ut on Outp 8 6 4 2 0 IBB Output off 0 4 8 12 16 20 24 28 32 36 40 Output Stage Power-Supply Voltage, VBB - V 28 28 24 20 20 16 16 B IB 12 12 8 8 4 4 0 0 1 2 3 4 5 6 7 Logic Block Supply Voltage, VCC - V 8 0 ILB00889 VO(sat) -- IOUT 1.6 24 20 20 I CC 16 16 12 12 I BB 8 8 4 4 0 1 2 3 4 5 6 7 Logic Block Supply Voltage, VCC - V 32 24 28 24 ILB00887 VBB=38V VREF=5V Output on 32 VBB=38V VREF=5V Output off 28 0 46 IC C Logic Block Supply Current, ICC - mA 44 ICC, IBB - VCC 32 Output Saturation Voltage, VO(sat) - V Logic Block Supply Current, ICC - mA I BB 8 0 ILB00888 VO(sat) - IOUT 1.6 Output Saturation Voltage, VO(sat) - V 12 Output Stage Supply Current, IBB - mA Output Stage Supply Current, IBB - mA 14 ICC, IBB - VCC 32 VCC=5V VREF=5V Output Stage Supply Current, IBB - mA IBB - VBB 16 (Sink side) 1.2 0.8 0.4 0 VBB=45V VCC=5V VREF=5V 0 0.4 0.8 1.2 1.6 Output Current, IOUT - A 2.0 2.4 ILB00890 (Source side) 1.2 0.8 0.4 0 VBB=45V VCC=5V VREF=5V 0 0.4 0.8 1.2 1.6 Output Current, IOUT - A 2.0 2.4 ILB00891 No.5505-8/9 LB1845 Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. 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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of October, 2006. Specifications and information herein are subject to change without notice. PS No.5505-9/9