STMICROELECTRONICS 74LVC125AM

74LVC125A
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)
HIGH PERFORMANCE
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5V TOLERANT INPUTS
HIGH SPEED: tPD = 4.8ns (MAX.) at VCC = 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN) at VCC = 3V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC(OPR) = 1.65V to 3.6V (1.2V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LVC125A is a low voltage CMOS QUAD
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C2MOS
technology. It is ideal for 1.65 to 3.6 VCC
operations and low power and low noise
applications.
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
SOP
TSSOP
74LVC125AM
74LVC125AMTR
74LVC125ATTR
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
These devices require the same 3-STATE control
input G to be taken high to make the output go in
to the high impedance state.
It has more speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
February 2002
1/9
74LVC125A
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
G1 to G4
A1 to A4
Y1 to Y4
GND
V CC
14
TRUTH TABLE
NAME AND FUNCTION
A
G
Y
X
L
H
H
L
L
Z
L
H
Output Enable Inputs
Data Inputs
Data Outputs
Ground (0V)
X : Don’t care
Positive Supply Voltage
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS
Symbol
V CC
Parameter
Supply Voltage
Value
Unit
-0.5 to +7.0
V
VI
DC Input Voltage
-0.5 to +7.0
V
VO
DC Output Voltage (High Impedance or VCC = 0V)
-0.5 to +7.0
V
VO
DC Output Voltage (High or Low State) (note 1)
IIK
DC Input Diode Current
-0.5 to VCC + 0.5
- 50
mA
IOK
DC Output Diode Current (note 2)
- 50
mA
IO
DC Output Current
± 50
mA
ICC or IGND DC VCC or Ground Current per Supply Pin
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
V
± 100
mA
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) IO absolute maximum rating must be observed
2) VO < GND
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74LVC125A
RECOMMENDED OPERATING CONDITIONS
Symbol
V CC
Parameter
Value
Supply Voltage (note 1)
Unit
1.65 to 3.6
V
0 to 5.5
V
VI
Input Voltage
VO
Output Voltage (High Impedance or VCC = 0V)
0 to 5.5
V
VO
Output Voltage (High or Low State)
0 to VCC
V
mA
IOH, IOL
High or Low Level Output Current (V CC = 3.0 to 3.6V)
± 24
IOH, IOL
High or Low Level Output Current (V CC = 2.7 to 3.0V)
High or Low Level Output Current (V CC = 2.3 to 2.7V)
± 12
mA
±8
mA
IOH, IOL
IOH, IOL
Top
dt/dv
High or Low Level Output Current (V CC = 1.65 to 2.3V)
Operating Temperature
Input Rise and Fall Time (note 2)
±4
mA
-55 to 125
°C
0 to 10
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2V at VCC = 3.0V
DC SPECIFICATIONS
Test Condition
Symbol
VIH
VIL
V OH
VOL
II
Ioff
IOZ
ICC
∆ICC
Parameter
Value
-40 to 85 °C
-55 to 125 °C
VCC
(V)
Min.
High Level Input
Voltage
1.65 to 1.95
0.65VCC
0.65VCC
2.3 to 2.7
2.7 to 3.6
1.7
2
1.7
2
Low Level Input
Voltage
1.65 to 1.95
0.35VCC
0.35VCC
2.3 to 2.7
2.7 to 3.6
0.7
0.8
0.7
0.8
High Level Output
Voltage
1.65 to 3.6
IO=-100 µA
VCC-0.2
VCC-0.2
1.65
IO=-4 mA
1.2
1.2
Low Level Output
Voltage
Input Leakage
Current
Power Off Leakage
Current
High Impedance
Output Leakage
Current
Quiescent Supply
Current
ICC incr. per Input
Max.
Min.
Unit
Max.
V
2.3
IO=-8 mA
1.7
1.7
2.7
IO=-12 mA
2.2
2.2
3.0
IO=-18 mA
2.4
2.4
3.0
IO=-24 mA
2.2
2.2
1.65 to 3.6
IO=100 µA
0.2
0.2
1.65
IO=4 mA
0.45
0.45
V
V
2.3
IO=8 mA
0.7
0.7
2.7
IO=12 mA
0.4
0.4
3.0
IO=24 mA
0.55
0.55
3.6
VI = 0 to 5.5V
±5
±5
µA
0
V I or VO = 5.5V
10
10
µA
3.6
V I = VIH orV IL
V O = 0 to 5.5V
±5
±5
µA
VI = VCC or GND
10
10
VI or VO = 3.6 to
5.5V
V IH = VCC-0.6V
± 10
± 10
500
500
3.6
2.7 to 3.6
V
µA
µA
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74LVC125A
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
VOLP
V OLV
Parameter
Value
TA = 25 °C
VCC
(V)
Dynamic Low Level Quiet
Output (note 1)
3.3
Min.
Typ.
Unit
Max.
0.8
CL = 50pF
VIL = 0V, V IH = 3.3V
V
-0.8
1) Number of output defined as ”n”. Measured with ”n-1” outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
AC ELECTRICAL CHARACTERISTICS
Test Conditio n
Symbol
tPLH t PHL
tPZL tPZH
tPLZ tPHZ
tOSLH
tOSHL
Parameter
VCC
(V)
Propagation Delay
Time
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
Output Enable Time 1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
Output Disable Time 1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
Output To Output
2.7 to 3.6
Skew Time (note1,
2)
Value
CL
(pF)
RL
(Ω)
ts = tr
(ns)
30
30
50
50
30
30
50
50
30
30
50
50
1000
500
500
500
1000
500
500
500
1000
500
500
500
2.0
2.0
2.5
2.5
2.0
2.0
2.5
2.5
2.0
2.0
2.5
2.5
-40 to 85 °C
Min.
1.5
1
1
1
2
2
Max.
-55 to 125 °C
Min.
9.0
6.3
5.5
4.8
9.9
7.4
6.6
5.4
11
5.6
5.0
4.6
1
Unit
Max.
12
8.5
6.5
5.8
13
9.6
7.9
6.5
14
7.3
6.0
5.5
1
ns
ns
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
CIN
Input Capacitance
CPD
Power Dissipation Capacitance
(note 1)
TA = 25 °C
VCC
(V)
1.8
2.5
3.3
Value
Min.
fIN = 10MHz
Typ.
Unit
Max.
4
pF
28
30
34
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)
4/9
74LVC125A
TEST CIRCUIT
R T = ZOUT of pulse generator (typically 50Ω)
TEST CIRCUIT AND WAVEFORM SYMBOL VALUE
VCC
Symbol
CL
1.65 to 1.95V
2.3 to 2.7V
2.7V
3.0 to 3.6V
30pF
30pF
50pF
50pF
RL = R1
1000Ω
500Ω
500Ω
500Ω
VS
2 x V CC
VCC
6V
6V
V IH
2 x V CC
VCC
2.7V
2.7V
VM
VCC/2
VCC/2
1.5V
1.5V
VOH
VCC
VCC
3.0V
3.0V
VX
VOL + 0.15V
VOL + 0.15V
VOL + 0.3V
VOL + 0.3V
VY
VOH - 0.15V
VOH - 0.15V
VOH - 0.3V
VOH - 0.3V
tr = tr
<2.0ns
<2.0ns
<2.5ns
<2.5ns
5/9
74LVC125A
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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74LVC125A
SO-14 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
8.55
8.75
0.336
0.344
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
7.62
0.300
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.68
0.026
8° (max.)
PO13G
7/9
74LVC125A
TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0°
L
0.45
A
0.60
0.0256 BSC
8°
0°
0.75
0.018
8°
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
8/9
74LVC125A
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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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