PD85025C RF power transistor - LdmoST family Preliminary Data Features ■ Excellent thermal stability ■ Common source configuration ■ POUT = 25 W with 16 dB gain @ 945 MHz / 13.6 V ■ BeO free package ■ ESD protection ■ In compliance with the 2002/95/EC european directive M243 Epoxy sealed Description The PD85025C is a common source N-channel, enhancement-mode lateral FieldEffect RF power transistor. It is designed for high gain, broadband commercial and industrial applications. It operates at 13.6 V in common source mode at frequencies of up to 1 GHz. PD85025C boasts the excellent gain, linearity and reliability of ST’s latest LDMOS technology. Figure 1. Pin connection 1 3 PD85025C’s superior linearity performance makes it an ideal solution for mobile application. 2 1. Drain 3. Source 2. Gate Table 1. Device summary Order code Package Packing PD85025C M243 Box December 2007 Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/10 www.st.com 10 Contents PD85025C Contents 1 2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Static . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 ESD protection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2/10 PD85025C Electrical data 1 Electrical data 1.1 Maximum ratings Table 2. Absolute maximum ratings (TCASE = 25°C) Symbol Value Unit V(BR)DSS Drain-source voltage 40 V VGS Gate-source voltage ±20 V Drain current 7 A Power dissipation (@ TC = 70 °C) 93 W Max. operating junction temperature 200 °C -65 to +150 °C Value Unit 1.4 °C/W ID PDISS TJ TSTG 1.2 Parameter Storage temperature Thermal data Table 3. Symbol RthJC Thermal data Parameter Junction - case thermal resistance 3/10 Electrical characteristics 2 PD85025C Electrical characteristics TCASE = +25 oC 2.1 Static Table 4. Static Symbol 2.2 Test conditions Min Unit VGS = 0 V VDS = 25 V 1 µA IGSS VGS = 20 V VDS = 0 V 1 µA VGS(Q) VDS = 10 V ID = TBD mA TBD VDS(ON) VGS = 10 V ID = 1 A 270 CISS VGS = 0 V VDS = 12.5 V f = 1 MHz 49 pF COSS VGS = 0 V VDS = 12.5 V f = 1 MHz 35 pF CRSS VGS = 0 V VDS = 12.5 V f = 1 MHz 1.0 pF V 310 mV Dynamic Symbol Dynamic Min. Typ. f = 945 MHz 25 30 W GP VDD = 13.6 V , IDQ = 300 mA, POUT = 10 W, f = 945 MHz 15 17.5 dB hD VDD = 13.6 V, IDQ = 300 mA, POUT = P3dB, f = 945 MHz 60 73 % P3dB Test conditions VDD = 13.6 V, IDQ = 300 mA Load VDD = 17 V, IDQ = 300 mA, POUT = 45 W, f = 945 MHz mismatch All phase angles Max. 20:1 Unit VSWR ESD protection characteristics Table 6. 4/10 Max IDSS Table 5. 2.3 Typ ESD protection characteristics Test conditions Class Human body model 2 Machine model M3 PD85025C 3 Impedance Impedance Figure 2. Current conventions Table 7. Impedance data Freq. (MHz) ZIN (Ω) ZDL(Ω) 945 MHz 1.01 + j 2.03 1.75 + j 2.20 5/10 Typical performance PD85025C 4 Typical performance Figure 3. Capacitances vs drain voltage Figure 4. 120 p 6 Crss Coss Tamb = - 40 °C Ciss 100 5 80 4 Capacitance (pF) DC output characteristics ID[A] Freq = 1 MHz 60 3 2 40 1 20 0 0 0 0 10 20 30 40 2 Vgs = 4.0V DC output characteristics Figure 6. 6 10 12 Vgs = 4.5V Vgs = 5.0V Vgs = 5.5V Vgs = 6.0V DC output characteristic Tamb = + 60 °C 5 5 4 4 ID[A] ID[A] 8 6 Tamb = + 20 °C 3 2 3 2 1 1 0 0 2 4 6 8 10 12 0 0 2 4 VDS[V] Vgs = 4.0V Vgs = 4.5V Vgs = 5.0V Vgs = 5.5V 6 8 10 12 VDS[V] Vgs = 6.0V Vgs = 4.0V 6/10 6 VDS[V] Vds (V) Figure 5. 4 50 Vgs = 4.5V Vgs = 5.0V Vgs = 5.5V Vgs = 6.0V PD85025C Figure 7. Typical performance Output power and efficiency vs input power 40 80 35 70 30 60 25 50 20 40 Figure 8. Gain vs output power and bias current 22 100mA 20 300mA 200mA 400mA Efficiency Gain (dB) Pout Nd (%) Pout (W) 18 16 15 30 14 10 20 12 Freq = 945 MHz Vdd = 13.6V Idq = 300 mA 5 10 0 10 0 0 0.0 0.5 1.0 1.5 Freq = 945 MHz Vdd = 13.6V 5 10 15 20 25 30 35 40 Pout (W) 2.0 Pin (W) Figure 9. Figure 10. Pout and drain current vs supply voltage 3 35 3.5 25 2.5 30 3 25 2.5 20 2 20 2 15 1.5 15 1.5 10 1 10 1 Freq = 945 MHz Pin = 0.4W Vdd = 13.6V Idq = 300mA 5 0 0 1 2 3 4 5 0.5 Pout 4 Id Freq = 945 MHz Pin = 0.8W Idq = 300mA 5 0 0 6 7 Vgs (V) 10 13 16 Id (A) 30 Id Pout (W) 40 Pout Id (A) 3.5 35 Pout (W) Pout and drain current vs gate voltage 0.5 0 19 Vdd (V) Figure 11. Pout and drain current vs supply voltage 50 5 Pout 4.5 Id 40 4 35 3.5 30 3 25 2.5 20 2 15 1.5 10 Id (A) Pout (W) 45 1 Freq = 945 MHz Pin = 1.6W Idq = 300mA 5 0 7 10 13 16 0.5 0 19 Vdd (V) 7/10 Package mechanical data 5 PD85025C Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com Table 8. M243 (.230 x .360 2L N/HERM W/FLG) mechanical data Dim. mm. Min Typ Inch Max Min Typ Max A 5.21 5.72 0.205 0.225 B 5.46 6.48 0.215 0.255 C 5.59 6.10 0.220 D 14.27 0.240 0.562 E 20.07 20.57 0.790 0.810 F 8.89 9.40 0.350 0.370 G 0.10 0.15 0.004 0.006 H 3.18 4.45 0.125 0.175 I 1.83 2.24 0.072 0.088 J 1.27 1.78 0.050 0.070 Figure 12. Package dimensions Controlling dimension: Inches 8/10 1022142E PD85025C 6 Revision history Revision history Table 9. Document revision history Date Revision 10-Dec-2007 1 Changes Initial release. 9/10 PD85025C Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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