PD54008L-E RF power transistors The LdmoST Plastic family Features ■ Excellent thermal stability ■ Common source configuration ■ Broadband performances POUT = 8W with 15 dB gain @ 500MHz ■ New leadless plastic package ■ EDS protection ■ Supplied in tape & reel of 3K units ■ In compliance with the 2002/93/EC european directive PowerFLAT™ (5x5) Description Pin connection The PD54008L-E is a common source N-Channel, enhancement-mode lateral FieldEffect RF power transistor. It is designed for high gain, broad band commercial and industrial applications. It operates at 7 V in common source mode at frequencies of up to 1 GHz. PD54008L-E boasts the excellent gain, linearity and reliability of STH1LV latest LDMOS technology mounted in the innovative leadless SMD plastic package, PowerFLAT™. PD54008L-E’s superior linearity performance makes it an ideal solution for portable radio. Top view Order codes Part Number Marking Package Packaging PD54008L-E 54008 PowerFLAT (5x5) Tape & Reel January 2007 Rev 2 1/15 www.st.com 15 PD54008L-E Contents 1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Impedances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 Typical performance (Broadband) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Test circuit schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 PD54008L-E Electrical data 1 Electrical data 1.1 Maximum ratings Table 1. Absolute maximum ratings (TCASE = 25°C) Symbol Value Unit V(BR)DSS Drain source voltage 25 V VGS Gate-source voltage -0.5 to +15 V 5 A Power dissipation (tCASE = 70°C) 26.7 W Maximum operating junction temperature 150 °C -65 to +150 °C Value Unit 3 °C/W ID PDISS TJ TSTG 1.2 Parameter Drain current Storage temperature Thermal data Table 2. Symbol RthJC Thermal data Parameter Junction to case thermal resistance 3/15 PD54008L-E Electrical data 1.3 Electrical characteristics Table 3. Static (TCASE = 25°C) Symbol Test conditions IDSS VGS = 0V IGSS VGS = 5V VGS(Q) VDS = 10V ID = 50mA VDS(ON) VGS = 10V ID = 0.5A CISS VGS = 0V VDS = 7.5V COSS VGS = 0V CRSS VGS = 0V Table 4. Typ Max Unit 1 µA 1 µA 5.0 V VDS = 25V VDS = 0V 2.0 0.09 V f = 1MHz 80 pF VDS = 7.5V f = 1MHz 60 pF VDS = 7.5V f = 1MHz 6.6 pF Dynamic Symbol Test conditions Min. Typ. Max. Unit P1dB VDD = 7.5 V IDQ = 200 mA f = 500MHz 8 W GPS VDD = 7.5 V IDQ = 200 mA POUT = 8 W f = 500MHz 15 dB ηD VDD = 7.5 V IDQ = 200 mA POUT = 8 W f = 500MHz 50 % VDD = 7.5 V IDQ = 200 mA POUT = 8W f = 500MHz 20:1 VSW R Load Mismatch Table 5. Table 6. 4/15 Min All Phase Angles ESD protection characteristics Test conditions Class Human body model 2 Machine model M3 Moisture sensitivity level Test methodology Rating J-STD-020B MSL 3 PD54008L-E 2 Impedances Impedances Impedance data schematic Figure 1. D ZDL Typical Input Impedance Typical Drain Load Impedance G Zin S SC13140 Impedance data (1) Table 7. f ZIN (Ω) ZDL (Ω) 480MHz 1.12 - j 2.02 2.01 + j 0.13 500MHz 1.3 - j 2.01 1.84 + j 0.7 520MHz 1.66 - j 2.55 1.66 + j 1.51 1. In Broadband amplifier 5/15 PD54008L-E Typical performance 3 Typical performance Figure 2. Power gain vs output power Figure 3. 20 Efficiency vs output power 80 Idq = 200 mA 19 70 18 60 17 Idq = 150 mA 50 Idq = 100 mA Nd (%) Gp (dB) 16 15 40 14 30 13 20 12 f = 500 MHz Vds = 7.5 V 11 Idq = 200 mA f = 500 MHz Vds = 7.5 V 10 10 0 0 1 Figure 4. 2 3 4 5 Pout (W) 6 7 8 9 10 Return loss vs output power 0 1 Figure 5. 0 2 3 4 5 Pout (W) 6 7 8 9 10 Capacitance vs supply voltage 1000 f = 1 MHz -5 -15 -20 Coss 10 Crss Idq = 200 mA f = 500 MHz Vds = 7.5 V -25 -30 0 1 2 3 4 5 Pout (W) 6/15 Ciss 100 C (pF) RL (dB) -10 6 7 8 9 10 1 0 1 2 3 4 5 Vds (V) 6 7 8 9 PD54008L-E 3.1 Typical performance (Broadband) Figure 6. Power gain vs frequency Figure 7. 14 70 12 60 10 50 8 40 Nd (%) Gp (dB) Typical performance 6 Efficiency vs frequency 30 20 4 10 2 Idq = 150 mA Pin = 26 dBm Idq = 150 mA Pin = 26 dBm 0 470 480 490 500 510 520 530 480 490 500 510 520 530 f (MHz) f (MHz) Figure 8. 0 470 Return loss vs frequency 0 -4 RL (dB) -8 -12 -16 Idq = 150 mA Pin = 26 dBm -20 470 480 490 500 510 520 530 f (MHz) 7/15 PD54008L-E Test circuit schematic 4 Test circuit schematic Figure 9. Internal schematic Table 8. Test circuit component part list Component B1, B2 C1, C16 C2, C3, C4, C13,C14 Ferrite bead 300 pF, 100 mil ATC 1 -:- 20 pF Trimmer cap - JOHANSON C15 0.8 -:- 10 pF Trimmer cap - JOHANSON C5 36 pF, 100 mil ATC C6 51 pF, 100 mil ATC C7 62 pF, 100 mil ATC C8, C17 C9 150 pF, 100 mil CHIP CAP 1 nF, 100 mil CHIP CAP C10, C18 1000 pF, 100 mil CHIP CAP C11, C19 0.1 nF, 100 mil CHIP CAP C12, C20 10 µF 50 V Electrolytic Capacitor C21 L 8/15 Description 15 pF, 100 mil ATC 43nH, Coilcraft R1 33 KΩ, 1W CHIP Resistor R3 1 KΩ, 1W CHIP Resistor R4 15 Ω, 1W CHIP Resistor Z1 0.49" X 0.080" MICROSTRIP Z2 1.024" X 0.080" MICROSTRIP Z3 0.079" X 0.080" MICROSTRIP Z4 0.24" X 0.223" Z5 0.079" X 0.223" MICROSTRIP MICROSTRIP PD54008L-E Table 8. Test circuit schematic Test circuit component part list Z6 0.138" X 0.223" MICROSTRIP Z7 0.259" X 0.223" MICROSTRIP Z8 0.079" X 0.080" MICROSTRIP Z9 0.413" X 0.080" MICROSTRIP Z10 0.756" X 0.080" MICROSTRIP Z11 0.61" X 0.080" MICROSTRIP N1, N2 Type N Flange Mount Board ROGER, ULTRA LAM 2000 THK 0.030", εr = 2.55 2oz. ED cu SIDES 9/15 Package mechanical data 5 PD54008L-E Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/15 PD54008L-E Table 9. Package mechanical data PowerFLAT™ mechanical data mm inch Dim. Min. Typ. Max. A 0.90 A1 0.02 A3 0.24 Min. Typ. Max. 1.00 0.035 0.039 0.05 0.001 0.002 0.009 AA 0.15 0.25 0.35 0.006 0.01 0.014 b 0.43 0.51 0.58 0.017 0.020 0.023 c 0.64 0.71 0.79 0.025 0.028 0.031 D 5.00 0.197 d 0.30 0.011 E 5.00 0.197 E2 2.49 2.57 2.64 0.098 0.101 e 1.27 0.050 f 3.37 0.132 g 0.74 0.03 h 0.21 0.008 0.104 Figure 10. PowerFLAT™ package dimensions 11/15 PD54008L-E Package mechanical data Table 10. PowerFLAT™ tape & reel dimensions mm. DIM. Min. Typ Max. Ao 5.15 5.25 5.35 Bo 5.15 5.25 5.35 Ko 1.0 1.1 1.2 Figure 11. PowerFLAT™ tape & reel 12/15 PD54008L-E Table 11. Package mechanical data Recommended footprint 13/15 PD54008L-E Revision history 6 Revision history Table 12. 14/15 Revision history Date Revision Changes 19-Jan-2006 1 First Issue 23-Jan-2007 2 Document has been reformatted PD54008L-E Please Read Carefully: Information in this document is provided solely in connection with ST products. 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