STMICROELECTRONICS STEVAL

STEVAL-TDR013V1
Demonstration board using the PD84002 for UHF RFID reader
Features
■
Excellent thermal stability
■
Frequency: 8
■
860 - 960 MHz
■
Supply voltage: 7.2 V
■
Output power: 2 W
■
Power gain: 13.9 ± 0.5 dB
■
Efficiency: 60 % - 63 %
■
Load mismatch: 20:1
■
BeO-free amplifier
Mechanical specification:
L = 60 mm, W = 30 mm
Description
Table 1.
The STEVAL-TDR013V1 is an evaluation board
using PD84002 LDMOS transistor and designed
for UHF RFID reader and 2-way radio
applications.
Device summary
Order code
STEVAL-TDR013V1
For additional information on PD84002, please
refer to its datasheet.
September 2010
Doc ID 18013 Rev 1
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www.st.com
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Contents
STEVAL-TDR013V1
Contents
1
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6
Circuit layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
8
2/16
7.1
Thermal pad and via design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.2
Soldering profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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STEVAL-TDR013V1
Electrical data
1
Electrical data
1.1
Maximum ratings
Table 2.
Absolute maximum ratings
Symbol
VDD
ID
TCASE
TA
2
Parameter
Supply voltage
Drain current
Operating case temperature
Maximum ambient temperature
Value
Unit
16
V
0.75
A
-20 to +85
°C
+55
°C
Electrical characteristics
TA = +25 oC, VDD = 7.2 V, Idq = 100 mA
Table 3.
Symbol
Freq
Electrical specifications
Test conditions
Frequency range
Min
Typ
860
POUT
Max
Unit
960
MHz
2
W
Gain
@ PIN = 19 dBm
13.9 ± 0.5
dB
ND
@ PIN = 19 dBm
60 - 63
%
H2
2nd harmonic @ POUT = 2 W
-31 / -46
dBc
H3
3rd harmonic @ POUT = 2 W
-62 / -70
dBc
VSWR
Load mismatch all phases @ POUT = 2 W
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Impedance
3
STEVAL-TDR013V1
Impedance
Figure 1.
Impedance illustration
D
ZDL
Z
ZGS
IN
G
S
Table 4.
4/16
Impedance data
F(MHz)
ZGS
ZDL
860
1,80 + j 7,79
3,88 + j 2,41
870
1,84 + j 7,96
3,89 + j 2,69
880
1,83 + j 8,01
4,01 + j 2,96
890
1,76 + j 8,11
4,17 + j 3,16
900
1,70 + j 8,20
4,27 + j 3,32
910
1,63 + j 8,30
4,37 + j 3,40
920
1,57 + j 8,48
4,41 + j 3,46
930
1,43 + j 8,64
4,36 + j 3,51
940
1,41+ j 8,83
4,28 + j 3,51
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STEVAL-TDR013V1
Typical performance
4
Typical performance
Figure 2.
Output power and efficiency vs
frequency
7.2 V / 100 mA / Pin = 19 dBm
4.0
Figure 3.
80
Pout
Gain vs frequency
7.2 V / 100 mA / Pin = 19 dBm
18
Eff
3.5
70
16
60
50
2.0
40
1.5
30
1.0
840
860
880
900
920
Gain (dB)
2.5
14
Efficiency (%)
Pout (W)
3.0
12
10
20
960
940
8
820
840
860
880
Freq (MHz)
Figure 4.
Gain vs Pout
7.2 V / 100 mA
Figure 5.
940
960
980
1000
Harmonics vs frequency
7.2 V / 100 mA / Pin = 19 dBm
-10
16
H2
H3
-20
Harmonics (dB)
Gain (dB)
920
0
18
14
12
-30
-40
-50
-60
860 MHz
10
0.50
900
Freq (MHz)
0.75
1.00
1.25
900 MHz
1.50
Pout (W)
1.75
-70
960 MHz
2.00
2.25
2.50
-80
820
840
860
880
900
920
940
960
980
1000
Freq (MHz)
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Typical performance
Figure 6.
STEVAL-TDR013V1
Input return loss vs frequency
7.2 V / 100 mA / Pin = 19 dBm
0
-5
IRL (dB)
-10
-15
-20
-25
-30
-35
820
840
860
880
900
920
940
960
980
1000
Freq (MHz)
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STEVAL-TDR013V1
Test circuit
5
Test circuit
Figure 7.
Test circuit schematic
Vcc
1+
MSub
2-
R3
B2
B1
C3
FR4
H=20 mil
R2
C1
L1
C2
R1
TL4
TL5
C9
RFin
TL1
C4
C6
Table 5.
TL2
C7
TL6
C10
C5
RFout
C11
TL3
LDMOS
PD84002
C8
Part list
Component ID
Description
B1
Value
Case size
Manufacturer
Part code
Ferrite Bead
Panasonic
EXCELDRC35C
B2
Ferrite Bead
Panasonic
EXCELDRC35C
C1, C2
Capacitor
120 pF
0603
Murata
GRM39-C0G121J50D500
C3
Capacitor
1 uF
0603
Murata
GRM39-X5R105K16D52K
C4, C5
Capacitor
39 pF
0603
Murata
GRM39-C0G390J50D500
C6, C10
Capacitor
3.3 pF
0603
Murata
GRM39-C0G3R3C50Z500
C7
Capacitor
8.2 pF
0603
Murata
GRM39-C0G8R2D50Z500
C8
Capacitor
22 pF
0603
Murata
GRM39-C0G220J50D500
C9
Capacitor
12 pF
0603
Murata
GRM39-C0G120J50D500
C11
Capacitor
2.7 pF
0603
Murata
GRM39-C0G2R7C50Z500
L1
Inductor
12.55 nH
Coilcraft
1606-10
R1
Resistor
150 Ω
R2
Potentiometer
10 KΩ
R3
Resistor
1K
0603
Tyco electronics
Bourns electronics
3214W-1-103E
Tyco electronics
01623440-1
0603
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Test circuit
Table 5.
STEVAL-TDR013V1
Part list (continued)
TL1
Transmission line W = 0.92mm L = 13.6 mm
Component ID
Description
Case size
TL2
Transmission line W = 0.92mm
L = 3.5 mm
TL3
Transmission line W = 0.92mm
L = 4.2 mm
TL4
Transmission line W = 0.92mm
L = 3.8 mm
TL5
Transmission line W = 0.92mm
L = 3.7 mm
TL6
Transmission line W = 0.92mm L = 11.3 mm
RF in, RF out
SMA-CONN
PD84002
LDMOS
Board
Figure 8.
8/16
Value
50 Ω
Manufacturer
Part code
Johnson
142-0701-801
STMicroelectronics
PD84002
60 mils
FR-4 THk=0.020" 2OZ Cu both sides
Demoboard photo
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STEVAL-TDR013V1
6
Circuit layout
Circuit layout
Figure 9.
Test fixture component layout
Figure 10. Test circuit photomaster
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Package mechanical data
7
STEVAL-TDR013V1
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.
10/16
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STEVAL-TDR013V1
Table 6.
Package mechanical data
SOT-89 mechanical data
Dim.
mm.
Min
Typ
Inch
Max
Min
Typ
Max
A
1.4
1.6
55.1
63.0
B
0.44
0.56
17.3
22.0
B1
0.36
0.48
14.2
18.9
C
0.35
0.44
13.8
17.3
C1
0.35
0.44
13.8
17.3
D
4.4
4.6
173.2
181.1
D1
1.62
1.83
63.8
72.0
E
2.29
2.6
90.2
102.4
e
1.42
1.57
55.9
61.8
e1
2.92
3.07
115.0
120.9
H
3.94
4.25
155.1
167.3
L
0.89
1.2
35.0
47.2
Figure 11. Package dimensions
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Package mechanical data
7.1
STEVAL-TDR013V1
Thermal pad and via design
Thernal vias are required in the PCB layout to effectively conduct heat away from the
package. The via pattern has been designed to address thermal, power dissipation and
electrical requirements of the device.
The via pattern is based on thru-hole vias with 0.203mm to 0.330mm finished hole size on a
0.5mm to 1.2mm grid pattern with 0.025 plating on via walls. If micro vias are used in a
design, it is suggested that the quantity of vias be increased by a 4:1 ratio to achieve similar
results.
Figure 12. Pad layout details
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STEVAL-TDR013V1
7.2
Package mechanical data
Soldering profile
Figure 13 shows the recommeded solder for devices that have Pb-free terminal plating and
where a Pb-free solder is used.
Figure 13. Recommended solder profile
Figure 14 shows the recommeded solder for devices with Pb-free terminal plating used with
leaded solder, or for devices with leaded terminal plating used with a leaded solder.
Figure 14. Recommended solder profile for leaded devices
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Package mechanical data
STEVAL-TDR013V1
Figure 15. Reel information
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STEVAL-TDR013V1
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Revision history
Revision history
Updated
Table 7.
Document revision history
Date
Revision
22-Sep-2007
1
Changes
Initial release
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STEVAL-TDR013V1
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