LM49250 Enhanced Emissions Suppression Stereo Class D Audio Sub-System with Ground Referenced Headphone Amplifier and Mono Earpiece General Description Key Specifications The LM49250 is a fully integrated audio subsystem designed for stereo cell phone applications. The LM49250 combines a 2.4W/Ch stereo class D speaker amplifiers with a 45mW/Ch stereo ground referenced headphone amplifier, a class AB earpiece amplifier, National 3D enhancement, volume control, and an input mixer into a single device. The filterless class D amplifiers deliver 1.2W/Ch into an 8Ω load with <1% THD +N from a 5V supply. The LM49250 features a new circuit technology that utilizes a charge pump to generate a negative supply voltage. This allows the headphone outputs to be biased about ground, thereby eliminating the output-coupling capacitors. For improved noise immunity, the LM49250 features fully differential left, right and mono inputs. The three inputs can be mixed/multiplexed to any output combination of the loudspeaker, headphone or earpiece amplifiers. The left and right differential inputs can be used as separate single-ended inputs, mixing multiple stereo audio sources. The mixer, volume control, and device mode select are controlled through an I2C compatible interface. Output short circuit and thermal overload protection prevent the device from being damaged during fault conditions. Superior click and pop suppression eliminates audible transients on power-up/down and during shutdown. ■ Power Output at VDD = 5V Speaker: RL = 4Ω, THD+N ≤ 1% RL = 4Ω, THD+N ≤ 10% RL = 8Ω, THD+N ≤ 1% 1.97W/Ch 2.4W/Ch 1.2W/Ch Headphone: RL = 16Ω, THD+N ≤ 1% RL = 32Ω, THD+N ≤ 1% 41mW/Ch 45mW/Ch Earpiece: RL = 16Ω, THD+N ≤ 1% RL = 32Ω, THD+N ≤ 1% 170mW 90mW ■ Shutdown Current 0.1μA ■ Efficiency at 5V, 1W into 8Ω 87% ■ Efficiency at 3.6V, 500mW into 8Ω 85% Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Output Short Circuit Protection Thermal Overload Protection Stereo filterless Class D operation Spread spectrum modulation Ground referenced Headphone Drivers I2C Control Interface 32-step input volume control Output volume control Minimum external components Click and Pop suppression Micro-power shutdown Available in space-saving 36–bump µSMD package Single supply operation RF suppression Applications ■ Mobile phones ■ Portable Navigation Devices ■ Portable Media Players Boomer® is a registered trademark of National Semiconductor Corporation. © 2008 National Semiconductor Corporation 300166 www.national.com LM49250 Enhanced Emissions Suppression Stereo Class D Audio Sub-System with Ground Referenced Headphone Amplifier and Mono Earpiece December 15, 2008 LM49250 Typical Application 300166k9 FIGURE 1. Typical Audio Amplifier Application Circuit www.national.com 2 LM49250 Connection Diagrams 300166k8 Top View Order Number LM49250RL See NS Package Number RLA36CCA Package View RL Package Marking 300166o6 Top View XY - 2 Digit date code TT - Lot traceability G - Boomer family J1 - LM49250RL 300166k7 Top View Order Number LM49250RL See NS Package Number RLA36CCA 3 www.national.com LM49250 TABLE 1. Bump Description BUMP www.national.com NAME DESCRIPTION A1 LLS- Negative left differential loudspeaker output A2 GND Ground A3 VDD(CP) Charge pump supply voltage A4 VSS(CP) Negative supply voltage (charge pump output) A5 CCP+ Charge pump flying capacitor positive terminal A6 GND(CP) B1 LLS+ Positive left differential loudspeaker output B2 ADR I2C address select B3 L3D2 Left 3D input B4 L3D1 Left 3D output B5 CCP- Charge pump flying capacitor negative terminal B6 HPR Right ground referenced headphone output C1 GND(LS) Loudspeaker ground C2 I2C_VDD I2C supply voltage C3 R3D2 Right 3D input C4 R3D1 Right 3D output C5 VO(LDO) Charge pump ground LDO output voltage C6 HPL D1 VDD(LS) Left ground referenced headphone output D2 SCL D3 GND(HP) D4 MIN- Negative mono audio input D5 MIN+ Positive mono audio input D6 LIN- Negative left audio input E1 RLS+ Positive right differential loudspeaker output E2 SDA I2C data E3 RESET I2C reset E4 EP- E5 RIN+ Positive right audio input E6 LIN+ Positive left audio input F1 RLS- Negative right differential loudspeaker output F2 GND Ground F3 VDD Power supply voltage F4 EP+ Positive differential earpiece output F5 RIN- Negative right audio input F6 BYPASS Loudspeaker supply voltage I2C clock Headphone ground Negative differential earpiece output Amplifier bypass 4 θJA (RLA36CCA)) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (Note 1) Storage Temperature Input Voltage Power Dissipation (Note 3) ESD Rating (Note 4) ESD Rating (Note 5) Junction Temperature 44.4°C/W Operating Ratings Temperature Range 6.0V −65°C to +150°C −0.3V to VDD +0.3V Internally Limited 2000V 200V 150°C TMIN ≤ TA ≤ TMAX Supply Voltage (VDD, VDD(LS), VDD(CP) ) I2C Voltage (I2CVDD) −40°C ≤ TA ≤ +85°C 2.7V ≤ VDD ≤ 5.5V 1.7V ≤ I2CVDD≤ 5.5V VDD = VDD(CP) = VDD(LS) I2CVDD ≤ VDD Electrical Characteristics (Notes 1, 2) The following specifications apply for VDD = VDD(LS) = VDD(CP) = 3.6V, all selectable gains = 0dB, RL(LS) = 8Ω (Note 8), RL(HP) = 32Ω, RL(EP) = 32Ω, f = 1kHz and the conditions shown in the "Typical Application Circuit” unless otherwise specified. Limits apply for TA = 25°C. LM49250 Symbol Parameter Conditions Typical Limit (Note 6) (Note 7) Units (Limits) VDD = 3.0V, No Load, Spread Spectrum on Loudspeaker (LS) Mode Stereo Mono 5.6 3.9 Headphone (HP) Mode Stereo Mono 5.5 4.0 Earpiece (EP) Mode 2.5 mA Stereo LS + Stereo HP Mode 9.0 mA mA mA mA mA VDD = 3.6V, No Load, Spread Spectrum on IDD Supply Current Loudspeaker (LS) Mode Stereo Mono 6.1 4.1 8.0 mA (max) mA Headphone (HP) Mode Stereo Mono 5.6 4.1 7.5 mA (max) mA Earpiece (EP) Mode 2.6 3.4 mA (max) Stereo LS + Stereo HP Mode 9.4 12.5 mA (max) VDD = 5.0V, No Load, Spread Spectrum on ISD VOS Loudspeaker (LS) Mode Stereo Mono 7.1 4.8 8.8 mA (max) mA Headphone (HP) Mode Stereo Mono 6.0 4.4 7.7 mA (max) mA Earpiece (EP) Mode 3.0 3.9 mA (max) Stereo LS + HP Mode 10.5 13.8 mA (max) 0.1 2 µA (max) 3.8 10 1.5 5.0 45 6.0 mV (max) mV (max) mV (max) Shutdown Supply Current Output Offset Voltage Differential inputs Headphone (output mode 2) Speaker (output mode 2) Earpiece (output mode 1) 5 www.national.com LM49250 Thermal Resistance Absolute Maximum Ratings (Notes 1, 2) LM49250 LM49250 Symbol Parameter Conditions Typical Limit (Note 6) (Note 7) Units (Limits) VDD = 3.0V, f = 1kHz Loudspeaker Mode (stereo) RL = 4Ω, THD+N = 10% RL = 4Ω, THD+N = 1% RL = 8Ω, THD+N = 10% POUT Output Power RL = 8Ω, THD+N = 1% Headphone Mode (stereo) RL = 16Ω, THD+N = 1% RL = 32Ω, THD+N = 1% Earpiece Mode (mono) RL = 16Ω, THD+N = 1% RL = 32Ω, THD+N = 1% 800 650 515 420 mW mW mW mW 32 33 mW mW 35 35 mW mW 1210 985 775 625 540 mW mW mW mW (min) 41 45 38 mW mW (min) 70 50 45 mW mW (min) VDD = 3.6V, f = 1kHz Loudspeaker Mode (stereo) RL = 4Ω, THD+N = 10% RL = 4Ω, THD+N = 1% RL = 8Ω, THD+N = 10% POUT Output Power RL = 8Ω, THD+N = 1% Headphone Mode (stereo) RL = 16Ω, THD+N = 1% RL = 32Ω, THD+N = 1% Earpiece Mode (mono), 0dB RL = 16Ω, THD+N = 1% RL = 32Ω, THD+N = 1% VDD = 5.0V, f = 1kHz Loudspeaker Mode (stereo) RL = 4Ω, THD+N = 10% RL = 4Ω, THD+N = 1% RL = 8Ω, THD+N = 10% POUT Output Power RL = 8Ω, THD+N = 1% Headphone Mode (stereo), 0dB RL = 16Ω, THD+N = 1% RL = 32Ω, THD+N = 1% Earpiece Mode (mono) RL = 16Ω, THD+N = 1% RL = 32Ω, THD+N = 1% HP Mode (output mode 2) RL = 16Ω, POUT = 20mW RL = 32Ω, POUT = 20mW THD+N Total Harmonic Distortion + Noise LS Mode (output mode 2) RL = 4Ω, POUT = 600mW/Ch RL = 8Ω, POUT = 300mW/Ch Earpiece Mode (output mode 1) Differential Input RL = 16Ω, POUT = 50mW RL = 32Ω, POUT = 30mW www.national.com 6 2.43 1.97 1.54 1.23 W W W W 41 45 mW mW 170 90 mW mW 0.015 0.01 % % 0.03 0.02 % % 0.05 0.03 % % Symbol Parameter Conditions Typical Limit (Note 6) (Note 7) Units (Limits) Differential Inputs, A-weighted, AV = 0dB eN η Noise Efficiency Headphone, AV = 0dB HP Mode 2 HP Mode 7 11 18 μV μV Earpiece, AV = 6dB EP Mode 1 EP Mode 3 12 14 μV μV Loudspeaker, AV = 0dB LS Mode 2 LS Mode 7 45 50 μV μV 85 % Differential Input Mode 106 dB Single-Ended Input Mode 100 dB Differential Input Mode 94 dB Single-Ended Input Mode 91 dB ms ms LS Mode, POUT = 500mW, VDD = 3.6V LS Mode, f = 1kHz, RL = 8Ω, VIN = 1VP-P Xtalk Crosstalk HP Mode, f = 1kHz, RL = 32Ω, VIN = 1VP-P TON Turn on Time T_ON = 0 T_ON = 1 35 20 ZIN Input Impedance Maximum Gain Minimum Gain 17 200 ±3.4 ±40 kΩ (max) kΩ (max) VIN = 1VP-P Mute CMRR Mute Attenuation Common Mode Rejection Ratio LS Mode –94 dB HP Mode –109 dB Earpiece Mode –109 dB 57 65 65 dB dB dB f = 217Hz 95 dB f = 1kHz 92 dB f = 217Hz 96 dB f = 1kHz 94 dB f = 217Hz 70 dB f = 1kHz 70 dB f = 217Hz 92 dB f = 1kHz 89 dB f = 217Hz 70 dB f = 1kHz 70 dB Differential Inputs,VIN = 500mVPP, f = 217Hz, LS Mode (output mode 2) HP Mode (output mode 2) EP Mode (output mode 1) Differential Inputs, VRIPPLE = 200mVP-P HP (output mode 1, 2, 3) PSRR Power Supply Rejection Ratio EP (output mode 1) LS (output mode 1, 2) Differential Inputs, VRIPPLE = 200mVP-P EP Mode = 3 PSRR Power Supply Rejection Ratio LS Mode = 3 7 www.national.com LM49250 LM49250 LM49250 LM49250 Symbol Parameter Conditions Typical Limit (Note 6) (Note 7) Units (Limits) Single-Ended Inputs, VRIPPLE = 200mVP-P HP (output mode 2, 3) PSRR Power Supply Rejection Ratio f = 217Hz 84 dB f = 1kHz 81 dB f = 217Hz 69.1 dB f = 1kHz 68.1 dB f = 217Hz 78 dB f = 1kHz 76 dB LS (output mode 2) EP (output mode 2) www.national.com 8 (Notes 1, 2) The following specifications apply for 2.7V ≤ VDD ≤ 5.5V, and 1.7V ≤ I2CVDD ≤ 2.2V, unless otherwise specified. Limits apply for TA = 25°C. LM49250 Symbol Parameter Conditions Typical Limit (Note 6) (Note 7) Units (Limits) t1 SCL Period 2.5 μs (min) t2 SDA Set-up Time 250 ns (min) t3 SDA Stable Time 0 ns (min) t4 Start Condition Time 250 ns (min) t5 Stop Condition Time 250 ns (min) t6 SDA Hold time 250 ns (min) VIH Digital Input High Voltage 0.7*I2CV DD V (min) VIL Digital Input Low Voltage 0.3*I2CVDD V (max) RESETIH Reset Input High Voltage 1.6 V (min) RESETIL Reset Input Low Voltage 0.6 V (max) The following specifications apply for 2.7V ≤ VDD ≤ 5.5V, and 2.2V ≤ I2CVDD ≤ 5.5V, unless otherwise specified. Limits apply for TA = 25°C. LM49250 Symbol Parameter Conditions Typical Limit (Note 6) (Note 7) Units (Limits) t1 SCL Period 2.5 μs (min) t2 SDA Set-up Time 100 ns (min) t3 SDA Stable Time 0 ns (min) t4 Start Condition Time 100 ns (min) t5 Stop Condition Time 100 ns (min) t6 SDA Hold Time 100 ns (min) VIH Digital Input High Voltage 0.7*I2CV DD V (min) VIL Digital Input Low Voltage 0.3*I2CVDD V (max) RESETIH Reset Input High Voltage 1.6 V (min) RESETIL Reset Input Low Voltage 0.6 V (max) Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. Note 4: Human body model, applicable std. JESD22-A114C. Note 5: Machine model, applicable std. JESD22-A115-A. Note 6: Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 7: Datasheet min/max specification limits are guaranteed by test or statistical analysis. Note 8: RL is a resistive load in series with two inductors to simulate an actual speaker load. For RL = 8Ω, the load is 15µH + 8Ω, +15µH. For RL = 4Ω, the load is 15µH + 4Ω + 15µH. 9 www.national.com LM49250 Control Interface Electrical Characteristics LM49250 Typical Performance Characteristics THD+N vs Frequency Differential Input, Speaker Mode 2 VDD = 5V, POUT = 1.2W/Ch, RL = 4Ω THD+N vs Frequency Differential Input, Speaker Mode 2 VDD = 3.6V, POUT = 450mW/Ch, RL = 8Ω 300166l6 300166l7 THD+N vs Frequency Differential Input, Speaker Mode 2 VDD = 5V, POUT = 750mW/Ch, RL = 8Ω THD+N vs Frequency Single-ended Input, Speaker Mode 2 VDD = 3.6V, POUT = 650mW/Ch, RL = 4Ω 300166m1 300166l8 THD+N vs Frequency Single-ended Input, Speaker Mode 2 VDD = 5V, POUT = 1.3W/Ch, RL = 4Ω THD+N vs Frequency Single-ended Input, Speaker Mode 2 VDD = 3.6V, POUT = 450mW/Ch, RL = 8Ω 300166m2 www.national.com 300166m3 10 THD+N vs Frequency Differential Input, Headphone Mode 2 VDD = 3.6V, POUT = 30mW/Ch, RL = 16Ω 300166m4 300166n4 THD+N vs Frequency Differential Input, Headphone Mode 2 VDD = 3.6V, POUT = 30mW/Ch, RL = 32Ω THD+N vs Frequency Single-ended Input, Headphone Mode 2 VDD = 3.6V, POUT = 30mW, RL = 16Ω 300166n5 300166n8 THD+N vs Output Power Differential Input, Speaker Mode 2 AV = 0dB, RL = 4Ω, f = 1kHz THD+N vs Frequency Single-ended Input, Headphone Mode 2 VDD = 3.6V, POUT = 30mW, RL = 32Ω 300166l2 300166n9 11 www.national.com LM49250 THD+N vs Frequency Single-ended Input, Speaker Mode 2 VDD = 5V, POUT = 800mW/Ch, RL = 8Ω LM49250 THD+N vs Output Power Differential Input, Speaker Mode 2 AV = 0dB, RL = 8Ω, f = 1kHz THD+N vs Output Power Single-ended Input, Speaker Mode 2 AV = 6dB, RL = 4Ω, f = 1kHz 300166l4 300166l9 THD+N vs Output Power Single-ended Input, Speaker Mode 2 AV = 6dB, RL = 8Ω, f = 1kHz THD+N vs Output Power Differential Input, Headphone Mode 2 VDD = 3.6V, AV = 0dB, RL = 16Ω, f = 1kHz 300166n2 300166m0 THD+N vs Output Power Single-ended Input, Headphone Mode 2 VDD = 3.6V, AV = 0dB, RL = 16Ω, f = 1kHz THD+N vs Output Power Differential Input, Headphone Mode 2 VDD = 3.6V, AV = 0dB, RL = 32Ω, f = 1kHz 300166n3 www.national.com 300166n6 12 LM49250 THD+N vs Output Power Single-ended Input, Headphone Mode 2 VDD = 3.6V, AV = 0dB, RL = 32Ω, f = 1kHz THD+N vs Frequency Differential Input, Earpiece Mode 1 VDD = 3.6V, POUT = 40mW, RL = 16Ω 300166o2 300166n7 THD+N vs Frequency Differential Input, Earpiece Mode 1 VDD = 5V, POUT = 140mW, RL = 16 Ω THD+N vs Frequency Differential Input, Earpiece Mode 1 VDD = 3.6V, POUT = 65mW, RL = 32Ω 300166o3 300166o4 THD+N vs Frequency Differential Input, Earpiece Mode 1 VDD = 5V, POUT = 160mW, RL = 32Ω THD+N vs Output Power Differential Input, Earpiece Mode 1 AV = 6dB, RL = 16Ω, f = 1kHz 300166o0 300166o5 13 www.national.com LM49250 THD+N vs Output Power Differential Input, Earpiece Mode 1 AV = 6dB, RL = 32Ω, f = 1kHz Efficiency vs Output Power Speaker Mode 2, RL = 4Ω, f = 1kHz 300166o7 300166o1 Efficiency vs Output Power Speaker Mode 2, RL = 8Ω, f = 1kHz Power Dissipation vs Output Power Speaker Mode 2, RL = 4Ω, f = 1kHz 300166o9 300166o8 Power Dissipation vs Output Power Speaker Mode 2, RL = 8Ω, f = 1kHz Power Dissipation vs Output Power Headphone Mode 2, VDD = 3.6V RL = 16Ω, f = 1kHz 300166p0 300166p4 www.national.com 14 LM49250 Power Dissipation vs Output Power Headphone Mode 2, VDD = 3.6V RL = 32Ω, f = 1kHz Power Dissipation vs Output Power Earpiece Mode 1, VDD = 3.6V RL = 16Ω, f = 1kHz 300166p5 300166p8 Power Dissipation vs Output Power Earpiece Mode 1, VDD = 3.6V RL = 32Ω, f = 1kHz PSRR vs Frequency Differential Input, Speaker Mode 2 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 8Ω 300166p9 300166r2 PSRR vs Frequency Differential Input, Speaker Output Mode 2 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 8Ω PSRR vs Frequency Differential Input, Earpiece Mode 1 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 32Ω 300166r4 300166r3 15 www.national.com LM49250 PSRR vs Frequency Differential Input, Earpiece Output Mode 3 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 32Ω PSRR vs Frequency Single-Ended Input, Earpiece Mode 2, 3 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 32Ω 300166r5 300166r6 PSRR vs Frequency Single-Ended Input, Speaker Mode 3 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 8Ω PSRR vs Frequency Differential Input, Headphone 2 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 32Ω 300166p6 300166p3 PSRR vs Frequency Single-Ended Input, Speaker Output Mode 2 VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 32Ω CMRR vs Frequency Speaker Output Mode 2 VDD = 3.6V, VIN = 500mVP-P 300166q0 300166p7 www.national.com 16 LM49250 CMRR vs Frequency Headphone Mode 2 VDD = 3.6V, VIN = 500mVP-P CMRR vs Frequency Earpiece Mode 1 VDD = 3.6V, VIN = 500mVP-P 300166q2 300166q1 17 www.national.com LM49250 write to the I2C bus. The maximum clock frequency specified by the I2C standard is 400kHz. To avoid an address conflict with another device on the I2C bus, the LM49250 address is determined by the ADR pin, the state of ADR determines address bit A1 (Table 2). When ADR = 0, the address is 1111 1000. When ADR = 1 the device address is 1111 1010. Application Information I2C COMPATIBLE INTERFACE The LM49250 is controlled through an I2C compatible serial interface that consists of two wires; clock (SCL) and data (SDA). The clock line is uni-directional. The data line is bidirectional (open-collector) although the LM49250 does not TABLE 2. Device Address ADR A7 A6 A5 A4 A3 A2 A1 A0 X 1 1 1 1 1 0 X 0 0 1 1 1 1 1 0 0 0 1 1 1 1 1 1 0 1 0 is generated. If the LM49250 receives the address correctly, then the LM49250 pulls the data line low, generating an acknowledge bit (ACK). Once the master device has registered the ACK bit, the 8-bit register address/data word is sent. Each data bit should be stable while the clock level is high. After the 8–bit word is sent, the LM49250 sends another ACK bit. Following the acknowledgement of the data word, the master device issues a “stop” bit, allowing SDA to go high while the clock signal is high. BUS FORMAT The I2C bus format is shown in Figure 2. The “start” signal is generated by lowering the data signal while the clock is high. The start signal alerts all devices on the bus that a device address is being written to the bus. The 8-bit device address is written to the bus next, most significant bit first. The data is latched in on the rising edge of the clock. Each address bit must be stable while the clock is high. After the last address bit is sent, the master device releases the data line, during which time, an acknowledge clock pulse 30016609 FIGURE 2. I2C Bus Format 300166q3 FIGURE 3. I2C Timing Diagram www.national.com 18 300166l0 FIGURE 4. I2C Reset Timing Diagram TABLE 3. I2C Control Registers REGI REGISTER NAME STER (#) D7 D6 D5 D4 D3 D2 D1 D0 C00 0 Shutdown Control 0 0 0 0 0 0 0 PWR_ON C01 0.1 Stereo Input Mode Control 0 0 0 0 1 MUTE L1_INSEL L2_INSEL C02 0.2 3D Control 0 0 0 1 0 3DN1 3DLS 3DHP C03 0.3 3D Gain Control 0 0 0 1 1 0 3D_GAIN1 3D_GAIN0 C10 1 LDO Control 0 0 1 0 0 0 LDOH T_ON C11 1 Headphone Gain Control 0 0 1 0 1 HPG2 HPG1 HPG0 Speaker Output Stage Gain Control 0 0 1 1 0 SS2 LSRG LSLG C12 C13 1 Earpiece MUX/ Gain COntrol 0 0 1 1 1 EP_GAIN EP_MSEL EP_SSEL C2X 2 Speaker (LS) Output MUX Control 0 1 0 LS_XSEL LSR_MSEL LSR_SSEL LSL_MSEL LSL_SSEL C3X 3 Headphone (HP) Output MUX Control 0 1 1 HP_XSEL HP_MSEL HPR_SSEL HPL_MSEL HP_LSSEL C4X 4 Output On/Off Control 1 0 0 EP_ON HPR_ON HPL_ON LRS_ON LSL_ON C5X 5 Mono Input Gain Control 1 0 1 MG4 MG3 MG2 MG1 MG0 C6X 6 Left Input Gain Control 1 1 0 LG4 LG3 LG2 LG1 LG0 C7X 7 Right Input Gain Control 1 1 1 RG4 RG3 RG2 RG1 RG0 1. 3DN = 0 provides a “wider” aural effect or 3DN = 1 a “narrower” aural effect. 2. SS controls the Spread Spectrum function ON (SS = 1) or OFF (SS = 0). 19 www.national.com LM49250 until an I2C command brings the device out of shutdown (see timing diagram in Figure 4). This pin can be connected to I2CVDD pin to prevent undefined and unwanted state changes that may occur when the I2C supply voltage is cycled. I2C RESET PIN When the I2C RESET pin is pulled low, the device will go into shutdown and the PWR_ON bit (see Table 3) in the shutdown control register will reset. The device will remain in shutdown LM49250 Edge Rate Control (ERC) that greatly reduces the high frequency components of the output square waves by controlling the output rise and fall times, slowing the transitions to reduce RF emissions, while maximizing THD+N and efficiency performance. The overall result of the E2S system is a filterless Class D amplifier that passes FCC Class B radiated emissions standards with 20 inches (50.8cm) of twisted pair cable, with excellent 0.02% THD+N and high 87% efficiency. GENERAL AMPLIFIER FUNCTION Class D Amplifier The LM49250 features a high-efficiency, filterless, Class D stereo amplifier. The LM49250 Class D amplifiers feature a filterless modulation scheme. When there is no input signal applied, the outputs switch between VDD and GND at a 50% duty cycle, with both outputs on, each channel in phase. Because the outputs of the LM49250 are differential and in phase, the result is zero net voltage across the speaker and no load current during the ideal state, thus conserving power. The switching frequency of each output is 300 kHz. When an input signal is applied, the duty cycle (pulse width) changes. For increasing output voltages, the duty cycle of one output increases while the duty cycle of the other output decreases. For decreasing output voltages, the converse occurs. The difference between the two pulse widths yields the differential output voltage across the load. Differential Audio Amplifier Configuration As logic supply voltages continue to shrink, system designers increasingly turn to differential signal handling to preserve signal to noise ratio with decreasing voltage swing. The LM49250 can be configured as a fully differential amplifier, amplifying the difference between the two inputs. The advantage of the differential architecture is any signal component that is common to both inputs is rejected, improving commonmode rejection (CMRR) and increasing the SNR of the amplifier by 6dB over a single-ended architecture. The improved CMRR and SNR of a differential amplifier reduce sensitivity to ground offset related noise injection, especially important in noisy applications such as cellular phones. Set bits L1_INSEL and L2_INSEL = 0 for differential input mode. The left and right stereo inputs have selectable differential or singleended input modes, while the mono input is always differential. Spread Spectrum The LM49250 features a filterless spread spectrum modulation scheme. The switching frequency varies by ±30% about a 300kHz center frequency, reducing the wideband spectral content, reducing EMI emissions radiated by the speaker and associated cables and traces. Where a fixed frequency class D exhibits large amounts of spectral energy at multiples of the switching frequency, the spread spectrum architecture of the LM49250 spreads that energy over a larger bandwidth. The cycle-to-cycle variation of the switching period does not affect the audio reproduction, efficiency, or PSRR. In the Speaker Output Stage Gain control register, set SS = 1 to turn on the Spread Spectrum function. Single-Ended Input Configuration The left and right stereo inputs of the LM49250 can be configured for single-ended sources (Figure 5). In single-ended input mode, the LM49250 can accept up to 4 different singleended audio sources. Set bits L1_INSEL = 1 and L2_INSEL = 0 to use the R1 and L1inputs. Set L1 _INSEL = 0 and L2_INSEL = 1 to use the R2 and L2 inputs. Set L1_INSEL = L2_INSEL = 1 to use both input pairs. Table 4 shows the available input combinations. Enhanced Emissions Suppression System (E2S) The LM49250 features National’s patent-pending E2S system that reduces EMI, while maintaining high quality audio reproduction and efficiency. The LM49250 features advanced www.national.com 20 LM49250 300166l1 FIGURE 5. Single-Ended Input Configuration TABLE 4. Stereo Input Modes Input Mode L1_INSEL L2_INSEL Input Description 0 0 0 Fully Differential Input Mode 1 0 1 Single-ended input. R2 and L2 selected 2 1 0 Single-ended input. R1 and L1 selected 3 1 1 Single-ended input. R1 mixed with R2 and L1 mixed with L2 21 www.national.com LM49250 the negative power supply. Lower ESR capacitors minimize the output ripple and reduce the output impedance of the charge pump. The LM49250 charge pump design is optimized for 2.2μF, low ESR ceramic capacitors for both CC and CSS ( See Figure 1). Ground Reference Headphone Amplifier The LM49250 features a low noise inverting charge pump that generates an internal negative supply voltage. This allows the headphone outputs to be biased about GND instead of a nominal DC voltage, like traditional headphone amplifiers. Because there is no DC component, the large DC blocking capacitors (typically 220μF) are not necessary. The coupling capacitors are replaced by two, small ceramic charge pump capacitors, saving board space and cost. Eliminating the output coupling capacitors also improves low frequency response. In traditional headphone amplifiers, the headphone impedance and the output capacitor form a high pass filter that not only blocks the DC component of the output, but also attenuates low frequencies, impacting the bass response. Because the LM49250 does not require the output coupling capacitors, the low frequency response of the device is not degraded by external components. In addition to eliminating the output coupling capacitors, the ground referenced output nearly doubles the available dynamic range of the LM49250 headphone amplifiers when compared to a traditional headphone amplifier operating from the same supply voltage. Input Mixer / Multiplexer The LM49250 includes a comprehensive mixer/multiplexer controlled through the I2C interface. The mixer/multiplexer allows any input combination to appear on any output of the LM49250. Control bits LSR_SSEL and LSL_SSEL (loudspeakers), and HPR_SSEL and HPL_SSEL (headphones) select the individual stereo input channels. For example, LSR_SSEL = 1 outputs the right channel stereo input on the right channel loudspeaker, while LSL_SSEL = 1 outputs the left channel stereo input on the left channel loudspeaker. Control bits LSR_MSEL and LSL_MSEL (loudspeaker), and HPR_MSEL and HPR_LSEL (headphones) direct the mono input to the selected output. Control bits LS_XSEL (loudspeaker) and HP_XSEL (headphone) selects both stereo input channels and directs the signals to the opposite outputs. For example, LS_XSEL = 1 outputs the right channel stereo input on the left channel loudspeaker, while the left channel stereo input is output on the right channel loudspeaker. Setting __XSEL selects both stereo inputs simultaneously, unlike the __SSEL controls which select the stereo input channels individually. Multiple input paths can be selected simultaneously. Under these conditions, the selected inputs are mixed together and output on the selected channel. Tables 5 and 6 show how the input signals are mixed together for each possible input selection combination. Charge Pump Capacitor Selection For optimal performance, low (<100mΩ) ESR (equivalent series resistance) ceramic capacitors with X7R dielectric are recommended. Low ESR capacitors keep the charge pump output impedance to a minimum, extending the headroom on the negative supply. Higher ESR capacitors result in a reduction of output power from the audio amplifiers. Charge pump load regulation and output impedance are affected by the value of the flying capacitor (CC). A larger valued CC (up to 3.3μF) improves load regulation and minimizes charge pump output resistance. The switch-on resistance dominates the output impedance for capacitor values above 2.2μF. The output ripple is affected by the value and ESR of the output capacitor (CSS). Larger capacitors reduce output ripple on TABLE 5. Loudspeaker Multiplexer Control LS MODE LS_XSEL LSR_SSEL/ LSL_SSEL LSR_MSEL/ LSL_MSEL LEFT CHANNEL OUTPUT RIGHT CHANNEL OUTPUT 0 0 0 0 Mute Mute 1 0 0 1 M M 2 0 1 0 L' R' 3 0 1 1 M + L' M + R' 4 1 0 0 R' L' 5 1 0 1 M + R' M + L' 6 1 1 0 L' + R' L' + R' 7 1 1 1 M + L' + R' M + L' + R' TABLE 6. Headphone Multiplexer Control HPMODE HP_XSEL HPR_SSEL/ HPL_SSEL HPR_MSEL/ HPL_MSEL LEFT CHANNEL OUTPUT RIGHT CHANNEL OUTPUT 0 0 0 0 Mute Mute 1 0 0 1 M M 2 0 1 0 L' R' 3 0 1 1 M + L' M + R' 4 1 0 0 R' L' 5 1 0 1 M + R' M + L' 6 1 1 0 L' + R' L' + R' 7 1 1 1 M + L' + R' M + L' + R' www.national.com 22 EP MODE EP_SSEL EP_MSEL MONO EARPIECE OUTPUT 0 0 0 Mute 1 0 1 Mono 2 1 0 L' + R' 3 1 1 M + L' + R' M – Mono Input L' – L / L1 / L2 / L1mixL2 R' – R / R1 / R2 / R1mixR2 L – Left Differential Input L1 – Left Single-ended Input 1 L2 – Left Single-ended Input 2 R – Right Differential Input R1 – Right Single-ended Input 1 R2 – Right Single-ended Input 2 amplifiers are powered from the internal LDO. The separate power supplies allow the speakers to operate from a higher voltage for maximum headroom, while the headphone operate from a lower voltage, improving power dissipation. LDO General Information The LM49250 has different supplies for each portion of the device, allowing for the optimum combination of headroom, power dissipation and noise immunity. The speaker amplifiers are powered from VDD(LS). The ground reference headphone TABLE 8. LDO Disabling Options LDOH HPR_ON/HPL_ON PWR_ON VO(LDO) (V) 0 0 X 0 0 1 1 2.25 0 1 0 0 1 X 0 VDD 1 X 1 2.25 perceived spatial effect optimized for stereo headphone listening. The 3D function can be controlled from the 3D control register. Set 3DLS = 0 to disable the loudspeaker 3D; set 3DLS = 1 to enabel the loudspeaker 3D. Similarly, to enable the headphone, set 3DHP = 1 and to disable, set 3DHP = 0. The LM49250 can be programmed for a “narrow” (3DN = 1) or “wide”(3DN = 0) soundstage perception. The narrow soundstage has a more focused approaching sound direction, while the wide soundstage has a spatial, theater-like effect. Within each of these two modes, four discrete levels of 3D effect that can be programmed: low, medium, high, and maximum (Table 9). The difference between each level is 3dB with an ever increasing aural effect with increased level. The external capacitors, shown in Figure 5, are required to enable the 3D effect. The value of the capacitors set the cutoff frequency of the 3D effect, as shown by Equations 1 and 2. Note that the internal 40kΩ resistor is nominal. Shutdown Function The LM49250 features six shutdown modes, configured through the I2C interface. Bit D0 (PWR_ON) in the Shutdown Control register controls the shutdown function of the entire device. Set PWR_ON = 1 to enable the LM49250, set PWR_ON = 0 to disable the device. Bits D0 – D4 in the Output On/Off Control register controls the shutdown function of the individual output channels. EP_ON (D4) controls the earpiece output, HPR_ON (D3) controls the right channel headphone output, HPL_ON (D2) controls the left channel headphone output, LSR_ON (D1) controls the right channel loudspeaker output, and LRL_ON (D0) controls the left channel loudspeaker output. The PWR_ON bit takes precedence over the individual channel controls. National 3D Enhancement The LM49250 features a stereo headphone, 3D audio enhancement effect that widens the perceived soundstage from a stereo audio signal. The 3D audio enhancement creates a TABLE 9. Programmable National 3D Audio 3D Mixing Level 3D-GAIN1 3D_GAIN0 Low 0 0 Medium 0 1 High 1 0 Maximum 1 1 23 www.national.com LM49250 TABLE 7. Earpiece Multiplexer Control LM49250 TABLE 10. 3D Audio Control 3D Function 3DHP / 3DLS HP/LS 3D ON 1 HP/LS 3D OF 0 300166k6 FIGURE 6. External RC Network with Optional R3DL and R3DR f3DL(–3dB) = 1 / (2π x 40kΩ x C3DL) (Hz) (1) f3DR(–3dB) = 1 / (2π x 40kΩ x C3DR) (2) (Hz) Optional resistors R3DL and R3DR can also be added (Figure 6) to affect the -3dB frequency and 3D magnitude. 300166k5 FIGURE 7. External 3D Effect Capacitors f3DL(–3dB) = 1 / [2π x (40kΩ + R3DL) x C3DL] (Hz) (3) f3dB(3D) = 1 / [2π (1+ M) (40kΩ x C3D)] (Hz) (5) f3DR(–3dB) = 1 / [2π x (40kΩ + R3DR) x C3DR] (Hz) (4) CEQUIVALENT(new) = C3D / (1 + M ) (F) (6) ΔAV (change in AC gain) = 1 / 1 + M, where M represents some ratio of the nominal internal resistor, 40kΩ (see example below Table 9). www.national.com 24 AVOL + AOS = ATOTAL (dB) (7) Where AVOL is the volume control level, AOS is the gain setting of the output stage, and ATOTAL is the total gain for the signal path. TABLE 11. 32 Step Volume Control Volume Step MG4/LG4/ RG4 MG3/LG3/ RG3 MG2/LG2/ RG2 MG1/LG1/ RG1 MG0/LG0/ RG0 0 0 0 0 0 0 –64 –58 1 0 0 0 0 1 –54.5 –48.5 2 0 0 0 1 0 –47 –41 3 0 0 0 1 1 –40 –34 4 0 0 1 0 0 –33 –27 5 0 0 1 0 1 –28 –21 6 0 0 1 1 0 –24 –18 7 0 0 1 1 1 –21 –15 8 0 1 0 0 0 –19.5 –13.5 9 0 1 0 0 1 –18 –12 10 0 1 0 1 0 –16.5 –10.5 11 0 1 0 1 1 –15 –9 12 0 1 1 0 0 –13.5 –7.5 13 0 1 1 0 1 –12 –6 14 0 1 1 1 0 –10.5 –4.5 15 0 1 1 1 1 –9.0 –3 16 1 0 0 0 0 –7.5 –1.5 17 1 0 0 0 1 –6 0 18 1 0 0 1 0 –4.5 2.5 19 1 0 0 1 1 –3 3 20 1 0 1 0 0 1.5 4.5 21 1 0 1 0 1 0 6 22 1 0 1 1 0 1.5 7.5 23 1 0 1 1 1 3 9 24 1 1 0 0 0 4.5 10.5 25 1 1 0 0 1 6 12 26 1 1 0 1 0 7.5 13.5 27 1 1 0 1 1 9 15 28 1 1 1 0 0 10.5 16.5 29 1 1 1 0 1 12 18 30 1 1 1 1 0 13.5 19.5 31 1 1 1 1 1 15 21 25 Gain (dB) Gain (dB) (Input Mode 0 & 3) (Input Mode 1 & 2) www.national.com LM49250 a maximum separation of 30dB between the speaker and headphone outputs when both are active. The mono input channel is not affected by L1_INSEL and L2_INSEL, and is always configured as a differential input. Calculate the total gain of a given signal path as follows: Audio Amplifier Gain Setting Each channel of the LM49250 has two separate gain stages. Each input stage features a 32 step volume control (Input Mode 0 & 3) with a range of -64dB to +15dB (Table 11). Each loud speaker output stage has 2 gain settings (Table 12); 6dB and 12dB when either a fully differential signal or two singleended signals are applied on the R1/L1 and R2/L2 pins Each headphone output stage has 8 gain settings (Table 13), 0dB, -1.2 dB,-2.5dB, -4dB, -6dB, -8.5dB, -12dB and -18dB. In single-ended input mode with only one signal applied (Input Mode 1 & 2), the loud speaker and headphone output stage gain settings are increased by 6dB (Table 11). This allows for LM49250 TABLE 12. Loudspeaker Gain Setting LSRG/LSLG Gain (dB) 0 6 1 12 TABLE 13. Headphone Gain Setting HPG2 HPG1 HPG0 Gain (dB) 0 0 0 0 0 0 1 –1.2 0 1 0 –2.5 0 1 1 –4 1 0 0 –6 1 0 1 –8.5 1 1 0 –12 1 1 1 –18 TABLE 14. EP_Gain EP_Gain Gain (dB) 0 0 1 6 THD+N by reducing noise at the BYPASS node. Use a 4.7µF capacitor, placed as close to the device as possible for CB. Power Dissipation and Efficiency The major benefit of a Class D amplifier is increased efficiency versus Class AB. The efficiency of the LM49250 speaker amplifiers is attributed to the output transistors’ region of operation. The Class D output stage acts as current steering switches, consuming negligible amounts of power compared to their Class AB counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET on-resistance, along with the switching losses due to gate charge. The maximum power dissipation per ground referenced headphone channel is given by: PDMAX-HP = VDD2 / 2π2RL + (IDDQ* VDD ) (W) Audio Amplifier Input Capacitor Selection Input capacitors, CIN, in conjunction with the input impedance of the LM49250 forms a high-pass filter that removes the DC bias from an incoming signal. The AC-coupling capacitor allows the amplifier to bias the signal to an optimal DC level. Assuming zero source impedance, the -3dB point of the highpass filter is given by: f-3dB = 1 / [2πRINCIN] (8) (9) Refer to the Typical Performance Characteristics curves for power dissipation information at various power levels. Audio Amplifier Power Supply Bypassing / Filtering Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass capacitors as close to the device as possible. Typical applications employ a voltage regulator with 10µF and 0.1µF bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the LM49250 supply pins. A 1µF ceramic capacitor placed close to each supply pin is recommended. EVALUATION BOARD For information on the evaluation board, refer to Application Notes (AN-1680). PCB LAYOUT GUIDELINES Minimize trace impedance of the power, ground and all output traces for optimum performance. Voltage loss due to trace Bypass Capacitor Selection The LM49250 generates a VDD/2 common-mode bias voltage internally. The BYPASS capacitor, CB, improves PSRR and www.national.com (10) Choose CIN such that f-3dB is well below the lowest frequency of interest. Setting f-3dB too high affects the low-frequency response of the amplifier. Use capacitors with low voltage coefficient dielectrics, such as tantalum or aluminum electrolytic. Capacitors with high-voltage coefficients, such as ceramics, may result in increased distortion at low frequencies. Other factors to consider when designing the input filter include the constraints of the overall system. Although high fidelity audio requires a flat frequency response between 20Hz and 20kHz, portable devices such as cell phones may only concentrate on the frequency range of the spoken human voice (typically 300Hz to 4kHz). In addition, the physical size of the speakers used in such portable devices limits the low frequency response; in this case, frequencies below 150Hz may be filtered out. The maximum power dissipation for the mono BTL earpiece output is given by: PDMAX-EP = 4VDD2 / 2π2RL +(IDDq * VDD) (Hz) 26 Proper grounding improves audio performance, minimizes crosstalk between channels and prevents switching noise from interfering with the audio signal. Use of power and ground planes is recommended. Place all digital components and digital signal traces as far as possible from analog components and traces. Do not run digital and analog traces in parallel on the same PCB layer. 27 www.national.com LM49250 resistance between the LM49250 and the load results in decreased output power and efficiency. Trace resistance between the power supply and GND of the LM49250 has the same effect as a poorly regulated supply, increased ripple and reduced peak output power. Use wide traces for power-supply inputs and amplifier outputs to minimize losses due to trace resistance, as well as route heat away from the device. LM49250 Demo Board Schematic 300166r1 www.national.com 28 LM49250 Demo Board Layout 300166q7 Top Silkscreen 300166q8 Top Layer 29 www.national.com LM49250 300166q5 Layer 2 300166q6 Layer 3 www.national.com 30 LM49250 300166q4 Bottom Layer 31 www.national.com LM49250 LM49250 Build of Materials Part Description Qty Ref Designator Manufacturer Part Number LM49250 DEMO BOARD 1 LM49250TL 1 U1 CAP CER 1UF 16V X7R 1206 10% 6 C1–C6 muRata GRM319R71C105KC11D CAP CER 4.7UF 16V X7R 0805 4 C7, C13, C14, C15 muRata GRM21BR71C475KA73L CAP CER 2.2UF 16V X5R 0805 3 C8, C9, C10 muRata GRM21BR61C225KA88L CAP CER 68nF 16V X7R 0805 2 C11, C12 muRata GRM188R71C683KA01D CAP CER 1UF 16V X7R 0805 1 C16 muRata GRM21BR71C105KA01L RES 0OHM 1/8W 5% 0805 SMD 1 R1, R2 Vishay/Dale CRCW08050000Z0EA Jumper Header Vertical Mount 2X1 0.100 7 J1, J2, J3, J8, J11, J12, J10 (bottom) Jumper Header Vertical Mount 4X1 0.101 3 J5, J6, J7 Jumper Header Vertical Mount 3X1 0.102 2 J9, J4, J10 (top) Headphone Jack 1 U2 www.national.com 32 LM49250 Revision History Rev Date 1.0 01/23/08 Initial release. Description 1.01 09/19/08 Text edits. 1.02 12/15/08 Changed the limit on Pout (VDD = 3.6V, Loudspeaker mode, Rl = 8Ω, 1% THD) form 500 to 540. 33 www.national.com LM49250 Physical Dimensions inches (millimeters) unless otherwise noted micro SMDxT Package Order Number LM49250RL NS Package Number RLA36CCA X1 = 3.051, X2 = 3.051, X3 = 0.650 www.national.com 34 LM49250 Notes 35 www.national.com LM49250 Enhanced Emissions Suppression Stereo Class D Audio Sub-System with Ground Referenced Headphone Amplifier and Mono Earpiece Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage Reference www.national.com/vref Design Made Easy www.national.com/easy PowerWise® Solutions www.national.com/powerwise Solutions www.national.com/solutions Serial Digital Interface (SDI) www.national.com/sdi Mil/Aero www.national.com/milaero Temperature Sensors www.national.com/tempsensors Solar Magic® www.national.com/solarmagic Wireless (PLL/VCO) www.national.com/wireless Analog University® www.national.com/AU THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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