FREESCALE MPXV6115V

Pressure
Freescale Semiconductor
MPXV6115V
Rev 0, 11/2009
High Temperature Accuracy
Integrated Silicon Pressure Sensor
for Measuring Absolute Pressure,
On-Chip Signal Conditioned,
Temperature Compensated and
Calibrated
The MPXV6115V series sensor integrates on-chip, bipolar op amp circuitry
and thin film resistor networks to provide a high output signal and temperature
compensation. The small form factor and high reliability of on-chip integration
make the Freescale Semiconductor, Inc. pressure sensor a logical and
economical choice for the system designer.
The MPXV6115V series piezoresistive transducer is a state-of-the-art,
monolithic, signal conditioned, silicon pressure sensor. This sensor combines
advanced micromachining techniques, thin film metallization, and bipolar
semiconductor processing to provide an accurate, high level analog output
signal that is proportional to applied pressure.
MPXV6115V
Series
-115 to 0 kPa (-16.7 to 2.2 psi)
0.2 to 4.6 V Output
Application Examples
• Vacuum Pump Monitoring
• Brake Booster Monitoring
Features
•
•
•
•
•
Improved Accuracy at High Temperature
1.5% Maximum Error over 0° to 85°C
Ideally suited for Microprocessor or Microcontroller-Based Systems
Temperature Compensated from -40° to +125°C
Durable Thermoplastic (PPS) Surface Mount Package
ORDERING INFORMATION
Case
Device Name
No.
None
Small Outline Package (MPXV6115V Series)
MPXV6115VC6U
MPXV6115VC6T1
482A
482A
# of Ports
Single
•
•
Dual
Gauge
Pressure Type
Differential
• Vacuum/Gauge
• Vacuum/Gauge
SMALL OUTLINE PACKAGE
MPXV6115VC6U/6T1
CASE 482A-01
© Freescale Semiconductor, Inc., 2009. All rights reserved.
Absolute
Device
Marking
MPXV6115V
MPXV6115V
Pressure
Operating Characteristics
Table 1. Operating Characteristics (VS = 5.0 Vdc, TA = 25°C unless otherwise noted, P1 > P2)
Characteristic
Symbol
Min
Typ
Max
Unit
Pressure Range
POP
-115
—
0
kPa
Supply Voltage(1)
VS
4.75
5.0
5.25
Vdc
Supply Current
Io
—
6.0
10
mAdc
Full Scale Output(2)
@ VS = 5.0 Volts
(0 to 85°C)
VFSO
4.534
4.6
4.665
Vdc
Full Scale Span(3)
@ VS = 5.0 Volts
(0 to 85°C)
VFSS
—
4.4
—
Vdc
Accuracy(4)
(0 to 85°C)
—
—
—
±1.5
%VFSS
Sensitivity
V/P
—
38.26
—
mV/kPa
(5)
tR
—
1.0
—
ms
Warm-Up Time(6)
—
—
20
—
ms
Offset Stability(7)
—
—
±0.5
—
%VFSS
Response Time
1. Device is ratiometric within this specified excitation range.
2. Full Scale Output (VFSO) is defined as the output voltage at the maximum or full rated pressure.
3. Full Scale Span (VFSS) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the
minimum rated pressure.
4. Accuracy is the deviation in actual output from nominal output over the entire pressure range and temperature range as a percent of span
at 25°C due to all sources of error including the following:
Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range.
Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is cycled to and
from the minimum or maximum operating temperature points, with zero differential pressure applied.
Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from minimum or
maximum rated pressure at 25°C.
TcSpan: Output deviation over the temperature range of 0° to 85°C, relative to 25°C.
TcOffset: Output deviation with minimum pressure applied, over the temperature range of 0° to 85°C, relative to 25°C.
5. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a
specified step change in pressure.
6. Warm-up Time is defined as the time required for the product to meet the specified output voltage after the pressure has been stabilized.
7. Offset Stability is the product's output deviation when subjected to 1000 cycles of Pulsed Pressure, Temperature Cycling with Bias Test.
MPXV6115V
2
Sensors
Freescale Semiconductor
Pressure
Maximum Ratings
Table 2. Maximum Ratings(1)
Rating
Symbol
Value
Units
Maximum Pressure (P1 > P2)
Pmax
400
kPa
Storage Temperature
Tstg
-40 to +125
°C
Operating Temperature
TA
-40 to +125
°C
Output Source Current @ Full Scale Output(2)
I o+
0.5
mAdc
Output Sink Current @ Minimum Pressure Offset(2)
Io -
-0.5
mAdc
1. Exposure beyond the specified limits may cause permanent damage or degradation to the device.
2. Maximum Output Current is controlled by effective impedance from Vout to Gnd or Vout to VS in the application circuit.
Figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip.
VS
2
Thin Film
Temperature
Compensation
And
Gain Stage #1
Sensing
Element
GND
3
Gain Stage #2
And
Ground
Reference
Shift Circuitry
4
Vout
Pins 4, 5, and 6 are no connects
Figure 1. Fully Integrated Pressure Sensor Schematic
MPXV6115V
Sensors
Freescale Semiconductor
3
Pressure
On-chip Temperature Compensation and Calibration
Figure 2 illustrates the absolute sensing chip in the basic
Super Small Outline chip carrier (Case 482A).
Figure 3 shows a typical application circuit (output source
current operation).
Figure 4 shows the sensor output signal relative to
pressure input. Typical minimum and maximum output
curves are shown for operation over 0° to 85°C temperature
range. The output will saturate outside of the rated pressure
range.
A fluorosilicone gel isolates the die surface and wire bonds
from the environment, while allowing the pressure signal to
be transmitted to the silicon diaphragm. The MPXV6115V
series pressure sensor operating characteristics, internal
reliability and qualification tests are based on use of dry air as
the pressure media. Media other than dry air may have
adverse effects on sensor performance and long-term
reliability. Contact the factory for information regarding media
compatibility in your application.
Fluorosilicone
Gel Die Coat
Stainless
Steel Cap
Die
P1
Wire
Bond
Thermoplastic
Case
Lead
Frame
P2
Die Bond
Differential Sensing
Element
Figure 2. Cross Sectional Diagram SSOP (not to scale)
+5.0 V
VS Pin 2
MPXV6115V
100 nF
Vout Pin 4
to ADC
47 pF
GND Pin 3
51 K
Figure 3. Typical Application Circuit
(Output Source Current Operation)
Transfer Function MPXV6115VC6U
5
4.5
4
Output (Volts)
3.5
3
2.5
Transfer Function:
Vout = VS*[(0.007652*P) + 0.92] ± (Pressure error)
*Temp Factor*0.007652*VS)
VS = 5.0 V ± 0.25 Vdc
TEMP = 0-85° C
Max
2
Min
1.5
1
0.5
0
-115
-95
-75
-55
Vout vs. Vacuum
-35
-15
0
Figure 4. Output vs. Absolute Pressure
MPXV6115V
4
Sensors
Freescale Semiconductor
Pressure
Transfer Function (MPXV6115V)
Nominal Transfer Value:
Vout = VS x (0.007652 x P + 0.92)
± (Pressure Error x Temp. Factor x 0.007652 x VS)
VS = 5.0 ± 0.25 Vdc
Temperature Error Band
MPXV6115V
4.0
3.0
Temp.
Multiplier
- 40
0 to 85
125
3
1
2
2.0
1.0
0.0
-40
-20
0
20
40
60
80
100
120
130
140
Temperature in °C
NOTE: The Temperature Multiplier is a linear response from 0° to -40°C and from 85° to 125°C.
Pressure Error Band
Error Limits for Pressure
1.950
Pressure Error (kPa)
1.725
1.500
0
-1.500
-115
-100
-85
-45
-30
-15
0
Pressure in kPa
(below atmospheric)
-1.725
-1.950
Pressure
-115 to 0 kPa
Error (max)
± 1.725 kPa
MPXV6115V
Sensors
Freescale Semiconductor
5
Pressure
SURFACE MOUNTING INFORMATION
MINIMUM RECOMMENDED FOOTPRINT FOR SMALL OUTLINE PACKAGE
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor package must be
the correct size to ensure proper solder connection interface
between the board and the package. With the correct pad
geometry, the packages will self-align when subjected to a
solder reflow process. It is always recommended to fabricate
boards with a solder mask layer to avoid bridging and/or
shorting between solder pads, especially on tight tolerances
and/or tight layouts.
0.100 TYP
2.54
0.660
16.76
0.060 TYP 8X
1.52
0.300
7.62
0.100 TYP 8X
2.54
inch
mm
Figure 5. SOP Footprint (Case 482A)
MPXV6115V
6
Sensors
Freescale Semiconductor
Pressure
PACKAGE DIMENSIONS
-A-
D
4
0.25 (0.010)
5
N
8 PL
M
T B
S
A
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006).
5. ALL VERTICAL SURFACES 5˚ TYPICAL DRAFT.
-BG
8
1
S
W
V
C
H
J
-TK
M
PIN 1 IDENTIFIER
DIM
A
B
C
D
G
H
J
K
M
N
S
V
W
INCHES
MIN
MAX
0.415 0.425
0.415 0.425
0.500 0.520
0.038 0.042
0.100 BSC
0.002 0.010
0.009 0.011
0.061 0.071
0˚
7˚
0.444 0.448
0.709 0.725
0.245 0.255
0.115 0.125
MILLIMETERS
MIN
MAX
10.54
10.79
10.54
10.79
12.70
13.21
0.96
1.07
2.54 BSC
0.05
0.25
0.23
0.28
1.55
1.80
0˚
7˚
11.28
11.38
18.01
18.41
6.22
6.48
2.92
3.17
SEATING
PLANE
CASE 482A-01
ISSUE A
SMALL OUTLINE PACKAGE
MPXV6115V
Sensors
Freescale Semiconductor
7
How to Reach Us:
Home Page:
www.freescale.com
Web Support:
http://www.freescale.com/support
USA/Europe or Locations Not Listed:
Freescale Semiconductor, Inc.
Technical Information Center, EL516
2100 East Elliot Road
Tempe, Arizona 85284
1-800-521-6274 or +1-480-768-2130
www.freescale.com/support
Europe, Middle East, and Africa:
Freescale Halbleiter Deutschland GmbH
Technical Information Center
Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English)
+46 8 52200080 (English)
+49 89 92103 559 (German)
+33 1 69 35 48 48 (French)
www.freescale.com/support
Japan:
Freescale Semiconductor Japan Ltd.
Headquarters
ARCO Tower 15F
1-8-1, Shimo-Meguro, Meguro-ku,
Tokyo 153-0064
Japan
0120 191014 or +81 3 5437 9125
[email protected]
Asia/Pacific:
Freescale Semiconductor China Ltd.
Exchange Building 23F
No. 118 Jianguo Road
Chaoyang District
Beijing 100022
China
+86 010 5879 8000
[email protected]
For Literature Requests Only:
Freescale Semiconductor Literature Distribution Center
1-800-441-2447 or +1-303-675-2140
Fax: +1-303-675-2150
[email protected]
MPXV6115V
Rev. 0
11/2009
Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express or
implied copyright licenses granted hereunder to design or fabricate any integrated
circuits or integrated circuits based on the information in this document.
Freescale Semiconductor reserves the right to make changes without further notice to
any products herein. Freescale Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale Semiconductor assume any liability arising out of the application or use of any
product or circuit, and specifically disclaims any and all liability, including without
limitation consequential or incidental damages. “Typical” parameters that may be
provided in Freescale Semiconductor data sheets and/or specifications can and do vary
in different applications and actual performance may vary over time. All operating
parameters, including “Typicals”, must be validated for each customer application by
customer’s technical experts. Freescale Semiconductor does not convey any license
under its patent rights nor the rights of others. Freescale Semiconductor products are
not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life,
or for any other application in which the failure of the Freescale Semiconductor product
could create a situation where personal injury or death may occur. Should Buyer
purchase or use Freescale Semiconductor products for any such unintended or
unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all
claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such
unintended or unauthorized use, even if such claim alleges that Freescale
Semiconductor was negligent regarding the design or manufacture of the part.
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
All other product or service names are the property of their respective owners.
© Freescale Semiconductor, Inc. 2009. All rights reserved.