Freescale Semiconductor Technical Data Document Number: MRFG35020A Rev. 0, 1/2008 Gallium Arsenide PHEMT RF Power Field Effect Transistor MRFG35020AR1 Designed for WiMAX and WLL base station applications that have a 200 MHz BW requirement in the 2300- 3800 MHz frequency range. Suitable for TDMA and CDMA amplifier applications. To be used in Class AB applications. • Typical WiMAX Performance: VDD = 12 Volts, IDQ = 300 mA, Pout = 2 Watts Avg., f = 3500 MHz, 802.16d, 64 QAM 3/4, 4 bursts, 7 MHz Channel Bandwidth, Input Signal PAR = 9.5 dB @ 0.01% Probability on CCDF. Power Gain — 11.5 dB Drain Efficiency — 22% RCE — - 33 dB Meets ETSI Type G Mask • 20 Watts P1dB @ 3500 MHz, CW Features • Supports up to 28 MHz Bandwidth OFDM Signals • Internally Input Matched for Ease of Use • High Gain, High Efficiency and High Linearity • Excellent Thermal Stability • RoHS Compliant • In Tape and Reel. R1 Suffix = 500 Units per 32 mm, 13 inch Reel. 3.5 GHz, 20 W, 12 V WiMAX POWER FET GaAs PHEMT CASE 360E - 01, STYLE 2 NI - 360 SHORT LEAD Table 1. Maximum Ratings Rating Symbol Value Unit Drain - Source Voltage VDSS 15 Vdc Gate - Source Voltage VGS -5 Vdc RF Input Power Pin 34 dBm Storage Temperature Range Tstg - 40 to +175 °C Channel Temperature (1) Tch 175 °C Operating Case Temperature Range TC - 40 to +90 °C Symbol Value (2) Unit RθJC 2.7 °C/W Table 2. Thermal Characteristics Characteristic Thermal Resistance, Junction to Case 1. For reliable operation, the operating channel temperature should not exceed 150°C. Exceeding 150°C channel operating temperature may result in device performance degradation. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1955. © Freescale Semiconductor, Inc., 2008. All rights reserved. RF Device Data Freescale Semiconductor MRFG35020AR1 1 Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22 - A114) 2 (Minimum) Machine Model (per EIA/JESD22 - A115) A (Minimum) Charge Device Model (per JESD22 - C101) IV (Minimum) Table 4. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off State Drain Current (VDS = 3.5 Vdc, VGS = - 2.2 Vdc) IDSO — 10 425 μAdc Off State Current (VDS = 28.5 Vdc, VGS = - 2.5 Vdc) IDSX — 2 42.5 mAdc VGS(th) - 1.2 - 0.95 - 0.7 Vdc DC Characteristics Gate - Source Cut - off Voltage (VDS = 3.5 Vdc, IDS = 42.5 mA) Functional Tests (In Freescale Test Fixture, 50 ohm system) (1) VDD = 12 Vdc, IDQ = 300 mA, Pout = 2 W Avg., f = 3500 MHz, Single - Carrier W - CDMA, 3.84 MHz Channel Bandwidth Carrier. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. PAR = 8.5 dB @ 0.01% Probability on CCDF. Power Gain Gps 9.5 11.5 — dB Drain Efficiency ηD 18 22 — % ACPR — - 43 - 39 dBc — W Adjacent Channel Power Ratio Typical RF Performance (In Freescale Test Fixture, 50 ohm system) VDD = 12 Vdc, IDQ = 300 mA, f = 3500 MHz Output Power, 1 dB Compression Point, CW P1dB — 20 1. Measurements made with device in test fixture. MRFG35020AR1 2 RF Device Data Freescale Semiconductor VBIAS VSUPPLY C8 C7 C6 C5 C13 C4 C14 C3 C15 C2 C16 C12 C11 C10 R1 Z5 Z6 Z4 RF INPUT Z1 Z2 Z3 Z8 RF OUTPUT Z9 Z10 Z11 C17 C1 Z1 Z2 Z3 Z4 Z5, Z6 Z7 Z7 0.021″ x 0.728″ Microstrip 0.045″ x 0.522″ Microstrip 0.200″ x 0.215″ Microstrip 0.150″ x 0.522″ Microstrip 0.279″ x 90° Microstrip Radial Stub 0.060″ x 0.420″ Microstrip Z12 Z13 C18 Z8 Z9 Z10 Z11, Z12 Z13 PCB 0.375″ x 0.172″ Microstrip 0.074″ x 0.068″ Microstrip 0.030″ x 0.347″ Microstrip 0.040″ x 0.050″ Microstrip 0.021″ x 0.713″ Microstrip Rogers 4350, 0.010″, εr = 3.5 Figure 1. MRFG35020A Test Circuit Schematic Table 5. MRFG35020A Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1 3.9 pF Chip Capacitor 08051J3R9BBS AVX C2, C16 10 pF Chip Capacitors ATC100A100JT150XT ATC C3, C15 100 pF Chip Capacitors ATC100A101JT150XT ATC C4, C14 100 pF Chip Capacitors ATC100B101JT500XT ATC C5, C13 1000 pF Chip Capacitors ATC100B102JT50XT ATC C6, C12 0.01 μF Chip Capacitors ATC200B103KT50XT ATC C7, C11 39K pF Chip Capacitors ATC200B393KT50XT ATC C8, C10 10 μF Chip Capacitors GRM55DR61H106KA88B Murata C9 None C17 1.8 pF Chip Capacitors 08051J1R8BBS AVX C18 1.5 pF Chip Capacitor 08051J1R5BBS AVX R1 6.2 Ω, 1/4 W Chip Resistor CRCW12066R20FKEA Vishay MRFG35020AR1 RF Device Data Freescale Semiconductor 3 C8 C7 C6 C13 C5 C2 C12 C11 C10 C14 C4 C3 C15 C16 R1 C1 C18 CUT OUT AREA C17 MRFG35020A Rev. 2 Figure 2. MRFG35020A Test Circuit Component Layout MRFG35020AR1 4 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS 16 60 VDS = 12 Vdc, IDQ = 300 mA, f = 3500 MHz Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth ΓS = 0.697é−153.9_, ΓL = 0.949é−166.7_ 50 40 12 Gps 10 30 8 20 ηD 6 10 4 ηD, DRAIN EFFICIENCY (%) Gps, POWER GAIN (dB) 14 0 20 22 24 26 28 30 32 34 36 38 Pout, OUTPUT POWER (dBm) −5 0 VDS = 12 Vdc, IDQ = 300 mA, f = 3500 MHz Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth ΓS = 0.697é−153.9_, ΓL = 0.949é−166.7_ −10 −20 −10 −15 IRL −30 −20 −40 −25 ACPR −50 IRL, INPUT RETURN LOSS (dB) ACPR, ADJACENT CHANNEL POWER RATIO (dBc) Figure 3. Single - Channel W - CDMA Power Gain and Drain Efficiency versus Output Power −30 20 22 24 26 28 30 32 34 36 38 Pout, OUTPUT POWER (dBm) Figure 4. Single - Channel W - CDMA Adjacent Channel Power Ratio and IRL versus Output Power NOTE: All data is referenced to package lead interface. ΓS and ΓL are the impedances presented to the DUT. All data is generated from load pull, not from the test circuit shown. MRFG35020AR1 RF Device Data Freescale Semiconductor 5 TYPICAL CHARACTERISTICS 14 60 Gps 50 10 40 8 30 6 20 ηD VDS = 12 Vdc, IDQ = 300 mA, f = 3500 MHz Single−Carrier W−CDMA, 3.84 MHz 10 Channel Bandwidth, Input Signal PAR = 8.5 dB @ 0.01% Probability (CCDF) 0 30 32 34 36 38 40 42 4 2 24 26 28 ηD, DRAIN EFFICIENCY (%) Gps, POWER GAIN (dB) 12 Pout, OUTPUT POWER (dBm) 0 0 VDS = 12 Vdc, IDQ = 300 mA, f = 3500 MHz, Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth, Input Signal PAR = 8.5 dB @ 0.01% Probability (CCDF) −10 −10 IRL −20 −20 −30 −30 −40 −40 ACPR −50 IRL, INPUT RETURN LOSS (dB) ACPR, ADJACENT CHANNEL POWER RATIO (dBc) Figure 5. Single - Channel W - CDMA Power Gain and Drain Efficiency versus Output Power −50 24 26 28 30 32 34 36 30 38 40 42 Pout, OUTPUT POWER (dBm) Figure 6. Single - Channel W - CDMA Adjacent Channel Power Ratio and IRL versus Output Power 16 30 28 12 Gps 10 26 8 24 ηD 6 4 3400 22 3450 3500 3550 ηD, DRAIN EFFICIENCY (%) Gps, POWER GAIN (dB) 14 32 VDS = 12 Vdc, IDQ = 300 mA, Pout = 33 dBm Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth, Input Signal PAR = 8.5 dB @ 0.01% Probability (CCDF) 20 3600 f, FREQUENCY (MHz) Figure 7. Single - Channel W - CDMA Power Gain and Drain Efficiency versus Frequency NOTE: Data is generated from the test circuit shown. MRFG35020AR1 6 RF Device Data Freescale Semiconductor 0 0 VDS = 12 Vdc, IDQ = 300 mA, Pout = 33 dBm Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 8.5 dB @ 0.01% Probability (CCDF) −10 −5 −10 −20 IRL −30 −15 −40 −20 IRL, INPUT RETURN LOSS (dB) ACPR, ADJACENT CHANNEL POWER RATIO (dBc) TYPICAL CHARACTERISTICS ACPR −50 3400 3450 3500 −25 3600 3550 f, FREQUENCY (MHz) Figure 8. Single - Channel W - CDMA Adjacent Channel Power Ratio and IRL versus Frequency 60 VDS = 12 Vdc, IDQ = 300 mA, f = 3500 MHz Single−Carrier OFDM 802.16d, 64 QAM 3/4 7 MHz Channel Bandwidth, Input Signal PAR = 9.5 dB @ 0.01% Probability on CCDF −10 50 −15 40 −20 30 20 −25 ηD −30 10 ηD, DRAIN EFFICIENCY (%) EVM, ERROR VECTOR MAGNITUDE (dB) −5 EVM −35 20 0 22 24 26 28 30 32 34 36 38 40 42 Pout, OUTPUT POWER (dBm) Figure 9. Single - Channel OFDM Error Vector Magnitude and Drain Efficiency versus Output Power NOTE: Data is generated from the test circuit shown. MRFG35020AR1 RF Device Data Freescale Semiconductor 7 Zo = 25 Ω Zsource f = 3500 MHz Zload f = 3500 MHz VDD = 12 Vdc, IDQ = 300 mA, Pout = 2 W Avg. f MHz Zsource W Zload W 3500 9.4 - j11.2 1.3 - j5.8 Zsource = Test circuit impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Input Matching Network Z source Z load Figure 10. Series Equivalent Source and Load Impedance MRFG35020AR1 8 RF Device Data Freescale Semiconductor PACKAGE DIMENSIONS MRFG35020AR1 RF Device Data Freescale Semiconductor 9 MRFG35020AR1 10 RF Device Data Freescale Semiconductor PRODUCT DOCUMENTATION Refer to the following documents to aid your design process. Application Notes • AN1955: Thermal Measurement Methodology of RF Power Amplifiers REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 Jan. 2008 Description • Initial Release of Data Sheet MRFG35020AR1 RF Device Data Freescale Semiconductor 11 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. 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Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2008. All rights reserved. MRFG35020AR1 Document Number: MRFG35020A Rev. 0, 1/2008 12 RF Device Data Freescale Semiconductor