FAIRCHILD FIN1027_09

FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed,
Differential Driver
Description
Features
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This dual driver is designed for high-speed
interconnects utilizing Low Voltage Differential Signaling
(LVDS) technology. The driver translates LVTTL signal
levels to LVDS levels with a typical differential output
swing of 350mV, which provides low EMI at ultra-low
power dissipation, even at high frequencies. This device
is ideal for high-speed transfer of clock or data.
Greater than 600Mbs Data Rate
3V Power Supply Operation
5ns Maximum Differential Pulse Skew
1.5ns Maximum Propagation Delay
Low Power Dissipation
The FIN1027 or FIN1027A can be paired with its
companion receiver, the FIN1028, or with any other
LVDS receiver.
Power-Off Protection
Meets or Exceeds the TIA/EIA-644 LVDS Standard
Flow-through Pinout Simplifies PCB Layout
Ordering Information
Package
Packing
Method
Green
8-Lead Small Outline Package (SOIC)
JEDEC MS-012, 0.150 inch Narrow
Trays
-40 to +85°C
Green
8-Lead Small Outline Package (SOIC)
JEDEC MS-012, 0.150 inch Narrow
Tape and Reel
FIN1027K8X
-40 to +85°C
RoHS
8-Lead US8, JEDEC MO-187,
Variation CA 3.1mm Wide
Tape and Reel
FIN1027AMX
-40 to +85°C
Green
8-Lead Small Outline Package (SOIC)
JEDEC MS-012, 0.150 inch Narrow
Tape and Reel
Part Number
Operating
Temperature Range
FIN1027M
-40 to +85°C
FIN1027MX
Eco Status
For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027 • Rev. 1.0.3
www.fairchildsemi.com
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
April 2009
Figure 1. FIN1027 SOIC Pin Assignment (Top View)
Figure 2. FIN1027A SOIC Pin Assignment (Top View)
Figure 3. FIN1027 US8 Pin Assignment (Top View)
Pin Definitions
Name
Pin #
FIN1027
SOIC
Pin #
FIN1027A
SOIC
Pin #
FIN1027
US8
Description
VCC
1
1
8
Power Supply
DIN1
2
2
7
LVTTL Data Input
DIN2
3
3
6
LVTTL Data Input
GND
4
4
5
Ground
DOUT2-
5
5
4
Inverting Driver Output
DOUT2+
6
6
3
Non-Inverting Driver Output
DOUT1+
7
8
2
Non-Inverting Driver Output
DOUT1-
8
7
1
Inverting Driver Output
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Pin Configuration
Function Table
Input
Outputs
DIN
DOUT+
DOUT-
LOW
LOW
HIGH
HIGH
HIGH
LOW
OPEN
LOW
HIGH
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC
DIN
Parameter
Min.
Max.
Unit
Supply Voltage
-0.5
4.6
V
DC Input Voltage
-0.5
6.0
V
DOUT
DC Output Voltage
-0.5
4.7
V
IOSD
Driver Short-Circuit Current
TSTG
Storage Temperature Range
Continuous
+150
°C
TJ
Maximum Junction Temperature
+150
°C
TL
Lead Temperature,
Soldering, 10 Seconds
+260
°C
Human Body Model, JESD22-A114
≥6500
Machine Model, JESD22-A115
≥400
ESD
-65
mA
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
Parameter
Supply Voltage
VIN
Input Voltage
TA
Operating Temperature
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
Min.
Max.
Unit
3.0
3.6
V
0
VCC
V
-40
+85
°C
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Absolute Maximum Ratings
www.fairchildsemi.com
3
All typical values are at TA = 25°C and VCC = 3.3V. Over-supply voltage and operating temperature ranges, unless
otherwise noted.
Symbol
VOD
ΔVOD
VOS
ΔVOS
IOFF
Parameter
Conditions
Output Differential Voltage
VOD Magnitude Change from
Differential LOW-to-HIGH
Offset Voltage
RL = 100Ω, Figure 4
Min.
Typ.
Max.
Units
250
350
450
mV
25
mV
1.375
V
25
mV
±20
µA
1.125
1.250
Offset Magnitude Change from
Differential LOW-to-HIGH
Power-Off Output current
VCC = 0V, VOUT = 0V or 3.6V
IOS
Short-Circuit Output Current
VIH
Input HIGH Voltage
VOUT = 0V
-8
VOD = 0V
±8
2.0
mA
VCC
VIL
Input LOW Voltage
0.8
V
IIN
Input Current
VIN = 0V or VCC
±20
µA
Power-Off Input Current
VCC = 0V, VIN = 0V or 3.6V
±20
µA
Input Clamp Voltage
IIK = -18mA
No Load, VIN = 0V or VCC
12.5
mA
RL = 100Ω, VIN = 0V or VCC
17.0
mA
II(OFF)
VIK
GND
V
-1.5
V
ICC
Power Supply Current
CIN
Input Capacitance
4
pF
Output Capacitance
6
pF
COUT
AC Electrical Characteristics
FIN1027 / FIN1027A — 3.3V LVDS, 2-Bit, High-Speed, Differential Driver
DC Electrical Characteristics
All typical values are at TA = 25°C and VCC = 3.3V. Over-supply voltage and operating temperature ranges, unless
otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
tPLHD
Differential Propagation Delay,
LOW-to-HIGH
0.5
1.5
ns
tPHLD
Differential Propagation Delay,
HIGH-to-LOW
0.5
1.5
ns
tTLHD
Differential Output Rise Time
(20% to 80%)
RL = 100Ω,
CL = 10pF,
0.4
1.0
tTHLD
Differential Output Fall Time
(80% to 20%)
Figure 5, Figure 6
0.4
1.0
tSK(P)
Pulse Skew ⏐tPLH - tPHL⏐
tSK(LH), tSK(HL)
tSK(PP)
0.5
(1)
Channel-to-Channel Skew
(2)
Part-to-Part Skew
ns
ns
ns
0.3
ns
1.0
ns
Notes:
1. tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and
are switching in the same direction.
2. tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two
devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with
the same supply voltage, same temperature, and have identical test circuits.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
4
Figure 4.
Differential Driver DC Test Circuit
Note A: All input pulses have frequency = 10MHz,
tR or tF =2ns.
Note B: CL includes all probe and fixture capacitances.
Figure 5.
Differential Driver Propagation Delay and Transition Time Test Circuit
Figure 6.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Test Diagrams
AC Waveforms
www.fairchildsemi.com
5
Figure 7. Output High Voltage
vs. Power Supply Voltage
Figure 9.
Figure 11.
Figure 8. Output Low Voltage
vs. Power Supply Voltage
Output Short Circuit Current
vs. Power Supply Voltage
Figure 10.
Differential Output Voltage
vs. Load Resistor
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
Figure 12.
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Typical Performance Characteristics
Differential Output Voltage
vs. Power Supply Voltage
Offset Voltage vs. Power Supply Voltage
www.fairchildsemi.com
6
Figure 13. Power Supply Current vs. Frequency
Figure 14. Power Supply Current
vs. Power Supply Voltage
Figure 15. Power Supply Current
vs. Ambient Temperature
Figure 16.
Figure 17. Differential Propagation Delay
vs. Ambient Temperature
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
Figure 18.
Differential Propagation Delay
vs. Power Supply
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Typical Performance Characteristics (Continued)
Differential Skew (tPLH-tPHL)
vs. Power Supply
www.fairchildsemi.com
7
Figure 19.
Differential Pulse Skew (tPLH-tPHL)
Figure 20.
Transition Time vs. Power Supply Voltage
Figure 21.
Transition Time vs. Ambient Temperature
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Typical Performance Characteristics (Continued)
www.fairchildsemi.com
8
5.00
4.80
A
0.65
3.81
5
8
B
6.20
5.80
PIN ONE
INDICATOR
1.75
4.00
3.80
1
5.60
4
1.27
(0.33)
0.25
M
1.27
C B A
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
1.75 MAX
R0.10
0.25
0.19
C
0.10
0.51
0.33
0.50 x 45°
0.25
C
OPTION A - BEVEL EDGE
GAGE PLANE
R0.10
0.36
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Physical Dimensions
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0°
0.90
0.406
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
Figure 22. 8-Lead, Small Outline Package (SOIC), JEDEC MS-012, 0.150-inch, Narrow Body
Click here for tape and reel specifications, available at:
http://www.fairchildsemi.com/products/discrete/pdf/soic8_tr.pdf
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
9
-A-
1.80
5
0.70
-B-
2.3±0.1
3.1±.1
3.40
8
2.70
0.15
1.00
1.55
0.30 TYP
1
0.2 C B A
ALL LEAD TIPS
4
PIN #1 IDENT.
ALL LEAD TIPS
0.1 C
0.90 MAX
0.5 TYP
DETAIL A
0.70±0.10
0.10-0.18
-C0.10
0.00
0.17-0.27
0.50TYP
0.13
A B
C
0.4 TYP
GAGE PLANE
0.12
0°-8°
A. CONFORMS TO JEDEC REGISTRATION MO-187
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS.
D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
Physical Dimensions
SEATING PLANE
DETAIL A
MAB08AREVC
Figure 23.
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
10
FIN1027 / FIN1027A —3.3V LVDS, 2-Bit, High-Speed, Differential Driver
© 2001 Fairchild Semiconductor Corporation
FIN1027 / FIN1027A • Rev. 1.0.3
www.fairchildsemi.com
11