MICROCHIP MCP6044

M
MCP6041/2/3/4
600 nA, Rail-to-Rail Input/Output Op Amps
Features
Description
• Low Quiescent Current: 600 nA/Amplifier (typ)
• Rail-to-Rail Input: -0.3 V to VDD+0.3 V (max)
• Rail-to-Rail Output:
VSS+10 mV to V DD-10 mV (max)
• Gain Bandwidth Product: 14 kHz (typ)
• Wide Supply Voltage Range: 1.4 V to 5.5 V (max)
• Unity Gain Stable
• Available in Single, Dual and Quad
• Chip Select (CS) with MCP6043
• 5-lead SOT-23 package (MCP6041 only)
The MCP6041/2/3/4 family of operational amplifiers
from Microchip Technology, Inc. operate with a single
supply voltage as low as 1.4 V, while drawing less than
1 µA (max) of quiescent current per amplifier. These
devices are also designed to support rail-to-rail input
and output operation. This combination of features supports battery-powered and portable applications.
Applications
•
•
•
•
The MCP6041/2/3/4 amplifiers have a typical gain
bandwidth product of 14 kHz (typ) and are unity gain
stable. These specs make these operational amplifiers
appropriate for low frequency applications, such as
battery current monitoring and sensor conditioning.
The MCP6041/2/3/4 family operational amplifiers are
offered in single (MCP6041), single with a Chip Select
(CS) feature (MCP6043), dual (MCP6042) and quad
(MCP6044) configurations. The MCP6041 device is
available in the 5-lead SOT-23 package.
Toll Booth Tags
Wearable Products
Temperature Measurement
Battery Powered
Typical Application
Available Tools
VDD
• Spice macro models (at www.microchip.com)
• FilterLab® Software (at www.microchip.com)
Package Types
10 Ω
MCP6041
PDIP, SOIC, MSOP
NC 1
-IN 2
+IN 3
VSS 4
8 NC
+
7 VDD
6 OUT
5 NC
MCP6042
PDIP, SOIC, MSOP
OUTA 1
-INA 2
+INA 3
-
MCP6043
PDIP, SOIC, MSOP
NC 1
-IN 2
+IN 3
VSS 4
6 -INB
5 +INB
MCP604X
VSS
100 kΩ
1 MΩ
High Side Battery Current Sensor
OUTA 1
14 OUTD
A D
-INA1 2 - + + - 13 -IND
+INA1 3
12 +IND
VDD 4
4 -IN
+IN 3
7 OUTB
+B -
+2.5 V
to
5.5 V
IDD
MCP6044
PDIP, SOIC, TSSOP
5 VDD
+
VSS 2
8 VDD
- A+
VSS 4
MCP6041
SOT-23-5
OUT 1
VDD
+INB 5
-INB 6 - B+ +COUTB1 7
11 VSS
10 +INC
9 -INC
8 OUTC
8 CS
+
7 VDD
6 OUT
5 NC
 2002 Microchip Technology Inc.
DS21669B-page 1
MCP6041/2/3/4
1.0
1.1
ELECTRICAL
CHARACTERISTICS
PIN FUNCTION TABLE
Name
Maximum Ratings*
VDD - VSS ......................................................................................7.0 V
All inputs and outputs................................... VSS –0.3 V to VDD +0.3 V
Difference Input voltage ..................................................... |VDD - VSS|
Output Short Circuit Current ...............................................continuous
Current at Input Pins .................................................................. ±2 mA
Current at Output and Supply Pins ..........................................±30 mA
Storage temperature ...................................................-65°C to +150°C
Ambient temp. with power applied ..............................-55°C to +125°C
ESD protection on all pins (HBM).....................................................≥ 4 kV
*Notice: Stresses above those listed under “Maximum Ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is
not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Function
+IN/+INA/+INB/+INC/+IND
Non-inverting Inputs
-IN/-INA/-INB/-INC/-IND
Inverting Inputs
VDD
Positive Power Supply
VSS
Negative Power Supply
OUT/OUTA/OUTB/OUTC/OUTD Outputs
CS
Chip Select
NC
No internal connection to
IC
MCP6041/2/3/4 DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +1.4 V to +5.5 V, VSS = GND, TA = 25 °C,
VCM = VDD/2, R L = 1 MΩ to VDD /2, and VOUT ~ VDD/2
Parameters
Sym
Min
Typ
Max
Units
VOS
-3.0
—
+3.0
mV
∆VOS/∆T
—
±1.5
—
µV/°C
PSRR
70
85
—
dB
IB
—
1.0
—
pA
Input Offset:
Input Offset Voltage
Drift with Temperature
Power Supply Rejection
Conditions
VCM = VSS
TA= -40°C to+85°C
Input Bias Current and Impedance:
Input Bias Current
IB
—
—
100
pA
Input Offset Current
IOS
—
1.0
—
pA
Common Mode Input Impedance
ZCM
—
1013||6
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||6
—
Ω||pF
Common-Mode Input Range
VCMR
VSS−0.3
—
VDD+0.3
V
Common-Mode Rejection Ratio
CMRR
62
80
—
dB
VDD = 5 V,
VCM = -0.3 V to 5.3 V
60
75
—
dB
VDD = 5 V,
VCM = 2.5 V to 5.3 V
60
80
—
dB
VDD = 5 V,
VCM = -0.3 V to 2.5 V
95
115
—
dB
RL = 50 kΩ to VDD /2,
100 mV < VOUT < (VDD −
100 mV)
Input Bias Current Over Temperature
TA= -40°C to+85°
Common Mode:
Open Loop Gain:
DC Open Loop Gain (large signal)
AOL
Output:
Maximum Output Voltage Swing
Linear Region Output Voltage Swing
Output Short Circuit Current
—
VDD − 10
mV
RL = 50 kΩ to VDD /2
VOVR
VSS + 100
—
VDD − 100
mV
RL = 50 kΩ to VDD /2,
AOL ≥ 95 dB
IO
—
21
—
mA
VOUT = 2.5 V, VDD = 5 V
V DD
1.4
—
5.5
V
IQ
0.3
0.6
1.0
µA
VOL, VOH VSS + 10
Power Supply:
Supply Voltage
Quiescent Current per amplifier
DS21669B-page 2
IO = 0
2002 Microchip Technology Inc.
MCP6041/2/3/4
MCP6041/2/3/4 AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +5 V, VSS = GND, TA = 25 °C,
VCM = VDD/2, R L = 1 MΩ to VDD /2, CL = 60 pF, and VOUT ~ VDD /2
Parameters
Sym
Min
Typ
Max
Units
GBWP
—
14
—
kHz
Slew Rate
SR
—
3.0
—
V/ms
Phase Margin
PM
—
65
—
°
Input Voltage Noise
En
—
5.0
—
µVp-p
Input Voltage Noise Density
en
—
170
—
nV/√Hz
f = 1 kHz
Input Current Noise Density
in
—
0.6
—
fA/√Hz
f = 1 kHz
Gain Bandwidth Product
Conditions
G = +1
f = 0.1 Hz to 10 Hz
SPECIFICATIONS FOR MCP6043 CHIP SELECT FEATURE
Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +1.4 V to +5.5 V, VSS = GND, TA = 25 °C,
VCM = VDD/2, R L = 1 MΩ to VDD /2, CL = 60 pF, and VOUT ~ VDD /2
Parameters
Sym
Min
Typ
Max
Units
Conditions
CS Logic Threshold, Low
VIL
VSS
—
VSS + 0.3
V
For entire VDD range
CS Input Current, Low
ICSL
—
5.0
—
pA
CS = VSS
CS Logic Threshold, High
VIH
VDD - 0.3
—
VDD
V
For entire VDD range
CS Input Current, High
ICSH
—
5.0
—
pA
CS = VDD
IQ
—
20
—
pA
CS = VDD
—
20
—
pA
CS = VDD
tON
—
2.0
50
ms
CS low = VSS + 0.3 V, G = +1 V/V,
VOUT = 0.9 VDD/2
tOFF
—
10
—
µs
CS high = V DD - 0.3 V, G = +1 V/V
VOUT = 0.1 VDD/2
VHYST
—
0.6
—
V
VDD = 5 V
CS Low Specifications:
CS High Specifications:
CS Input High, GND Current
Amplifier Output Leakage, CS High
Dynamic Specifications:
CS Low to Amplifier Output High
Turn-on Time
CS High to Amplifier Output High Z
Hysteresis
MCP6041/2/3/4 TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, all limits are specified for VDD = +1.4 V to +5.5 V, VSS = GND
Parameters
Symbol
Min
Typ
Max
Units
Specified Temperature Range
TA
-40
—
+85
°C
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 5L-SOT23
θJA
—
256
—
°C/W
Thermal Resistance, 8L-PDIP
θJA
—
85
—
°C/W
Conditions
Temperature Ranges:
Note 1
Thermal Package Resistances:
Thermal Resistance, 8L-SOIC
θJA
—
163
—
°C/W
Thermal Resistance, 8L-MSOP
θJA
—
206
—
°C/W
Thermal Resistance, 14L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
120
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Note 1: The MCP6041/2/3/4 family of op amps operates over this extended range, but with reduced performance.
 2002 Microchip Technology Inc.
DS21669B-page 3
MCP6041/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
35%
30%
35%
1196 Samples
VDD = 5.5V
VCM = VDD
30%
25%
Percentage
Percentage
25%
20%
15%
5%
5%
0%
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
Input Offset Voltage (mV)
3.0
-4.0
4.0
FIGURE 2-1:
Histogram of Input Offset
Voltage with VDD = 5.5 V, VCM = VDD.
35%
1199 Samples
VDD = 5.5V
VCM = VDD/2
30%
25%
-2.0
-1.0
0.0
1.0
2.0
Input Offset Voltage (mV)
3.0
4.0
1199 Samples
VDD = 1.4V
VCM = VDD/2
Percentage
25%
20%
15%
20%
15%
10%
10%
5%
5%
0%
0%
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
Input Offset Voltage (mV)
3.0
-4.0
4.0
FIGURE 2-2:
Histogram of Input Offset
Voltage with VDD = 5.5 V, VCM = VDD/2.
-3.0
-2.0
-1.0
0.0
1.0
2.0
Input Offset Voltage (mV)
3.0
4.0
FIGURE 2-5:
Histogram of Input Offset
Voltage with VDD = 1.4 V, VCM = VDD/2.
35%
30%
-3.0
FIGURE 2-4:
Histogram of Input Offset
Voltage with VDD = 1.4 V, VCM = VDD.
35%
Percentage
15%
10%
0%
35%
1199 Samples
VDD = 5.5V
VCM = VSS
30%
25%
1199 Samples
VDD = 1.4V
VCM = VSS
25%
Percentage
Percentage
20%
10%
30%
1196 Samples
VDD = 1.4V
VCM = VDD
20%
15%
20%
15%
10%
10%
5%
5%
0%
0%
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
4.0
Input Offset Voltage (mV)
FIGURE 2-3:
Histogram of Input Offset
Voltage with VDD = 5.5 V, VCM = VSS.
DS21669B-page 4
-4.0
-3.0
-2.0
-1.0
0.0
1.0
2.0
3.0
4.0
Input Offset Voltage (mV)
FIGURE 2-6:
Histogram of Input Offset
Voltage with VDD = 1.4 V, VCM = VSS.
2002 Microchip Technology Inc.
MCP6041/2/3/4
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
Note:
400
35%
Percentage
25%
20%
15%
10%
5%
10
8
6
4
2
0
-2
-4
-6
-8
-10
FIGURE 2-7:
Histogram of Input Offset
Voltage Drift with VDD = 5.5 V, VCM = VDD/2.
TA = +25°C
100
TA = -40°C
0
-100
TA = +85°C
TA = +25°C
-200
TA = -40°C
FIGURE 2-10:
Input Offset Voltage vs.
Common Mode Input Voltage vs. Temperature
with VDD = 5.5 V.
35%
1000
1143 Samples
VDD = 5.5V
VCM = VSS
800
Input Offset Voltage (µV)
Percentage
TA = +85°C
-400
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Common Mode Input Voltage (V)
Input Offset Voltage Drift (µV/°C)
25%
200
-300
0%
30%
VDD = 5.5V
300
Input Offset Voltage (µV)
30%
1176 Samples
VDD = 5.5V
VCM = VDD/2
20%
15%
10%
5%
VDD = 1.4V
600
400
200
TA = +85°C
0
-200
-400
TA = -40°C
-600
TA = +25°C
-800
0.0
0.5
1.0
1.5
Common Mode Input Voltage (V)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-8:
Histogram of Input Offset
Voltage Drift with VDD = 5.5 V, VCM = VSS.
500
1124 Samples
VDD = 1.4V
VCM = VSS
Input Offset Voltage (µV)
RL = 50 kΩ
25%
Percentage
20%
15%
10%
5%
10
8
6
4
2
0
-2
-4
-6
-8
0%
-10
2.0
FIGURE 2-11:
Input Offset Voltage vs.
Common Mode Input Voltage vs. Temperature
with VDD = 1.4 V.
35%
30%
TA = +85°C
TA = +85°C
-1000
-0.5
10
8
6
4
2
0
-2
-4
-6
-8
-10
0%
Input Offset Voltage Drift (µV/°C)
FIGURE 2-9:
Histogram of Input Offset
Voltage Drift with VDD = 1.4 V, VCM = VSS.
 2002 Microchip Technology Inc.
450
VDD = 1.4V
400
350
VDD = 5.5V
300
250
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Output Voltage (V)
FIGURE 2-12:
Input Offset Voltage vs.
Output Voltage vs. Power Supply Voltage.
DS21669B-page 5
MCP6041/2/3/4
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
Note:
300
100
0.1
1
CMRR, PSRR (dB)
FIGURE 2-13:
vs. Frequency.
10
Frequency (Hz)
100
1000
Input Noise Voltage Density
Input Noise Voltage Density (nV/—Hz)
eni = 170 nV/—Hz, f = 1 kHz
Eni = 5.0 µVp-p,
f = 0.1 to 10 Hz
250
200
150
100
50
0
0.0
90
100
80
95
PSRR-
70
60
PSRR+
50
40
CMRR
f = 1 kHz
VDD = 5V
0.5
1.0 1.5 2.0 2.5 3.0 3.5 4.0
Common Mode Input Voltage (V)
4.5
5.0
FIGURE 2-16:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
PSRR, CMRR (dB)
Input Noise Voltage Density (nV/—Hz)
1000
1182 Samples
VDD = 5.0V
VCM = VSS
90
PSRR
85
80
CMRR
75
30
VDD = 5.0V
70
20
0.1
1
10
Frequency (Hz)
100
30
Input Bias Current
20
10
Input Offset Current
0
1.0
1.5
2.0
2.5
3.0
3.5
40
60
80
4.0
4.5
5.0
5.5
VDD = 5.5V
VCM = VDD
40
35
30
25
20
Input Bias Current
15
Input Offset Current
10
5
0
-40
-20
Common Mode Input Voltage (V)
FIGURE 2-15:
Input Bias, Offset Currents
vs. Common Mode Input Voltage with
Temperature = 85°C.
DS21669B-page 6
20
FIGURE 2-17:
Common Mode Rejection
Ratio, Power Supply Rejection Ratio vs.
Temperature.
Input Bias and Offset Current (pA)
Input Bias and Offset Current (pA)
40
0.5
0
45
TA = 85°C
VDD = 5.5V
0.0
-20
Temperature (°C)
FIGURE 2-14:
Common Mode Rejection
Ratio, Power Supply Rejection Ratio vs.
Frequency.
50
-40
1000
FIGURE 2-18:
vs. Temperature.
0
20
40
Temperature ( °C)
60
80
Input Bias, Offset Currents
2002 Microchip Technology Inc.
MCP6041/2/3/4
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
Note:
0.7
VDD = 5.5V
0.6
Quiescent Current (µA/Amplifier)
Quiescent Current (µA/Amplifier)
0.7
0.5
VDD = 1.4V
0.4
0.3
0.2
0.1
0.0
0.5
TA = +25°C
0.4
TA = -40°C
0.3
0.2
0.1
0.0
-40
-20
0
20
40
60
80
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
Power Supply Voltage, VDD (V)
Temperature (° C)
FIGURE 2-22:
Quiescent Current Vs.
Power Supply Voltage vs. Temperature.
FIGURE 2-19:
Quiescent Current vs.
Temperature vs. Power Supply Voltage.
Open Loop Gain (dB)
120
100
0
130
-30
120
-60
Open Loop Phase
80
-90
60
-120
40
-150
20
-180
0
VDD = 5.5V
-20
0.001 0.01
1.E-03
1.E-02
1.E-01
0.1
1.E+00
1.E+01
1
10
1.E+02
100
1.E+03
1k
1.E+04
10k
DC Open Loop Gain (dB)
Open Loop Gain
Open Loop Phase (°)
140
100
140
80
70
-240
100k
60
1. E+0 2
1. E+0 3
100
1k
140
Open Loop Gain (dB)
110
100
1. E+0 5
100k
RL = 50 kΩ
130
120
1. E+0 4
10k
Load Resistance (Ω)
FIGURE 2-23:
Open Loop Gain vs. Load
Resistance vs. Power Supply Voltage.
RL = 50 kΩ
VSS + 100 mV < VOUT < VDD - 100 mV
130
VDD = 1.4V
VOUT = 0.5V to 0.9V
90
-210
1.E+05
FIGURE 2-20:
Open Loop Gain, Phase vs.
Frequency with VDD = 5.5 V.
VDD = 5.5V
VOUT = 0.5V to 5.0V
110
Frequency (Hz)
DC Open Loop Gain (dB)
TA = +85°C
0.6
VDD = 5.5V
120
110
VDD = 1.4V
100
90
90
80
1.0
1.5
2.0
FIGURE 2-21:
Supply Voltage.
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage, VDD (V)
5.0
5.5
Open Loop Gain vs. Power
 2002 Microchip Technology Inc.
80
0.00
0.05
0.10
0.15
0.20
0.25
Output Voltage Headroom, VDD-V OUT or VOUT-V SS (V)
FIGURE 2-24:
Open Loop Gain vs. Output
Voltage Headroom vs. Power Supply Voltage.
DS21669B-page 7
MCP6041/2/3/4
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
18
100
90
80
70
Input Referred
60
100
1.E+03
70
12
60
Gain Bandwidth Product
10
40
6
30
4
0
16
14
70
14
12
60
Gain Bandwidth Product
Phase Margin
8
50
40
6
30
4
20
VDD = 5.5V
G = +1 V/V
10
0
0
0
20
40
Temperature (°C)
60
80
14
70
60
50
8
40
6
4
2
0
Phase Margin
10
30
20
VDD = 5.5V
G = +1 V/V
RL = 10 kΩ
10
100
Load Capacitance (pF)
0
1000
FIGURE 2-27:
Unity Loop Gain Frequency,
Phase Margin vs. Load Capacitance.
DS21669B-page 8
4.5
5.0
80
Phase Margin
70
60
10
50
8
40
Gain Bandwidth Product
6
30
20
4
VDD = 1.4V
G = +1 V/V
2
10
0
0
-20
0
20
40
Temperature (°C)
60
80
FIGURE 2-29:
Gain Bandwidth Product,
Phase Margin vs. Temperature with VDD = 1.4 V,
Unity Gain.
40
Phase Margin (°)
90
16
10
0
1.0 1.5 2.0 2.5 3.0 3.5 4.0
Common Mode Input Voltage(V)
90
-40
18
Unity Loop Gain Frequency
0.5
12
80
FIGURE 2-26:
Gain Bandwidth Product,
Phase Margin vs. Temperature with VDD = 5.5 V,
Unity Gain.
12
Gain Bandwidth Product (kHz)
18
80
Phase Margin (°)
90
-20
10
FIGURE 2-28:
Gain Bandwidth Product,
Phase Margin vs. Common Mode Input Voltage
with Unity Gain.
16
-40
20
VDD = 5V
RL = 100 kΩ
G = +1 V/V
2
18
2
50
8
0.0
10k
FIGURE 2-25:
Channel to Channel
Separation vs. Frequency (MCP6042 and
MCP6044 only).
Gain Bandwidth Product (kHz)
14
1.E+04
1k
Frequency (Hz)
10
80
Phase Margin
Phase Margin (°)
Gain Bandwidth Product (kHz)
110
1.E+02
Unity Loop Gain Frequency (kHz)
90
16
120
Output Short Circuit Current (mA)
Channel to Channel Separation (dB)
130
Phase Margin (°)
Note:
35
| ISC- | @ VDD=5.5V
30
ISC+ @ VDD=5.5V
25
20
15
| ISC- | @ VDD=1.4V
ISC+ @ VDD=1.4V
10
5
0
-40
-20
0
20
40
Temperature (°C)
60
80
FIGURE 2-30:
Output Short Circuit Current
vs. Temperature vs. Power Supply Voltage.
2002 Microchip Technology Inc.
MCP6041/2/3/4
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
Note:
10
6
VDD = 5.0V
Output Voltage Swing (Vp-p)
5
Slew Rate (V/ms)
High-to-Low Transition
4
3
Low-to-High Transition
2
1
0
-40
-20
0
FIGURE 2-31:
60
1.E +01
1.E +02
10
5
Output Voltage Headroom,
VDD - VOH or V OL - VSS (mV)
10
VDD-VOH @ VDD = 1.4V
VOL-VSS @ VDD = 1.4V
1.E +03
100
1.E +04
1k
Frequency (Hz)
10k
FIGURE 2-34:
Output Voltage Swing vs.
Frequency vs. Power Supply Voltage.
VOL-VSS @ VDD = 5.5V
VDD-VOH @ VDD = 5.5V
1
VDD = 1.4V
1
0.1
80
Slew Rate vs. Temperature.
100
Output Voltage Headroom,
VDD-VOH or VOL-VSS (mV)
20
40
Temperature (°C)
VDD = 5.5V
VDD = 5.5V
RL = 50 kΩ
4
VOL - VSS
3
2
VDD - VOH
1
0
1.E+03
1.E+04
1k
1.E+05
10k
Load Resistance (:)
100k
FIGURE 2-32:
Output Voltage Headroom
vs. Load Resistance vs. Power Supply Voltage.
-40
-20
0
FIGURE 2-35:
vs. Temperature.
20
40
Temperature (°C)
60
80
Output Voltage Headroom
3.E-02
0.025
VDD = 5.0V
G = +1 V/V
RL = 50 kΩ
2.E-02
0.020
0.015
VDD = 5.0V
G = -1 V/V
RL = 50 kΩ
1.E-02
Voltage (5 mV/div)
Output Voltage (5mV/div)
2.E-02
5.E-03
0.E+00
-5. E-03
0.010
0.005
0.000
-0. 005
-1. E-02
-0. 010
-2. E-02
-0. 015
-2. E-02
-0. 020
-3. E-02
0.E+00
1.E-04
2.E-04
3.E-04
4.E-04
5.E-04
6.E-04
7.E-04
8.E-04
9.E-04
1.E-03
-0. 025
Time (100 µs/div)
FIGURE 2-33:
Pulse Response.
Small Signal Non-Inverting
 2002 Microchip Technology Inc.
0.0E+00
1.0E-04
2.0E-04
3.0E-04
4.0E-04
5.0E-04
6.0E-04
7.0E-04
8.0E-04
9.0E-04
1.0E-03
Time (100 µs/div)
FIGURE 2-36:
Response.
Small Signal Inverting Pulse
DS21669B-page 9
MCP6041/2/3/4
Unless otherwise indicated, VDD = +5 V, VSS = GND, TA = 25°C, VCM = VDD/2, RL = 1 MΩ to VDD/2,
CL = 60 pF, and V OUT ~ VDD/2.
Note:
5.0
5.0
VDD = 5.0V
G = +1 V/V
RL = 50 kΩ
4.5
4.0
4.0
Output Voltage (V)
3.0
2.5
2.0
1.5
1.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.5
0.E+00
1.E-03
2.E-03
3.E-03
4.E-03
5.E-03
6.E-03
7.E-03
8.E-03
9.E-03
0.0
1.E-02
0.E+00
1.E-03
2.E-03
3.E-03
Time (1 ms/div)
Large Signal Non-Inverting
4.5
5.0
4.0
CS
2.5
3.0
VDD = 5.0V
-2.5
2.5
VOUT
-5.0
2.0
-7.5
1.5
-10.0
1.0
-12.5
0.5
-15.0
0.0
7.E-03
8.E-03
9.E-03
1.E-02
1.E-02
Large Signal Inverting Pulse
Amplifier Output–Active (driven)
2.5
2.0
CS Input High
to Low
1.5
VDD = 5.0V
CS Input Low
to High
1.0
0.5
Amplifier Output–Hi-Z
0.0
0
-1.0
1
2
3
4
5
CS Input Voltage (V)
Time (1 ms/div)
FIGURE 2-38:
Chip Select (CS) to
Amplifier Output Response Time (MCP6043
only).
6
6.E-03
-0.5
-0.5
9.E-03
8.E-03
7.E-03
6.E-03
Output Hi-Z
5.E-03
4.E-03
Output Driven
3.E-03
2.E-03
0.E+00
-20.0
1.E-03
Output Hi-Z
-17.5
5.E-03
3.0
3.5
0.0
FIGURE 2-40:
Response.
Internal CS Switch Output (V)
7.5
Output Voltage (V)
Chip Select (CS) Voltage (V)
FIGURE 2-37:
Pulse Response.
4.E-03
Time (1 ms/div)
Hysteresis
Output Voltage (V)
3.5
0.0
VDD = 5.0V
G = -1 V/V
RL = 50 kΩ
4.5
FIGURE 2-41:
(MCP6043 only).
Chip Select (CS) Hysteresis
VIN
5
Output Voltage (V)
VOUT
4
3
2
1
VDD = 5.0V
G = +2 V/V
0
-1
0.00E+00
5.00E-03
1.00E-02
1.50E-02
2.00E-02
2.50E-02
Time (5 ms/div)
FIGURE 2-39:
The MCP6041/2/3/4 family
shows no phase reversal (for information only–
the Maximum Absolute Input Voltage is still
VSS-0.3 V and VDD+0.3 V).
DS21669B-page 10
2002 Microchip Technology Inc.
MCP6041/2/3/4
3.0
APPLICATIONS INFORMATION
The MCP6041/2/3/4 family of operational amplifiers
are fabricated on Microchip’s state-of-the-art CMOS
process. They are unity gain stable and suitable for a
wide range of applications requiring very low power
consumption. With these op amps, the power supply
pin needs to be by-passed with a 0.1 µF capacitor.
3.1
Rail to Rail Input
The input stage of the family of devices uses two differential input stages in parallel; one operates at low VCM
(common mode input voltage) and the other at high
VCM. With this topology, the MCP6041/2/3/4 family
operates with VCM up to 300 mV past either supply rail.
The Input Offset Voltage is measured at both
VCM = VSS - 0.3 V and VDD + 0.3 V to ensure proper
operation.
3.2
Output Loads and Battery Life
The second specification, Linear Region Output Voltage Swing, details the output voltage range that supports the specified Open Loop Gain (AOL ≥ 95 dB with
RL = 50 kΩ).
3.4
The MCP6041/2/3/4 op amp family uses CMOS transistors at the input. It is designed to not exhibit phase
inversion when the input pins exceed the supply voltages. Figure 2-39 shows an input voltage exceeding
both supplies with no resulting phase inversion.
The maximum operating VCM (common mode input
voltage) that can be applied to the inputs is VSS -0.3 V
and VDD +0.3 V. Voltage on the input that exceed this
absolute maximum rating can cause excessive current
to flow in or out of the input pins. Current beyond ±2 mA
can cause possible reliability problems. Applications
that exceed this rating must be externally limited with
an input resistor as shown in Figure 3-1.
The MCP6041/2/3/4 op amp family has outstanding
quiescent current, which supports battery-powered
applications. There is minimal quiescent current glitching when chip select (CS) is raised or lowered. This
prevents excessive current draw and reduced battery
life, when the part is turned off or on.
RIN
EQUATION
P SUPPLY = ( V DD – V SS ) ( I Q + V L ( p – p ) fC L )
= ( 5V ) ( 0.6µA + 5.0V p – p • 100Hz • 0.1µF )
= 3.0µW + 50µW
This will drain the battery 18 times as fast as IQ alone.
3.3
Rail to Rail Output
The output voltage range of the MCP6041/2/3/4 family
is specified two ways. The first specification, Maximum
Output Voltage Swing, defines the maximum swing
possible under a particular output load. According to
the spec table, the output can reach ≤ 10 mV of either
supply rail when RL = 50 kΩ. See Figure 2-32 for information on Maximum Output Voltage Swing vs. load
resistance.
 2002 Microchip Technology Inc.
VOUT
MCP604X
VIN
Heavy resistive loads at the output can cause excessive battery drain. Driving a DC voltage of 2.5 V across
a 100 kΩ load resistor will cause the supply current to
increase by 25 µA, depleting the battery 43 times as
fast as IQ (0.6 µA typ) alone.
High frequency signals (fast edge rate) across capacitive loads will also significantly increase supply current.
For instance, a 0.1 µF capacitor at the output presents
an AC impedance of 15.9 kΩ (1/2πfC) to a 100 Hz
sinewave. It can be shown that the average power
drawn from the battery by a 5.0 Vp-p sinewave
(1.77 Vrms), under these conditions, is:
Input Voltage and Phase Reversal
( Maximum expected V IN ) – V DD
R IN ≥ -----------------------------------------------------------------------------2 mA
V SS – ( Minimum expected V IN )
R IN ≥ --------------------------------------------------------------------------2 mA
FIGURE 3-1:
An input resistor, RIN,
should be used to limit excessive input current if
the inputs exceed the Absolute Maximum
specification.
3.5
Capacitive Load and Stability
Driving capacitive loads can cause stability problems
with voltage feedback op amps. A buffer configuration
(G = +1) is the most sensitive to capacitive loads.
Figure 2-27 shows how increasing the load capacitance will decrease the phase margin. While a phase
margin above 60° is ideal, 45° is sufficient. As can be
seen, up to CL = 150 pF can be placed on the
MCP6041/2/3/4 op amp outputs without any problems,
while 250 pF is usable with a 45° phase margin.
When the op amp is required to drive large capacitive
loads (CL >150 pF), a small series resistor (RISO in
Figure 3-2) at the output of the amplifier improves the
phase margin. This resistor makes the output load
resistive at higher frequencies, which improves the
phase margin. The bandwidth reduction caused by the
capacitive load, however, is not changed. To select
RISO, start with 1 kΩ, then use the MCP6041 SPICE
DS21669B-page 11
MCP6041/2/3/4
macro model and bench testing to adjust RISO until the
frequency response peaking is reasonable. Use the
smallest reasonable value.
RISO
VOUT
MCP604X
VIN
CL
FIGURE 3-2:
capacitive loads.
3.6
Surface leakage is caused by a difference in voltage
between traces, combined with high humidity, dust or
other contamination on the board. Under low humidity
conditions, a typical resistance between nearby traces
is 1012Ω. A 5 V difference would cause 5 pA of current
to flow; this is greater than the input current of the
MCP6041/2/3/4 family at 25°C (1 pA, typ).
The simplest technique to reduce surface leakage is
using a guard ring around sensitive pins (or traces).
The guard ring is biased at the same voltage as the
sensitive pin or trace. Figure 3-4 shows an example of
a typical layout.
Amplifier circuit for heavy
IN-
IN+
VSS
The MCP6043 Chip Select (CS)
Option
The MCP6043 is a single amplifier with a chip select
(CS) option. When CS is pulled high, the supply current
drops to 20 pA (typ) and goes through the CS pin to
VSS. When this happens, the amplifier is put into a high
impedance state. By pulling CS low, the amplifier is
enabled. If the CS pin is left floating, the amplifier will
not operate properly. Figure 3-3 shows the output voltage and supply current response to a CS pulse.
CS
VIL
VIH
tOFF
tON
VOUT
Hi-Z
Hi-Z
Guard Ring
FIGURE 3-4:
layout.
Example of Guard Ring
Circuit schematics for different guard ring implementations are shown in Figure 3-5. Figure 3-5A biases the
guard ring to the input common mode voltage, which is
most effective for non-inverting gains, including unity
gain. Figure 3-5B biases the guard ring to a reference
voltage (VREF, which can be ground). This is useful for
inverting gains and precision photo sensing circuits.
0.6 µA, typ
IVDD
5 pA, typ
5 pA, typ
Figure 3-5A
0.6 µA, typ
IVSS 20 pA, typ
ICS
5 pA, typ
VDD
20 pA, typ
MCP604X
FIGURE 3-3:
Timing Diagram for the CS
function on the MCP6043 op amp.
3.7
Figure 3-5B
Layout Considerations
Good PC board layout techniques will help you achieve
the performance shown in the specs and Typical Performance Curves. It will also assist in minimizing Electro-Magnetic Compatibility (EMC) issues.
3.7.1
VREF
5 pA, typ
SURFACE LEAKAGE
In applications where low input bias current is critical,
PC board surface leakage effects and signal coupling
from trace to trace need to be considered.
DS21669B-page 12
VDD
MCP604X
VREF
FIGURE 3-5:
Two possible guard ring
connection strategies to reduce surface leakage
effects.
2002 Microchip Technology Inc.
MCP6041/2/3/4
3.7.2
3.8
COMPONENT PLACEMENT
Typical Applications
Separate digital from analog and low speed from high
speed. This helps prevent crosstalk.
3.8.1
Keep sensitive traces short and straight. Separate
them from interfering components and traces. This is
especially important for high frequency (low rise time)
signals.
The MCP6041/2/3/4 op amps’ Common Mode Input
Range, which goes 300 mV beyond both supply rails,
supports their use in high side and low side battery
current sensing applications. The very low quiescent
current (0.6 µA, typ) help prolong battery life while the
rail-to-rail output allows you to detect low currents.
Use a 0.1 µF supply bypass capacitor within 0.1”
(2.5 mm) of the V DD pin. It must connect directly to the
ground plane.
3.7.3
SIGNAL COUPLING
The input pins of the MCP6041/2/3/4 family of op amps
are high impedance, which allows noise injection. This
noise can be capacitively or magnetically coupled. In
either case, using a ground plane helps reduce noise
injection.
Figure 3-7 shows a high side battery current sensor circuit. The 10 Ω resistors are sized to minimize power
losses. The battery current (IDD) through the 10 Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the common
mode input voltage of the op amp ≤ VDD, which is within
its allowed range. The output of the op amp can reach
VDD - 0.1 mV (see Figure 2-32), which is a smaller
error than the offset voltage.
When noise is coupled capacitively, the ground plane
provides shunt capacitance to ground for high frequency signals. Figure 3-6 shows the equivalent circuit. The coupled current, IM, produces a lower voltage
(VTRACE 2) on the victim trace when the trace to ground
plane capacitance (C SH2) is large and the terminating
resistor (RT2) is small. Increasing the distance between
traces, and using wider traces, also helps.
CM
IM
VTRACE 1
CSH1
BATTERY CURRENT SENSING
VDD
VDD
IDD
10 Ω
+2.5 V
to
5.5 V
MCP604X
VSS
100 kΩ
VTRACE 2
CSH2
1 MΩ
R T2
FIGURE 3-7:
Sensor.
3.8.2
FIGURE 3-6:
Equivalent circuit for
capacitive coupling between traces on a PC
board (with ground plane).
When noise is coupled magnetically, ground plane
reduces the mutual inductance between traces. This
occurs because the ground return current at high frequencies will follow a path directly beneath the signal
trace. Increasing the separation between traces makes
a significant difference. Changing the direction of one
of the traces can also reduce magnetic coupling.
If these techniques are not enough, it may help to place
guard traces next to the victim trace. They should be on
both sides of the victim trace and be as close as possible. Connect the guard traces to ground plane at both
ends, and in the middle, for long traces.
High Side Battery Current
INSTRUMENTATION AMPLIFIER
The MCP6041/2/3/4 op amp is well suited for conditioning sensor signals in battery-powered applications.
Figure 3-8 shows a two op amp instrumentation
amplifier, using the MCP6042, that works well for applications requiring rejection of common mode noise at
higher gains. The reference voltage (VREF) is supplied
by a low impedance source. In single supply
applications, VREF is typically VDD/2.
RG
VREF
R1
R1
R1
R1
VOUT
V2
V1
½ MCP6042
½ MCP6042
R 1 2R 1
V O UT = ( V 1 – V 2 )  1 + ------ + --------- + V REF

R 2 RG 
FIGURE 3-8:
Two Op Amp
Instrumentation Amplifier.
 2002 Microchip Technology Inc.
DS21669B-page 13
MCP6041/2/3/4
4.0
SPICE MACRO MODEL
The Spice macro model for the MCP6041, MCP6042,
MCP6043 and MCP6044 simulates the typical amplifier performance of: offset voltage, DC power supply
rejection, input capacitance, DC common mode rejection, open loop gain over frequency, phase margin, output swing, DC power supply current, power supply
current change with supply voltage, input common
mode range, output voltage range vs. load and input
voltage noise.
The characteristics of the MCP6041, MCP6042,
MCP6043 and MCP6044 amplifiers are similar in terms
of performance and behavior. This single op amp
macro model supports all four devices with the exception of the chip select function of the MCP6043, which
is not modeled.
The listing for this macro model is shown on the next
page. The most recent revision of the model can be
downloaded from
Microchip’s
web site at
www.microchip.com.
DS21669B-page 14
2002 Microchip Technology Inc.
MCP6041/2/3/4
Software License Agreement
The software supplied herewith by Microchip Technology Incorporated (the “Company”) is intended and supplied to you, the Company’s customer, for use solely and exclusively on Microchip products.
The software is owned by the Company and/or its supplier, and is protected under applicable copyright laws. All rights are reserved.
Any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civil
liability for the breach of the terms and conditions of this license.
THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR
SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
.SUBCKT MCP6041 1 2 3 4 5
*
| | | | |
*
| | | | Output
*
| | | Negative Supply
*
| | Positive Supply
*
| Inverting Input
*
Non-inverting Input
*
* Macromodel for the MCP6041/2/3/4 op amp
family:
*
MCP6041 (single)
*
MCP6042 (dual)
*
MCP6043 (single w/ CS; chip select is not
modeled)
*
MCP6044 (quad)
*
* Revision History:
*
REV A: 7-9-01 created KEB
*
* Recommendations:
*
Use PSPICE (other simulators may require
translation)
*
For a quick, effective design, use a combination of: data sheet
*
specs, bench testing, and simulations
with this macromodel
*
For high impedance circuits, set
GMIN=100F in the.OPTIONS
*
statement
*
* Supported:
*
Typical performance at room temperature
(25 degrees C)
*
DC, AC, Transient, and Noise analyses.
*
Most specs, including: offsets, PSRR,
CMRR, input impedance,
*
open loop gain, voltage ranges, supply
current,..., etc.
*
* Not Supported:
*
Chip Select (MCP6043)
*
Variation in specs vs. Power Supply Voltage
*
Distortion (detailed non-linear behavior)
*
Temperature analysis
*
Process variation
*
Behavior outside normal operating region
*
* Input Stage
V10 3 10 -0.3
R10 10 11 78K
 2002 Microchip Technology Inc.
R11 10 12 78K
C11 11 12 4.9P
C12 1 0 6P
E12 1 14 POLY(4) 20 0 21 0 26 0 27 0
1 1
G12 14 0 POLY(2) 22 0 23 0
1.5P 1U
M12 11 14 15 15 NMI
C13 14 2 3P
M14 12 2 15 15 NMI
G14 2 0 POLY(2) 24 0 25 0
0.5P 1U
C14 2 0 6P
I15 15 4 500N
V16 16 4 0.18
D16 16 15 DL
V13 3 13 0.00
D13 14 13 DL
*
* Noise Sources
I20 21 20 17.2N
D20 20 0 DN1
D21 0 21 DN1
I22 23 22 588U
D22 22 0 DN23
D23 0 23 DN23
I24 25 24 588U
D24 24 0 DN23
D25 0 25 DN23
*
* PSRR and CMRR
G26 0 26 POLY(1) 3 4
110U -20U
R26 26 0 1
G27 0 27 POLY(2) 1 3 2 4
-275U 50U
R27 27 0 1
*
* Open Loop Gain, Slew Rate
G30 0 30 POLY(1) 12 11
0 1MEG
R30 30 0 1
C30 30 0 11.4
G31 0 31 POLY(1) 30 0
0 1
R31 31 0 1
C31 31 0 775N
*
* Output Stage
G40 0 40 POLY(1) 45 5
0 22.7M
D41 40 41 DL
R41 41 0 1K
D42 42 40 DL
R42 42 0 1K
G43 3 0 POLY(1) 41 0
100N 1M
G47 0 4 POLY(1) 42 0
100N -1M
E43 43 0 POLY(1) 3 0
0 1
1M 1 1
1U
1U
50U
DS21669B-page 15
MCP6041/2/3/4
E47 47 0 POLY(1) 4 0
0 1
V44 43 44 1M
D44 45 44 DLS
D46 46 45 DLS
V46 46 47 1M
G45 47 45 POLY(2) 31 0 3 4
0 8U 4U
R45 45 47 125K
R48 45 5 44
C48 5 0 2P
*
* Models
.MODEL NMI NMOS L=2 W=42
.MODEL DL
D N=1
IS=1F
.MODEL DLS D N=1M IS=1F
.MODEL DN1 D IS=1F KF=1.13E-18 AF=1
.MODEL DN23 D IS=1F KF=3E-20
AF=1
*
.ENDS MCP6041
DS21669B-page 16
2002 Microchip Technology Inc.
MCP6041/2/3/4
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
8-Lead PDIP (300 mil)
Example:
XXXXXXXX
XXXXXNNN
YYWW
MCP6041
I/PNNN
YYWW
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
MCP6041
I/SNYYWW
NNN
NNN
Example:
8-Lead MSOP
XXXXXX
6041
YWWNNN
YWWNNN
5-Lead SOT-23 (MCP6041 only)
5
Example:
4
5
XXNN
1
2
Note:
*
SBNN
3
Legend:
4
XX...X
YY
WW
NNN
1
2
3
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.
 2002 Microchip Technology Inc.
DS21669B-page 17
MCP6041/2/3/4
5.1
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6044)
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
14-Lead SOIC (150 mil) (MCP6044)
Example:
MCP6044-I/P
XXXXXXXXXXXXXX
YYWWNNN
Example:
MCP6044ISL
XXXXXXXXXX
YYWWNNN
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
14-Lead TSSOP (MCP6044)
XXXXXX
YYWW
6044ST
YYWW
NNN
NNN
Legend:
Note:
*
Example:
XX...X
YY
WW
NNN
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.
DS21669B-page 18
2002 Microchip Technology Inc.
MCP6041/2/3/4
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
§
A
A2
A1
E
E1
D
L
c
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
 2002 Microchip Technology Inc.
DS21669B-page 19
MCP6041/2/3/4
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21669B-page 20
2002 Microchip Technology Inc.
MCP6041/2/3/4
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
p
E1
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Number of Pins
Pitch
Dimension Limits
n
p
Overall Height
NOM
MAX
8
0.65
.026
A
.044
.030
Standoff
A1
.002
E
.184
Molded Package Width
MIN
8
A2
Overall Width
MAX
NOM
Molded Package Thickness
§
MILLIMETERS*
INCHES
MIN
.034
1.18
.038
0.76
.006
0.05
.193
.200
0.86
0.97
4.67
4.90
.5.08
0.15
E1
.114
.118
.122
2.90
3.00
3.10
Overall Length
D
.114
.118
.122
2.90
3.00
3.10
Foot Length
L
.016
.022
.028
0.40
0.55
0.70
Footprint (Reference)
.035
.037
.039
0.90
0.95
1.00
Foot Angle
F
φ
6
0
Lead Thickness
c
.004
.006
.008
0.10
0.15
0.20
Lead Width
B
α
.010
.012
.016
0.25
0.30
0.40
Mold Draft Angle Top
Mold Draft Angle Bottom
β
0
6
7
7
7
7
*Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
Drawing No. C04-111
 2002 Microchip Technology Inc.
DS21669B-page 21
MCP6041/2/3/4
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
E
E1
p
B
p1
n
D
1
α
c
A
φ
L
β
Units
Dimension Limits
n
p
Number of Pins
Pitch
Outside lead pitch (basic)
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
MIN
p1
A
A2
A1
E
E1
D
L
φ
c
B
α
β
.035
.035
.000
.102
.059
.110
.014
0
.004
.014
0
0
A2
A1
INCHES*
NOM
5
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
.006
.017
5
5
MAX
.057
.051
.006
.118
.069
.122
.022
10
.008
.020
10
10
MILLIMETERS
NOM
5
0.95
1.90
0.90
1.18
0.90
1.10
0.00
0.08
2.60
2.80
1.50
1.63
2.80
2.95
0.35
0.45
0
5
0.09
0.15
0.35
0.43
0
5
0
5
MIN
MAX
1.45
1.30
0.15
3.00
1.75
3.10
0.55
10
0.20
0.50
10
10
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
DS21669B-page 22
2002 Microchip Technology Inc.
MCP6041/2/3/4
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
eB
B1
p
B
Units
Dimension Limits
n
p
MIN
INCHES*
NOM
14
.100
.155
.130
MAX
MILLIMETERS
NOM
14
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
18.80
19.05
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
Number of Pins
Pitch
Top to Seating Plane
A
.140
.170
Molded Package Thickness
A2
.115
.145
Base to Seating Plane
A1
.015
Shoulder to Shoulder Width
E
.300
.313
.325
Molded Package Width
E1
.240
.250
.260
Overall Length
D
.740
.750
.760
Tip to Seating Plane
L
.125
.130
.135
c
Lead Thickness
.008
.012
.015
Upper Lead Width
B1
.045
.058
.070
Lower Lead Width
B
.014
.018
.022
Overall Row Spacing
§
eB
.310
.370
.430
α
Mold Draft Angle Top
5
10
15
β
Mold Draft Angle Bottom
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005
 2002 Microchip Technology Inc.
MAX
4.32
3.68
8.26
6.60
19.30
3.43
0.38
1.78
0.56
10.92
15
15
DS21669B-page 23
MCP6041/2/3/4
14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
A1
L
β
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.150
.337
.010
.016
0
.008
.014
0
0
INCHES*
NOM
14
.050
.061
.056
.007
.236
.154
.342
.015
.033
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.347
.020
.050
8
.010
.020
15
15
MILLIMETERS
NOM
14
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
5.99
3.81
3.90
8.56
8.69
0.25
0.38
0.41
0.84
0
4
0.20
0.23
0.36
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
8.81
0.51
1.27
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-065
DS21669B-page 24
2002 Microchip Technology Inc.
MCP6041/2/3/4
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
β
A1
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
φ
c
B1
α
β
MIN
.033
.002
.246
.169
.193
.020
0
.004
.007
0
0
INCHES
NOM
14
.026
.035
.004
.251
.173
.197
.024
4
.006
.010
5
5
A2
MAX
.043
.037
.006
.256
.177
.201
.028
8
.008
.012
10
10
MILLIMETERS*
NOM
MAX
14
0.65
1.10
0.85
0.90
0.95
0.05
0.10
0.15
6.25
6.38
6.50
4.30
4.40
4.50
4.90
5.00
5.10
0.50
0.60
0.70
0
4
8
0.09
0.15
0.20
0.19
0.25
0.30
0
5
10
0
5
10
MIN
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
 2002 Microchip Technology Inc.
DS21669B-page 25
MCP6041/2/3/4
NOTES:
DS21669B-page 26
2002 Microchip Technology Inc.
MCP6041/2/3/4
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web (WWW) site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape or Microsoft
Explorer. Files are also available for FTP download
from our FTP site.
Connecting to the Microchip Internet Web Site
Systems Information and Upgrade Hot Line
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive any currently available upgrade kits.The
Hot Line Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
013001
The Microchip web site is available by using your
favorite Internet browser to attach to:
www.microchip.com
The file transfer site is available by using an FTP service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
 2002 Microchip Technology Inc.
DS21669B-page 27
MCP6041/2/3/4
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this Data Sheet.
To:
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RE:
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Total Pages Sent
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: MCP6041/2/3/4
Y
N
Literature Number: DS21669B
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
DS21669B-page 28
 2002 Microchip Technology Inc.
MCP6041/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
Device:
X
/XX
Temperature
Range
Package
MCP6041: CMOS Single Op Amp
MCP6041T: CMOS Single Op Amp
(Tape and Reel for SOT-23, SOIC, MSOP)
MCP6042: CMOS Dual Op Amp
MCP6042T: CMOS Dual Op Amp
(Tape and Reel for SOIC and TSSOP)
MCP6043: CMOS Single Op Amp w/CS Function
MCP6043T: CMOS Single Op Amp w/CS Function
(Tape and Reel for SOIC and MSOP)
MCP6044: CMOS Quad Op Amp
MCP6044T: CMOS Quad Op Amp
(Tape and Reel for SOIC and TSSOP)
Temperature Range:
I
=
Package:
MS
P
SN
OT
=
=
=
=
SL
ST
=
=
Examples:
a)
MCP6041-I/P:
PDIP package.
Industrial temperature,
b)
MCP6041T-I/OT: Tape and Reel, Industrial temperature, SOT-23 package.
c)
MCP6042-I/SN:
SOIC package.
Industrial temperature,
d)
MCP6043-I/MS:
MSOP package.
Industrial temperature,
e)
MCP6044-I/SL:
SIOC package.
Industrial temperature,
f)
MCP6044-I/ST:
Industrial temperature,
TSSOP package.
-40°C to +85°C
Plastic MSOP, 8-lead
Plastic DIP (300 mil Body), 8-lead, 14-lead
Plastic SOIC (150 mil Body), 8-lead
Plastic Small Outline Transistor (SOT-23),
5-lead (Tape and Reel - MCP6041 only)
Plastic SOIC (150 mil Body), 14-lead
Plastic TSSOP (4.4mm Body), 14-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2002 Microchip Technology Inc.
DS21669B-page 29
MCP6041/2/3/4
NOTES:
DS21669B-page 30
 2002 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, MXLAB, PICC, PICDEM, PICDEM.net, rfPIC, Select
Mode and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro ® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
 2002 Microchip Technology Inc.
DS21669B - page 31
M
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
Corporate Office
Australia
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
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Rocky Mountain
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China - Chengdu
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Tel: 86-28-86766200 Fax: 86-28-86766599
China - Fuzhou
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Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
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Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
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Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
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150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086
San Jose
China - Hong Kong SAR
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
New York
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
India
Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Korea
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
France
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany
Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Italy
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
United Kingdom
Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
Austria
Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
05/16/02
DS21669B-page 32
 2002 Microchip Technology Inc.