MICROCHIP MCP6543T

M
MCP6541/2/3/4
Push-Pull Output Sub-Microamp Comparators
Features
Description
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The Microchip Technology Inc. MCP6541/2/3/4 family
of comparators is offered in single (MCP6541), single
with chip select (MCP6543), dual (MCP6542) and quad
(MCP6544) configurations. The outputs are push-pull
(CMOS/TTL-compatible) and are capable of driving
heavy DC or capacitive loads.
Low Quiescent Current: 600 nA/comparator (typ.)
Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V
CMOS/TTL-Compatible Output
Propagation Delay 4 µs (typ.)
Wide Supply Voltage Range: 1.6V to 5.5V
Available in Single, Dual and Quad
Single available in SOT-23-5, SC-70-5 packages
Chip Select (CS) with MCP6543
Low Switching Current
Internal Hysteresis: 3.3 mV (typ.)
Industrial Temperature: -40°C to +85°C
Typical Applications
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Laptop Computers
Mobile Phones
Metering Systems
Hand-held Electronics
RC Timers
Alarm and Monitoring Circuits
Windowed Comparators
Multi-vibrators
These comparators are optimized for low power, singlesupply operation with greater than rail-to-rail input
operation. The push-pull output of the MCP6541/2/3/4
family supports rail-to-rail output swing and interfaces
with TTL/CMOS logic. The internal input hysteresis
eliminates output switching due to internal input noise
voltage, reducing current draw. The output limits supply
current surges and dynamic power consumption while
switching. This product family operates with a singlesupply voltage as low as 1.6V and draws less than 1 µA/
comparator of quiescent current.
The related MCP6546/7/8/9 family of comparators from
Microchip has an open-drain output. Used with a pull-up
resistor, these devices can be used as level-shifters for
any desired voltage up to 10V and in wired-OR logic.
Related Devices
• Open-Drain Output: MCP6546/7/8/9
Package Types
1
2
3
4
8
7
6
5
+
NC
VDD
OUT
NC
OUT 1
VDD 2
VIN+ 3
MCP6541
SOT-23-5, SC-70-5
5 VDD
-
+
OUT 1
VSS 2
VIN+ 3
4 VIN–
 2003 Microchip Technology Inc.
MCP6542
PDIP, SOIC, MSOP
OUTA
VINA–
4 VIN– VINA+
VSS
5 VSS
+
NC
VIN–
VIN+
VSS
MCP6541-R
SOT-23-5
-
MCP6541
PDIP, SOIC, MSOP
1
2
3
4
- +
+ -
8
7
6
5
VDD
OUTA
OUTB VINA–
VINB– VINA+
VDD
VINB+
1
14
2
- + + - 13
3
12
4
11
VINB+
VINB–
OUTB
5
10
MCP6543
PDIP, SOIC, MSOP
NC
VIN–
VIN+
VSS
1
2
3
4
+
8
7
6
5
MCP6544
PDIP, SOIC, TSSOP
CS
VDD
6
7
- + + -
9
8
OUTD
VIND–
VIND+
VSS
VINC+
VINC–
OUTC
OUT
NC
DS21696C-page 1
MCP6541/2/3/4
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Absolute Maximum Ratings †
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
VDD - VSS .........................................................................7.0V
All inputs and outputs ...................... VSS –0.3V to VDD +0.3V
PIN FUNCTION TABLE
Difference Input voltage ....................................... |VDD - VSS|
Output Short-Circuit Current .................................continuous
NAME
Current at Input Pins ....................................................±2 mA
FUNCTION
VIN+, VINA+, VINB+, VINC+,
VIND+
Current at Output and Supply Pins ............................±30 mA
Storage temperature .....................................-65°C to +150°C
Non-Inverting Inputs
VIN–, VINA–, VINB–, VINC–, VIND– Inverting Inputs
Maximum Junction Temperature (TJ) .......................... +150°C
ESD protection on all pins (HBM;MM) ...................4 kV; 400V
VDD
Positive Power Supply
VSS
Negative Power Supply
OUT, OUTA, OUTB, OUTC,
OUTD
Outputs
CS
Chip Select
NC
Not Connected
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C,VIN+ = VDD/2,
VIN– = VSS, and RL = 100 kΩ to VDD/2 (Refer to Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VDD
1.6
—
5.5
V
IQ
0.3
0.6
1.0
µA
Input Voltage Range
VCMR
VSS−0.3
—
VDD+0.3
V
Common Mode Rejection Ratio
CMRR
55
70
—
dB
VDD = 5V, VCM = -0.3V to 5.3V
Common Mode Rejection Ratio
CMRR
50
65
—
dB
VDD = 5V, VCM = 2.5V to 5.3V
Common Mode Rejection Ratio
CMRR
55
70
—
dB
VDD = 5V, VCM = -0.3V to 2.5V
Power Supply Rejection Ratio
PSRR
63
80
—
dB
VCM = VSS
VOS
-7.0
±1.5
+7.0
mV
VCM = VSS (Note 1)
∆VOS/∆TA
—
±3
—
Power Supply
Supply Voltage
Quiescent Current per comparator
IOUT = 0
Input
Input Offset Voltage
Drift with Temperature
Input Hysteresis Voltage
µV/°C TA = -40°C to +85°C, VCM = VSS
VHYST
1.5
3.3
6.5
Drift with Temperature
∆VHYST/∆TA
—
10
—
µV/°C TA = -40°C to +25°C, VCM = VSS
Drift with Temperature
∆VHYST/∆TA
—
5
—
µV/°C TA = +25°C to +85°C, VCM = VSS
IB
—
1
—
pA
VCM = VSS
IB
—
—
100
pA
TA = -40°C to +85°C, VCM = VSS
(Note 3)
IOS
—
±1
—
pA
VCM = VSS
13
Input Bias Current
Over-Temperature
Input Offset Current
mV
VCM = VSS (Note 1)
Common Mode Input Impedance
ZCM
—
10 ||4
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||2
—
Ω||pF
High-Level Output Voltage
VOH
VDD−0.2
—
—
V
IOUT = -2 mA, VDD = 5V
Low-Level Output Voltage
VOL
—
—
VSS+0.2
V
IOUT = 2 mA, VDD = 5V
ISC
—
±50
—
mA
Push-Pull Output
Short-Circuit Current
Note 1:
2:
3:
(Note 2)
The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference
between the input-referred trip points.
Limit the output current to Absolute Maximum Rating of 30 mA.
Input bias current over temperature is not tested for SC-70-5 package.
DS21696C-page 2
 2003 Microchip Technology Inc.
MCP6541/2/3/4
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2,
Step = 200 mV, Overdrive = 100 mV, and CL = 36 pF (Refer to Figure 1-2 and Figure 1-3).
Parameters
Rise Time
Sym
Min
Typ
Max
Units
tR
—
0.85
—
µs
Conditions
tF
—
0.85
—
µs
Propagation Delay (High-to-Low)
tPHL
—
4
8
µs
Propagation Delay (Low-to-High)
tPLH
—
4
8
µs
Propagation Delay Skew
tPDS
—
±0.2
—
µs
Maximum Toggle Frequency
fMAX
—
160
—
kHz
VDD = 1.6V
fMAX
—
120
—
kHz
VDD = 5.5V
EN
—
200
—
µVP-P
Fall Time
Input Noise Voltage
Note 1:
(Note 1)
10 Hz to 100 kHz
Propagation Delay Skew is defined as: tPDS = tPLH - tPHL.
SPECIFICATIONS FOR MCP6543 CHIP-SELECT
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = VSS,
and CL= 36 pF (Refer to Figures 1-1 and 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
CS Logic Threshold, Low
VIL
VSS
—
0.2VDD
V
CS Input Current, Low
ICSL
—
5.0
—
pA
CS Logic Threshold, High
VIH
0.8VDD
—
VDD
V
CS Input Current, High
ICSH
—
1
—
pA
CS = VDD
CS Input High, VDD Current
IDD
—
18
—
pA
CS = VDD
CS Input High, GND Current
ISS
—
-20
—
pA
CS = VDD
Comparator Output Leakage
IO(LEAK)
—
1
—
pA
VOUT = VDD
CS Low to Comparator Output Low
Turn-on Time
tON
—
2
50
ms
CS = 0.2 VDD to VOUT = VDD/2,
VIN– = VDD
CS High to Comparator Output
High Z Turn-off Time
tOFF
—
10
—
µs
CS = 0.8 VDD to VOUT = VDD/2,
VIN– = VDD
VCS_HYST
—
0.6
—
V
VDD = 5V
CS Low Specifications
CS = VSS
CS High Specifications
CS Dynamic Specifications
CS Hysteresis
CS
VIL
VIH
tON
VOUT
ISS
ICS
tOFF
100 mV
VIN+ = VDD/2
Hi-Z
Hi-Z
-20 pA, typ.
VIN–
-0.6 µA, typ.
1 pA, typ.
-20 pA, typ.
1 pA, typ.
FIGURE 1-1:
Timing Diagram for the CS
Pin on the MCP6543.
 2003 Microchip Technology Inc.
100 mV
tPLH
VOUT
VOL
FIGURE 1-2:
Diagram.
tPHL
VOH
VOL
Propagation Delay Timing
DS21696C-page 3
MCP6541/2/3/4
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V and VSS = GND.
Parameters
Sym
Min
Specified Temperature Range
TA
-40
Operating Temperature Range
TA
-40
Storage Temperature Range
TA
-65
Typ
Max
Units
—
+85
°C
—
+125
°C
—
+150
°C
Conditions
Temperature Ranges
Note
Thermal Package Resistances
Thermal Resistance, 5L-SC-70
θJA
—
331
—
°C/W
Thermal Resistance, 5L-SOT-23
θJA
—
256
—
°C/W
Thermal Resistance, 8L-PDIP
θJA
—
85
—
°C/W
Thermal Resistance, 8L-SOIC
θJA
—
163
—
°C/W
Thermal Resistance, 8L-MSOP
θJA
—
206
—
°C/W
Thermal Resistance, 14L-PDIP
θJA
—
70
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
120
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Note:
1.2
The MCP6541/2/3/4 operates over this extended temperature range, but with reduced performance. In any
case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.
Test Circuit Configuration
This test circuit configuration is used to determine the
AC and DC specifications.
VDD
200 kΩ
MCP654X
200 kΩ
200 kΩ
VIN = VSS
200 kΩ
VOUT
36 pF
VSS = 0V
FIGURE 1-3:
AC and DC Test Circuit for
the Push-Pull Output Comparators.
DS21696C-page 4
 2003 Microchip Technology Inc.
MCP6541/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
12%
18%
1200 Samples
VCM = VSS
Percentage of Occurrences
Percentage of Occurrences
14%
10%
8%
6%
4%
2%
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4
Input Offset Voltage (mV)
5
6
10%
8%
6%
4%
2%
1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0
Input Hysteresis Voltage (mV)
FIGURE 2-4:
Input Hysteresis Voltage
Histogram at VCM = VSS.
1200 Samples
VCM = VSS
Percentage of Occurrences
Percentage of Occurrences
12%
7
FIGURE 2-1:
Input Offset Voltage
Histogram at VCM = VSS.
14%
14%
0%
0%
16%
1200 Samples
VCM = VSS
16%
12%
10%
8%
6%
4%
2%
0%
26%
24%
22%
20%
18%
16%
14%
12%
10%
8%
6%
4%
2%
0%
6.0
VCM = VSS
VDD = 1.6V
VDD = 5.5V
-40
-20
0
20
40
60
Ambient Temperature (°C)
80
FIGURE 2-3:
Input Offset Voltage vs.
Ambient Temperature at VCM = VSS.
 2003 Microchip Technology Inc.
3
4 5 6 7 8 9 10 11 12 13 14 15 16
Input Hysteresis Voltage Drift (µV/°C)
FIGURE 2-5:
Drift Histogram.
Input Hysteresis Voltage (mV)
Input Offset Voltage (µV)
500
400
300
200
100
0
-100
-200
-300
-400
-500
5.5
TA = +25°C to +85°C
TA = -40°C to +25°C
2
-14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14
Input Offset Voltage Drift (µV/°C)
FIGURE 2-2:
Input Offset Voltage Drift
Histogram at VCM = VSS.
1200 Samples
VCM = VSS
Input Hysteresis Voltage
VCM = VSS
5.0
4.5
4.0
VDD = 1.6V
3.5
3.0
VDD = 5.5V
2.5
2.0
1.5
-40
-20
0
20
40
60
Ambient Temperature (°C)
80
FIGURE 2-6:
Input Hysteresis Voltage vs.
Ambient Temperature at VCM = VSS.
DS21696C-page 5
MCP6541/2/3/4
TA = -40°C
2.0
Common Mode Input Voltage (V)
2.5
85
PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V
75
CMRR, VIN+ = -0.3V to 2.5V, VDD = 5.0V
70
CMRR, VIN+ = -0.3V to 5.3V, VDD = 5.0V
CMRR, VIN+ = 2.5V to 5.3V, VDD = 5.0V
60
55
-20
0
20
40
60
Ambient Temperature (°C)
80
FIGURE 2-9:
CMRR, PSRR vs. Ambient
Temperature at VCM = VSS.
DS21696C-page 6
Input Current (pA)
CMRR, PSRR; Input Referred
(dB)
2.0
1.8
1.6
1.4
6.0
5.5
FIGURE 2-11:
Input Hysteresis Voltage vs.
Common Mode Input Voltage at VDD = 5.5V.
90
-40
5.0
Common Mode Input Voltage (V)
FIGURE 2-8:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 5.5V.
65
4.5
1.5
Common Mode Input Voltage (V)
80
TA = -40°C
2.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-2.0
TA = +25°C
3.0
4.0
-1.5
3.5
3.5
TA = -40°C
TA = +85°C
4.0
3.0
TA = +25°C
4.5
-0.5
-1.0
5.0
2.5
-0.5
VDD = 5.5V
5.5
2.0
TA = +85°C
0.0
6.0
0.0
1.0
0.5
FIGURE 2-10:
Input Hysteresis Voltage vs.
Common Mode Input Voltage at VDD = 1.6V.
Input Hysteresis Voltage (mV)
Input Offset Voltage (mV)
VDD = 5.5V
1.5
1.2
Common Mode Input Voltage (V)
FIGURE 2-7:
Input Offset Voltage vs.
Common Mode Input Voltage at VDD = 1.6V.
2.0
1.0
1.5
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-2.0
2.5
0.8
-1.5
3.0
1.5
-1.0
3.5
1.0
-0.5
4.0
0.6
TA = +25°C
TA = -40°C
0.5
0.0
4.5
0.4
0.5
TA = +85°C
TA = +25°C
5.0
0.2
1.0
VDD = 1.6V
5.5
0.0
TA = +85°C
6.0
-0.2
VDD = 1.6V
1.5
-0.4
Input Offset Voltage (mV)
2.0
Input Hysteresis Voltage (mV)
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
24
22
20
18
16
14
12
10
8
6
4
2
0
TA = +85°C
VDD = 5.5V
Input Bias Current
Input Offset Current
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
FIGURE 2-12:
Input Bias Current, Input
Offset Current vs. Common Mode Voltage at
+85°C.
 2003 Microchip Technology Inc.
MCP6541/2/3/4
22
20
18
16
14
12
10
8
6
4
2
0
-2
0.7
VDD = 5.5V
VCM = VDD
Quiescent Current
(µA/comparator)
Input Bias Current
Input Offset
Current
TA = +85°C
0.6
TA = +25°C
0.5
TA = -40°C
0.4
0.3
0.2
0.1
0.0
55
65
75
85
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Ambient Temperature (°C)
Power Supply Voltage (V)
FIGURE 2-13:
Input Bias Current, Input
Offset Current vs. Ambient Temperature.
0.7
VDD = 5.5 V
-20
0
20
40
60
80
Ambient Temperature (°C)
Common Mode Input Voltage (V)
FIGURE 2-14:
Quiescent Current vs.
Ambient Temperature.
FIGURE 2-17:
Quiescent Current vs.
Common Mode Input Voltage at VDD = 5V.
50
VDD = 1.6V
Quiescent Current
(µA/comparator)
0.6
0.5
0.4
0.3
Sweep VIN+, VIN- = VDD/2
Sweep VIN-, VIN+ = VDD/2
0.2
0.1
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
0.0
Common Mode Input Voltage (V)
FIGURE 2-15:
Quiescent Current vs.
Common Mode Input Voltage at VDD = 1.6V.
 2003 Microchip Technology Inc.
Output Short Circuit Current
(mA)
0.7
6.0
0.0
5.5
0.0
-0.5
0.1
Sweep VIN–, VIN+ = VDD/2
5.0
0.2
0.1
-40
Sweep VIN+, VIN– = VDD/2
4.5
0.2
0.3
4.0
0.3
0.4
3.5
0.4
0.5
1.0
VDD = 1.6 V
0.5
0.5
VDD = 5.5V
0.6
Quiescent Current
(µA/comparator)
0.6
0.0
0.7
Quiescent Current
(µA/comparator)
FIGURE 2-16:
Quiescent Current vs.
Power Supply Voltage.
3.0
45
2.5
35
2.0
25
1.5
Input Current (pA)
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
45
40
35
-IOSC, TA = -40°C
30
-IOSC, TA = +25°C
25
-IOSC, TA = +85°C
20
15
|+IOSC|, TA = -40°C
10
|+IOSC|, TA = +25°C
5
|+IOSC|, TA = +85°C
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
Power Supply Voltage (V)
5.0
5.5
FIGURE 2-18:
Output Short-Circuit Current
vs. Power Supply Voltage.
DS21696C-page 7
MCP6541/2/3/4
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
1.0
VDD = 1.6V
0.9
Output Voltage Headroom (V)
Output Voltage Headroom (V)
1.0
0.8
0.7
VOL-VSS, TA = -40°C
VOL-VSS, TA = +25°C
VOL-VSS, TA = +85°C
0.6
0.5
0.4
0.3
VDD-VOH, TA = +85°C
VDD-VOH, TA = +25°C
VDD-VOH, TA = -40°C
0.2
0.1
0.8
VOL-VSS, TA = -40°C
VOL-VSS, TA = +25°C
VOL-VSS, TA = +85°C
0.7
0.6
0.5
0.4
0.3
VDD-VOH, TA = +85°C
VDD-VOH, TA = +25°C
VDD-VOH, TA = -40°C
0.2
0.1
0.0
0.0
0.0
0.5
1.0
1.5
Output Current (mA)
2.0
45%
35%
30%
25%
20%
15%
VDD = 1.6V
10%
VDD = 5.5V
5%
0%
45%
1
2
3
4
5
6
7
35%
25
30%
25%
20%
15%
VDD = 1.6V
10%
VDD = 5.5V
5%
8
0
High-to-Low Propagation
30%
25%
20%
VDD = 5.5V
10%
2
FIGURE 2-23:
Delay Histogram.
8
600 Samples
100 mV Overdrive
VCM = VDD/2
15%
1
3
4
5
6
7
8
Low-to-High Propagation Delay (µs)
Propagation Delay (µs)
Percentage of Occurrences
FIGURE 2-20:
Delay Histogram.
35%
20
600 Samples
100 mV Overdrive
VCM = VDD/2
40%
High-to-Low Propagation Delay (µs)
40%
10
15
Output Current (mA)
0%
0
45%
5
FIGURE 2-22:
Output Voltage Headroom
vs. Output Current at VDD = 5.5V.
Percentage of Occurrences
600 Samples
100 mV Overdrive
VCM = VDD/2
40%
0
2.5
FIGURE 2-19:
Output Voltage Headroom
vs. Output Current at VDD = 1.6V.
Percentage of Occurrences
VDD = 5.5V
0.9
VDD = 1.6V
5%
0%
7
Low-to-High Propagation
100 mV Overdrive
VCM = VDD/2
6
5
tPLH @ VDD = 5.5V
tPHL @ VDD = 5.5V
tPLH @ VDD = 1.6V
tPHL @ VDD = 1.6V
4
3
2
1
0
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
Propagation Delay Skew (µs)
FIGURE 2-21:
Histogram.
DS21696C-page 8
Propagation Delay Skew
-40
-20
0
20
40
60
Ambient Temperature (°C)
80
FIGURE 2-24:
Propagation Delay vs.
Ambient Temperature.
 2003 Microchip Technology Inc.
MCP6541/2/3/4
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
100
VCM = VDD/2
Propagation Delay (µs)
tPLH @ 10 mV Overdrive
tPHL @ 10 mV Overdrive
tPLH @ 100 mV Overdrive
tPHL @ 100 mV Overdrive
tPLH @ VDD = 1.6V
tPHL @ VDD = 1.6V
10
tPLH @ VDD = 5.5V
1
1.5
2.0
2.5 3.0 3.5 4.0 4.5
Power Supply Voltage (V)
5.0
5.5
FIGURE 2-25:
Propagation Delay vs.
Power Supply Voltage.
8
8
6
5
tPLH
4
3
tPHL
2
1
1000
Propagation Delay vs. Input
VDD = 5.5V
100 mV Overdrive
7
6
tPHL
5
4
tPLH
3
2
1
Common Mode Input Voltage (V)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
Common Mode Input Voltage (V)
FIGURE 2-26:
Propagation Delay vs.
Common Mode Input Voltage at VDD = 1.6V.
50
45
40
35
30
25
20
15
10
5
0
0.5
-0.5
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
0
-0.4
0
FIGURE 2-29:
Propagation Delay vs.
Common Mode Input Voltage at VDD = 5.5V.
10
100 mV Overdrive
VCM = VDD/2
tPHL @ VDD = 1.6V
tPLH @ VDD = 1.6V
tPHL @ VDD = 5.5V
Supply Current (µA)
Propagation Delay (µs)
10
100
Input Overdrive (mV)
FIGURE 2-28:
Overdrive.
VDD = 1.6V
100 mV Overdrive
7
1
Propagation Delay (µs)
Propagation Delay (µs)
VCM = VDD/2
tPHL @ VDD = 5.5V
0.0
Propagation Delay (µs)
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
100 mV Overdrive
VCM = VDD/2
RL = Infinity
1
VDD = 5.5 V
VDD = 1.6 V
tPLH @ VDD = 5.5V
0.1
0
10
FIGURE 2-27:
Capacitance.
20
30 40 50 60 70
Load Capacitance (nF)
80
90
Propagation Delay vs. Load
 2003 Microchip Technology Inc.
0.1
FIGURE 2-30:
Frequency.
1
10
Toggle Frequency (kHz)
100
Supply Current vs. Toggle
DS21696C-page 9
MCP6541/2/3/4
VDD = 5.5V
6
5
VOUT
4
3
2
VIN–
1
0
-1
0
1
2
3
4
5
6
7
Time (1 ms/div)
8
9
VDD = 5.5V
VOUT
CS
0
10
1
2
100µ
Comparator
Turns On Here
10µ
1.E-05
Supply Current (A/Comparator)
1.E-04
Comparator
Shuts Off Here
1µ
1.E-06
CS Hysteresis
100n
1.E-07
CS Low-to-High
10n
1.E-08
CS High-to-Low
1n
1.E-09
100p
1.E-10
VDD = 1.6V
10p
7
8
9
10
Comparator
Turns On Here
10µ
1.E-05
Comparator
Shuts Off Here
1µ
1.E-06
CS High-to-Low
100n
1.E-07
CS Low-to-High
CS Hysteresis
10n
1.E-08
1n
1.E-09
100p
1.E-10
VDD = 5.5V
10p
0.0
1.E-11
1.E-11
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.5
1.0
Chip Select (CS) Voltage (V)
25
0.0
CS
20
-1.6
VDD = 1.6V
15
-3.2
Start-up IDD
10
-4.9
Charging output
capacitance
5
0
1
2
3
4
5
6
7
-6.5
8
9
Time (1 ms/div)
10
11
12
13
14
-8.1
FIGURE 2-33:
Supply Current (charging
current) vs. Chip-Select (CS) pulse at
VDD = 1.6V (MCP6543 only).
DS21696C-page 10
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
FIGURE 2-35:
Supply Current (shoot
through current) vs. Chip-Select (CS) Voltage at
VDD = 5.5V (MCP6543 only).
Supply Current
(µA/Comparator)
1.6
VOUT
Output Voltage,
Chip Select Voltage (V),
30
1.5
Chip Select (CS) Voltage (V)
FIGURE 2-32:
Supply Current (shoot
through current) vs. Chip-Select (CS) Voltage at
VDD = 1.6V (MCP6543 only).
Supply Current
(µA/Comparator)
4
5
6
Time (ms)
1.E-04
100µ
0
3
FIGURE 2-34:
Chip-Select (CS) Step
Response (MCP6543 only).
FIGURE 2-31:
The MCP6541/2/3/4
comparators show no phase reversal.
Supply Current (A/comparator)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
200
180
160
140
120
100
80
60
40
20
0
6
3
0
-3
-6
-9
-12
-15
-18
-21
-24
VOUT
CS
VDD = 5.5V
Start-up IDD
Charging output
capacitance
0.0
0.5
1.0 1.5 2.0 2.5
Time (0.5 ms/div)
3.0
Output Voltage,
Chip Select Voltage (V)
Inverting Input, Output Voltage (V)
7
Chip Select, Output Voltage (V)
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
3.5
FIGURE 2-36:
Supply Current (charging
current) vs. Chip-Select (CS) pulse at
VDD = 5.5V (MCP6543 only).
 2003 Microchip Technology Inc.
MCP6541/2/3/4
The MCP6541/2/3/4 family of push-pull output comparators are fabricated on Microchip’s state-of-the-art
CMOS process. They are suitable for a wide range of
applications requiring very low power consumption.
3.1
Comparator Inputs
The MCP6541/2/3/4 comparator family uses CMOS
transistors at the input. They are designed to prevent
phase inversion when the input pins exceed the supply
voltages. Figure 2-31 shows an input voltage
exceeding both supplies with no resulting phase
inversion.
The input stage of this family of devices uses two
differential input stages in parallel: one operates at low
input voltages and the other at high input voltages. With
this topology, the input voltage is 0.3V above VDD and
0.3V below VSS. Therefore, the input offset voltage is
measured at both VSS - 0.3V and VDD + 0.3V to ensure
proper operation.
The maximum operating input voltages that can be
applied are VSS - 0.3V and VDD + 0.3V. Voltages on the
inputs that exceed this absolute maximum rating can
cause excessive current to flow and permanently
damage the device. In applications where the input pin
exceeds the specified range, external resistors can be
used to limit the current below ±2 mA, as shown in
Figure 3-1.
RIN
MCP654X
VOUT
VIN
( Maximum expected V IN ) – V DD
R IN ≥ ---------------------------------------------------------------------------------2 mA
V SS – ( Minimum expected V IN )
R IN ≥ -----------------------------------------------------------------------------2 mA
FIGURE 3-1:
An input resistor (RIN)
should be used to limit excessive input current if
either of the inputs exceeds the Absolute
Maximum specification.
3.2
Push-Pull Output
The push-pull output is designed to be compatible with
CMOS and TTL logic, while the output transistors are
configured to give rail-to-rail output performance. They
are driven with circuitry that minimizes any switching
current (shoot-through current from supply-to-supply)
when the output is transitioned from high-to-low, or from
low-to-high (see Figures 2-15, 2-17, 2-32 through 2-36
for more information).
 2003 Microchip Technology Inc.
3.3
MCP6543 Chip Select (CS)
The MCP6543 is a single comparator with chip select
(CS). When CS is pulled high, the total current
consumption drops to 20 pA (typ); 1 pA (typ) flows
through the CS pin, 1 pA (typ) flows through the output
pin and 18 pA (typ) flows through the VDD pin, as
shown in Figure 1-1. When this happens, the
comparator output is put into a high-impedance state.
By pulling CS low, the comparator is enabled. If the CS
pin is left floating, the comparator will not operate
properly. Figure 1-1 shows the output voltage and
supply current response to a CS pulse.
The internal CS circuitry is designed to minimize
glitches when cycling the CS pin. This helps conserve
power, which is especially important in batterypowered applications.
3.4
Externally-Set Hysteresis
Greater flexibility in selecting hysteresis (or input trip
points) is achieved by using external resistors.
Input offset voltage (VOS) is the center (average) of the
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (VHYST) is the difference between
the same trip points. Hysteresis reduces output
chattering when one input is slowly moving past the
other and thus reduces dynamic supply current. It also
helps in systems where it is best not to cycle between
states too frequently (e.g., air conditioner thermostatic
control). The MCP6541/2/3/4 family has internally-set
hysteresis that is small enough to maintain input offset
accuracy (<7 mV) and large enough to eliminate output
chattering caused by the comparator’s own input noise
voltage (200 µVp-p).
9
8
7
6
5
4
3
2
1
0
-1
-2
-3
30
VDD = 5.0V
VIN+ = +2.75V
25
20
VOUT
15
10
5
Hysteresis
0
-5
-10
-15
VIN–
-20
Input Voltage (10 mV/div)
APPLICATIONS INFORMATION
Output Voltage (V)
3.0
-25
-30
0
100
200
300
400
500
600
700
800
900
1000
Time (100 ms/div)
FIGURE 3-2:
The MCP6541/2/3/4
comparators’ internal hysteresis eliminates
output chatter caused by input noise voltage.
DS21696C-page 11
MCP6541/2/3/4
3.4.1
3.4.2
NON-INVERTING CIRCUIT
Figure 3-3 shows a non-inverting circuit for singlesupply applications using just two resistors. The
resulting hysteresis diagram is shown in Figure 3-4.
INVERTING CIRCUIT
Figure 3-5 shows an inverting circuit for single-supply
using three resistors. The resulting hysteresis diagram
is shown in Figure 3-6.
VDD
VDD
VIN
-
VREF
VDD
VOUT
MCP654X
+
R2
VIN
R1
VOUT
MCP654X
RF
RF
R3
FIGURE 3-3:
Non-inverting circuit with
hysteresis for single-supply.
VOUT
VDD
VOH
FIGURE 3-5:
Hysteresis.
Inverting Circuit With
VOUT
High-to-Low
VOL
VSS
VSS
VDD
VOH
Low-to-High
Low-to-High
VIN
VTHL VTLH
VDD
FIGURE 3-4:
Hysteresis Diagram for the
Non-Inverting Circuit.
The trip points for Figures 3-3 and 3-4 are:
EQUATION
R 

R 1 
V TLH = V REF  1 + ------1-  – V OL ------- 
RF 

R F 
R 

R1 
V THL = V REF  1 + ------1-  – V OH ------- 
RF 

R F 
High-to-Low
VIN
VOL
VSS
VSS
VTLH VTHL
FIGURE 3-6:
Inverting Circuit.
VDD
Hysteresis Diagram for the
In order to determine the trip voltages (VTHL and VTLH)
for the circuit shown in Figure 3-5, R2 and R3 can be
simplified to the Thevenin equivalent circuit with
respect to VDD, as shown in Figure 3-7.
VDD
-
VTLH = trip voltage from low to high
MCP654X
+
VSS
VTHL = trip voltage from high to low
VOUT
V23
R23
FIGURE 3-7:
DS21696C-page 12
RF
Thevenin Equivalent Circuit.
 2003 Microchip Technology Inc.
MCP6541/2/3/4
3.8
Where:
R2 R3
R 23 = -----------------R2 + R3
R3
V 23 = ------------------ × V DD
R2 + R3
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
EQUATION
RF
 R 23 
V THL = V OH  ----------------------- + V 23  ----------------------


R
+
R
R
 23
23 + R F
F
RF
 R 23 
V TLH = V OL  ----------------------- + V 23  ----------------------


R
+
R
R
 23
23 + R F
F
PCB Surface Leakage
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA, if current-to-flow. This is greater than the
MCP6541/2/3/4 family’s bias current at 25°C (1 pA,
typ).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 3-8.
VIN-
VIN+
VSS
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
Figure 2-19 and Figure 2-22 can be used to determine
typical values for VOH and VOL.
3.5
With this family of comparators, the power supply pin
(VDD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge rate performance.
3.6
FIGURE 3-8:
Example Guard Ring Layout
for Inverting Circuit.
1.
Capacitive Loads
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-27).
The supply current increases with increasing toggle
frequency (Figure 2-30), especially with higher
capacitive loads.
3.7
Guard Ring
Bypass Capacitors
Battery Life
In order to maximize battery life in portable
applications, use large resistors and small capacitive
loads. Also, avoid toggling the output more than
necessary and do not use chip select (CS) to conserve
power for short periods of time. Capacitive loads will
draw additional power at start-up.
 2003 Microchip Technology Inc.
2.
Inverting Configuration (Figures 3-5 and 3-8):
a. Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the
comparator (e.g., VDD/2 or ground).
b. Connect the inverting pin (VIN–) to the input
pad without touching the guard ring.
Non-inverting Configuration (Figure 3-3):
a. Connect the non-inverting pin (VIN+) to the
input pad without touching the guard ring.
b. Connect the guard ring to the inverting input
pin (VIN–).
DS21696C-page 13
MCP6541/2/3/4
3.9
Typical Applications
3.9.1
3.9.3
PRECISE COMPARATOR
Some applications require higher DC precision. An
easy way to solve this problem is to use an amplifier
(such as the MCP6041) to gain-up the input signal
before it reaches the comparator. Figure 3-9 shows an
example of this approach.
BISTABLE MULTI-VIBRATOR
A simple bistable multi-vibrator design is shown in
Figure 3-11. VREF needs to be between the power
supplies (VSS = GND and VDD) to achieve oscillation.
The output duty cycle changes with VREF.
R1
R2
VREF
VDD
VDD
VREF
MCP6541
MCP6041
VOUT
VDD
VIN
R1
R2
MCP654X
VREF
FIGURE 3-9:
Comparator.
3.9.2
C1
VOUT
FIGURE 3-11:
R3
Bistable Multi-vibrator.
Precise Inverting
WINDOWED COMPARATOR
Figure 3-10 shows one approach to designing a windowed comparator. The AND gate produces a logic ‘1’
when the input voltage is between VRB and VRT (where
VRT > VRB).
VRT
VIN
VRB
FIGURE 3-10:
DS21696C-page 14
1/2
MCP6542
1/2
MCP6542
Windowed Comparator.
 2003 Microchip Technology Inc.
MCP6541/2/3/4
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
5-Lead SC-70 (MCP6541)
Example:
XNN
YWW
A25
307
5-Lead SOT-23 (MCP6541)
Example:
XXNN
AB37
8-Lead PDIP (300 mil)
Example:
XXXXXXXX
XXXXXNNN
YYWW
MCP6541
I/P256
0307
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
8-Lead MSOP
*
MCP6542
I/SN0307
256
Example:
XXXXXX
6543I
YWWNNN
307256
Legend:
Note:
Example:
XX...X
YY
WW
NNN
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.
 2003 Microchip Technology Inc.
DS21696C-page 15
MCP6541/2/3/4
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6544)
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
14-Lead SOIC (150 mil) (MCP6544)
Example:
MCP6544-I/P
0307256
Example:
MCP6544ISL
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
14-Lead TSSOP (MCP6544)
0307256
Example:
XXXXXXXX
YYWW
MCP6544I
0307
NNN
256
DS21696C-page 16
 2003 Microchip Technology Inc.
MCP6541/2/3/4
5-Lead Plastic Package (LT) (SC-70)
E
E1
D
p
B
n
1
Q1
A2
c
A
A1
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
Top of Molded Pkg to Lead Shoulder
Lead Thickness
Lead Width
A
A2
A1
E
E1
D
L
Q1
c
B
MIN
.031
.031
.000
.071
.045
.071
.004
.004
.004
.006
INCHES
NOM
5
.026 (BSC)
MAX
.043
.039
.004
.094
.053
.087
.012
.016
.007
.012
MILLIMETERS*
NOM
5
0.65 (BSC)
0.80
0.80
0.00
1.80
1.15
1.80
0.10
0.10
0.10
0.15
MIN
MAX
1.10
1.00
0.10
2.40
1.35
2.20
0.30
0.40
0.18
0.30
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .005" (0.127mm) per side.
JEITA (EIAJ) Standard: SC-70
Drawing No. C04-061
 2003 Microchip Technology Inc.
DS21696C-page 17
MCP6541/2/3/4
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
E
E1
p
B
p1
n
D
1
α
c
A
φ
L
β
Units
Dimension Limits
n
p
Number of Pins
Pitch
Outside lead pitch (basic)
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
MIN
p1
A
A2
A1
E
E1
D
L
φ
c
B
α
β
.035
.035
.000
.102
.059
.110
.014
0
.004
.014
0
0
A2
A1
INCHES*
NOM
5
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
.006
.017
5
5
MAX
.057
.051
.006
.118
.069
.122
.022
10
.008
.020
10
10
MILLIMETERS
NOM
5
0.95
1.90
0.90
1.18
0.90
1.10
0.00
0.08
2.60
2.80
1.50
1.63
2.80
2.95
0.35
0.45
0
5
0.09
0.15
0.35
0.43
0
5
0
5
MIN
MAX
1.45
1.30
0.15
3.00
1.75
3.10
0.55
10
0.20
0.50
10
10
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
DS21696C-page 18
 2003 Microchip Technology Inc.
MCP6541/2/3/4
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
 2003 Microchip Technology Inc.
DS21696C-page 19
MCP6541/2/3/4
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21696C-page 20
 2003 Microchip Technology Inc.
MCP6541/2/3/4
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
n
p
MIN
INCHES
NOM
MAX
MILLIMETERS*
NOM
8
0.65 BSC
0.75
0.85
0.00
4.90 BSC
3.00 BSC
3.00 BSC
0.40
0.60
0.95 REF
0°
0.08
0.22
5°
5°
-
MIN
8
Number of Pins
.026 BSC
Pitch
A
.043
Overall Height
A2
.030
.033
.037
Molded Package Thickness
A1
.000
.006
Standoff
E
Overall Width
.193 TYP.
E1
.118 BSC
Molded Package Width
D
.118 BSC
Overall Length
L
.016
.024
.031
Foot Length
Footprint (Reference)
F
.037 REF
φ
Foot Angle
0°
8°
c
Lead Thickness
.003
.006
.009
B
.009
.012
.016
Lead Width
α
5°
15°
Mold Draft Angle Top
β
5°
15°
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
MAX
1.10
0.95
0.15
0.80
8°
0.23
0.40
15°
15°
JEDEC Equivalent: MO-187
Drawing No. C04-111
 2003 Microchip Technology Inc.
DS21696C-page 21
MCP6541/2/3/4
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
B1
β
eB
p
B
Units
Dimension Limits
n
p
MIN
INCHES*
NOM
14
.100
.155
.130
MAX
MILLIMETERS
NOM
14
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
18.80
19.05
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
Number of Pins
Pitch
Top to Seating Plane
A
.140
.170
Molded Package Thickness
A2
.115
.145
Base to Seating Plane
.015
A1
Shoulder to Shoulder Width
E
.300
.313
.325
Molded Package Width
E1
.240
.250
.260
Overall Length
D
.740
.750
.760
Tip to Seating Plane
L
.125
.130
.135
c
Lead Thickness
.008
.012
.015
Upper Lead Width
B1
.045
.058
.070
Lower Lead Width
B
.014
.018
.022
eB
Overall Row Spacing
§
.310
.370
.430
α
Mold Draft Angle Top
5
10
15
β
Mold Draft Angle Bottom
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005
DS21696C-page 22
MAX
4.32
3.68
8.26
6.60
19.30
3.43
0.38
1.78
0.56
10.92
15
15
 2003 Microchip Technology Inc.
MCP6541/2/3/4
14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
A1
L
β
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.150
.337
.010
.016
0
.008
.014
0
0
INCHES*
NOM
14
.050
.061
.056
.007
.236
.154
.342
.015
.033
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.347
.020
.050
8
.010
.020
15
15
MILLIMETERS
NOM
14
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
5.99
3.81
3.90
8.56
8.69
0.25
0.38
0.41
0.84
0
4
0.20
0.23
0.36
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
8.81
0.51
1.27
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-065
 2003 Microchip Technology Inc.
DS21696C-page 23
MCP6541/2/3/4
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
β
A1
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
φ
c
B1
α
β
MIN
.033
.002
.246
.169
.193
.020
0
.004
.007
0
0
INCHES
NOM
14
.026
.035
.004
.251
.173
.197
.024
4
.006
.010
5
5
A2
MAX
.043
.037
.006
.256
.177
.201
.028
8
.008
.012
10
10
MILLIMETERS*
NOM
MAX
14
0.65
1.10
0.85
0.90
0.95
0.05
0.10
0.15
6.25
6.38
6.50
4.30
4.40
4.50
4.90
5.00
5.10
0.50
0.60
0.70
0
4
8
0.09
0.15
0.20
0.19
0.25
0.30
0
5
10
0
5
10
MIN
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
DS21696C-page 24
 2003 Microchip Technology Inc.
MCP6541/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
-X
/XX
Device
Temperature
Range
Package
Examples:
a)
b)
Device:
MCP6541: Single Comparator
MCP6541T: Single Comparator (Tape and Reel)
(SC-70, SOT-23, SOIC, MSOP)
MCP6541RT: Single Comparator (Rotated - Tape and
Reel) (SOT-23 only)
MCP6542: Dual Comparator
MCP6542T: Dual Comparator
(Tape and Reel for SOIC and MSOP)
MCP6543: Single Comparator with CS
MCP6543T: Single Comparator with CS
(Tape and Reel for SOIC and MSOP)
MCP6544: Quad Comparator
MCP6544T: Quad Comparator
(Tape and Reel for SOIC and TSSOP)
Temperature Range:
I
= -40°C to +85°C
Package:
LT
OT
MS
P
SN
SL
ST
=
=
=
=
=
=
=
Plastic Package (SC-70), 5-lead
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic MSOP, 8-lead
Plastic DIP (300 mil Body), 8-lead, 14-lead
Plastic SOIC (150 mil Body), 8-lead
Plastic SOIC (150 mil Body), 14-lead (MCP6544)
Plastic TSSOP (4.4mm Body), 14-lead (MCP6544)
c)
d)
a)
b)
c)
a)
b)
c)
MCP6541T-I/LT:
Tape and Reel,
Industrial Temperature,
5LD SC-70.
MCP6541T-I/OT: Tape and Reel,
Industrial Temperature,
5LD SOT-23.
MCP6541-I/P:
Industrial Temperature,
8LD PDIP.
MCP6541RT-I/OT: Tape and Reel,
Industrial Temperature,
5LD SOT23.
MCP6542-I/MS:
Industrial Temperature,
8LD MSOP.
MCP6542T-I/MS: Tape and Reel,
Industrial Temperature,
8LD MSOP.
MCP6542-I/P:
Industrial Temperature,
8LD PDIP.
MCP6543-I/SN:
Industrial Temperature,
8LD SOIC.
MCP6543T-I/SN: Tape and Reel,
Industrial Temperature,
8LD SOIC.
MCP6543-I/P:
Industrial Temperature,
8LD PDIP.
a)
MCP6544T-I/SL:
b)
MCP6544T-I/SL:
c)
MCP6544-I/P:
Tape and Reel,
Industrial Temperature,
14LD SOIC.
Tape and Reel,
Industrial Temperature,
14LD SOIC.
Industrial Temperature,
14LD PDIP.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2003 Microchip Technology Inc.
DS21696C-page 25
MCP6541/2/3/4
NOTES:
DS21696C-page 26
 2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and
PowerSmart are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL
and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Accuron, Application Maestro, dsPICDEM, dsPICDEM.net,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, InCircuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICC, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
DS21696C-page 27
 2003 Microchip Technology Inc.
M
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
Corporate Office
Australia
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Unit 915
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Beijing, 100027, No. China
Tel: 86-10-85282100
Fax: 86-10-85282104
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
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Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
2767 S. Albright Road
Kokomo, IN 46902
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
China - Beijing
China - Chengdu
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200
Fax: 86-28-86766599
China - Fuzhou
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506
Fax: 86-591-7503521
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza
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Tel: 852-2401-1200
Fax: 852-2401-3431
China - Shanghai
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
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Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
China - Shenzhen
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888
Fax: 949-263-1338
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380
Fax: 86-755-8295-1393
Phoenix
China - Shunde
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966
Fax: 480-792-4338
Room 401, Hongjian Building
No. 2 Fengxiangnan Road, Ronggui Town
Shunde City, Guangdong 528303, China
Tel: 86-765-8395507 Fax: 86-765-8395571
San Jose
China - Qingdao
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950
Fax: 408-436-7955
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
Toronto
India
6285 Northam Drive, Suite 108
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Tel: 905-673-0699
Fax: 905-673-6509
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
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Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
DS21696C-page 28
Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
Singapore
200 Middle Road
#07-02 Prime Centre
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Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Kaohsiung Branch
30F - 1 No. 8
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Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Austria
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Regus Business Centre
Lautrup hoj 1-3
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Tel: 45-4420-9895 Fax: 45-4420-9910
France
Parc d’Activite du Moulin de Massy
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Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy
Via Quasimodo, 12
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Milan, Italy
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: 31-416-690399
Fax: 31-416-690340
United Kingdom
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Winnersh Triangle
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07/28/03
 2003 Microchip Technology Inc.
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Datasheets for electronics components.