µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 D D D D D D D D D Supply Current . . . 23 µA/Channel Gain-Bandwidth Product . . . 220 kHz Output Drive Capability . . . ±10 mA Input Offset Voltage . . . 20 µV (typ) VDD Range . . . 2.7 V to 6 V Power Supply Rejection Ratio . . . 106 dB Ultralow-Power Shutdown Mode IDD . . . 16 nA/ch Rail-To-Rail Input/Output (RRIO) Ultrasmall Packaging − 5 or 6 Pin SOT-23 (TLV2450/1) − 8 or 10 Pin MSOP (TLV2452/3) Operational Amplifier − + description The TLV245x is a family of rail-to-rail input/output operational amplifiers that sets a new performance point for supply current and ac performance. These devices consume a mere 23 µA/channel while offering 220 kHz of gain-bandwidth product, much higher than competitive devices with similar supply current levels. Along with increased ac performance, the amplifier provides high output drive capability, solving a major shortcoming of older micropower rail-to-rail input/output operational amplifiers. The TLV245x can swing to within 250 mV of each supply rail while driving a 2.5-mA load. Both the inputs and outputs swing rail-to-rail for increased dynamic range in low-voltage applications. This performance makes the TLV245x family ideal for portable medical equipment, patient monitoring systems, and data acquisition circuits. FAMILY PACKAGE TABLE PACKAGE TYPES NUMBER OF CHANNELS PDIP SOIC SOT-23 TSSOP MSOP TLV2450 1 8 8 6 — — Yes TLV2451 1 8 8 5 — — — TLV2452 2 8 8 — — 8 — TLV2453 2 14 14 — — 10 Yes TLV2454 4 14 14 — 14 — — TLV2455 4 16 16 — 16 — Yes DEVICE SHUTDOWN UNIVERSAL EVM BOARD Refer to the EVM Selection Guide (Lit# SLOU060) A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS† DEVICE VDD (V) BW (MHz) SLEW RATE (V/µs) IDD (per channel) (µA) RAIL-TO-RAIL TLV245X 2.7 − 6.0 0.22 TLV247X 2.7 − 6.0 2.8 0.11 23 I/O 1.5 600 TLV246X 2.7 − 6.0 I/O 6.4 1.6 550 I/O TLV277X 2.5 − 6.0 5.1 10.5 1000 O † All specifications measured at 5 V. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 1998−2005, Texas Instruments Incorporated !"#$%&'(!$" !) *+%%,"( ') $# -+./!*'(!$" 0'(,1 %$0+*() *$"#$%& ($ )-,*!#!*'(!$") -,% (2, (,%&) $# ,') ")(%+&,"() )('"0'%0 3'%%'"(41 %$0+*(!$" -%$*,))!"5 0$,) "$( ",*,))'%!/4 !"*/+0, (,)(!"5 $# '// -'%'&,(,%)1 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 1 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 description (continued) Three members of the family (TLV2450/3/5) offer a shutdown terminal for conserving battery life in portable applications. During shutdown, the outputs are placed in a high-impedance state and the amplifier consumes only 16 nA/channel. The family is fully specified at 3 V and 5 V across an expanded industrial temperature range (−40°C to 125°C). The singles and duals are available in the SOT23 and MSOP packages, while the quads are available in TSSOP. The TLV2450 offers an amplifier with shutdown functionality all in a 6-pin SOT23 package, making it perfect for high density circuits. TLV2450 and TLV2451 AVAILABLE OPTIONS PACKAGED DEVICES TA SOT-23 SMALL OUTLINE (D)† 0°C to 70°C −40°C to 125°C (DBV) SYMBOL PLASTIC DIP (P) TLV2450CD TLV2451CD TLV2450CDBV TLV2451CDBV VAQC VARC TLV2450CP TLV2451CP TLV2450ID TLV2451ID TLV2450IDBV TLV2451IDBV VAQI VARI TLV2450IP TLV2451IP TLV2450AID TLV2451AID — — — — TLV2450AIP TLV2451AIP † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2450CDR). TLV2452 and TLV2453 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C −40°C to 125°C SMALL OUTLINE (D)† SYMBOL‡ PLASTIC DIP (N) PLASTIC DIP (P) (DGK)† SYMBOL‡ (DGS)† TLV2452CD TLV2453CD TLV2452CDGK — xxTIABI — — TLV2453CDGS — xxTIABK — TLV2453CN TLV2452CP — TLV2452ID TLV2453ID TLV2452IDGK — xxTIABJ — — TLV2453IDGS — xxTIABL — TLV2453IN TLV2452IP — TLV2452AID TLV2453AID — — — — — — — — — TLV2453AIN TLV2452AIP — MSOP † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2452CDR). ‡ xx represents the device date code. TLV2454 and TLV2455 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C −40°C to 125°C SMALL OUTLINE (D)† PLASTIC DIP (N) TSSOP (PW)† TLV2454CD TLV2455CD TLV2454CN TLV2455CN TLV2454CPW TLV2455CPW TLV2454ID TLV2455ID TLV2454IN TLV2455IN TLV2454IPW TLV2455IPW TLV2454AID TLV2455AID TLV2454AIN TLV2455AIN TLV2454AIPW TLV2455AIPW † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2454CDR). NOTE: 2 For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or refer to our web site at www.ti.com. WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TLV245x PACKAGE PINOUTS(1) TLV2450 D OR P PACKAGE (TOP VIEW) TLV2450 DBV PACKAGE (TOP VIEW) OUT 1 6 VDD+ GND 2 5 SHDN IN+ 3 4 IN − 1OUT 1IN − 1IN+ GND NC 1SHDN NC 1 8 2 7 3 6 4 5 1 8 2 7 3 6 4 5 SHDN VDD+ OUT NC OUT 1 GND 2 IN+ 3 TLV2452 D, DGK, OR P PACKAGE (TOP VIEW) TLV2451 D OR P PACKAGE (TOP VIEW) NC IN − IN + GND NC IN − IN + GND TLV2451 DBV PACKAGE (TOP VIEW) NC VDD+ OUT NC 1OUT 1IN − 1IN + GND 1 8 2 7 3 6 4 5 5 VDD+ 4 IN − TLV2453 DGS PACKAGE (TOP VIEW) VDD+ 2OUT 2IN − 2IN+ 1OUT 1IN − 1IN+ GND 1SHDN 1 2 3 4 5 10 9 8 7 6 VDD+ 2OUT 2IN − 2IN+ 2SHDN TLV2453 D OR N PACKAGE TLV2454 D, N, OR PW PACKAGE TLV2455 D, N, OR PW PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VDD+ 2OUT 2IN − 2IN+ NC 2SHDN NC 1OUT 1IN − 1IN+ VDD+ 2IN+ 2IN − 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 1OUT 1IN − 1IN+ VDD+ 2IN+ 2IN − 2OUT 1/2SHDN 4OUT 4IN − 4IN+ GND 3IN+ 3IN − 3OUT 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 4OUT 4IN − 4IN+ GND 3IN + 3IN− 3OUT 3/4SHDN NC − No internal connection (1) SOT−23 may or may not be indicated TYPICAL PIN 1 INDICATORS Pin 1 Printed or Molded Dot Pin 1 Pin 1 Bevel Edges Stripe Pin 1 Molded ”U” Shape WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VDD Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE: All voltage values, except differential voltages, are with respect to GND. DISSIPATION RATING TABLE PACKAGE θJC (°C/W) θJA (°C/W) TA ≤ 25°C POWER RATING D (8) 38.3 176 710 mW D (14) 26.9 122.3 1022 mW D (16) 25.7 114.7 1090 mW DBV (5) 55 324.1 385 mW DBV (6) 55 294.3 425 mW DGK (8) 54.2 259.9 481 mW DGS (10) 54.1 257.7 485 mW N (14, 16) 32 78 1600 mW P (8) 41 104 1200 mW PW (14) 29.3 173.6 720 mW PW (16) 28.7 161.4 774 mW recommended operating conditions Single supply Supply voltage, VDD Split supply Common-mode input voltage range, VICR C-suffix Operating free-air temperature, TA I-suffix VIH Shutdown on/off voltage level‡ VIL 6 ±1.35 ±3 V 0 VDD 70 V 0 −40 125 VDD = 5V 0.8 VDD = 3V 0.5 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • MAX 2.7 2 ‡ Relative to voltage on the GND terminal of the device. 4 MIN UNIT °C V V µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 electrical characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV245x VIO TA† 25°C MIN Input offset voltage 25°C Full range VDD = ±1.5 V VIC = 0, VO = 0, RS = 50 Ω Input offset current IIB Input bias current 2.85 High-level output voltage VIC = 1.5 V, A IOH = − 500 µA 25°C VOH Full range 2.83 VOL Low-level output voltage VIC = 1.5 V, IOL = 500 µA A Full range 0.3 Full range VO = 0.5 V from rail Large-signal differential voltage amplification ri(d) Differential input resistance CIC Common-mode input capacitance f = 10 kHz zo Closed-loop output impedance f = 10 kHz, AV = 10 CMRR Common-mode rejection ratio VIC = 0 to 3 V, RS = 50 Ω TLV245xC VO(PP) = 1 V, RL = 10 kΩ VDD = 2.7 V to 6 V, No load VDD = 3 V to 5 V, No load 25°C VIC = VDD /2, VIC = VDD /2, Full range 3 25°C 2 Full range 1 IDD(SHDN) Supply current (per channel) Supply current in shutdown mode (TLV2450, TLV2453, TLV2455) (per channel) VO = 1.5 V, No load 96 Full range 91 V 12 mA 7 mA 110 dB 25°C 109 Ω 25°C 4.5 pF 25°C 80 Ω 80 dB 25°C 70 Full range 66 25°C 76 Full range 74 25°C 88 Full range 84 dB 89 dB 106 23 35 TLV245xC Full range 40 TLV245xI Full range 45 TLV245xC Full range 70 TLV245xI Full range 80 25°C SHDN = −VDD 0.16 ±4 25°C 25°C IDD V 0.2 4 nA 2.95 0.09 25°C nA 5 7 25°C AVD kSVR 0.9 Full range Sinking 4.5 5.5 25°C Short-circuit output current µV V µV/°C V/°C 0.3 25°C Sourcing 1000 UNIT 1300 IIO Supply voltage rejection ratio ((∆V VDD //∆V VIO) 1500 300 αVIO Output current 300 2000 Temperature coefficient of input offset voltage IO MAX Full range TLV245xA IOS TYP 12 µA 65 nA † Full range is 0°C to 70°C for C suffix and − 40°C to 125°C for I suffix. WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 operating characteristics at specified free-air temperature, VDD = 3 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage In Equivalent input noise current TEST CONDITIONS VO(PP) = 0.8 V, RL = 10 kΩ Total harmonic distortion plus noise t(on) t(off) Amplifier turnon time φm TYP 0.05 0.11 Full range 0.02 25°C 49 25°C 51 25°C VO(PP) = 1.5 V, RL = 10 kΩ, f = 1 kHz AV = 1 AV = 10 MAX UNIT V/ s V/µs f = 100 Hz 3.5 nV/√Hz pA /√Hz 0.04% 25°C 25 C AV = 100 0.3% 1.5% µs 59 Amplifier turnoff time AV = 5, RL = OPEN, Measured at 50% point 25°C 25°C 836 ns Gain-bandwidth product f = 10 kHz, RL = 10 kΩ 25°C 200 kHz V(STEP)PP = 2 V, AV = −1, CL = 10 pF, RL = 10 kΩ 0.1% V(STEP)PP = 2 V, AV = −1, CL = 56 pF, RL = 10 kΩ 0.1% 26 0.01% 31 Phase margin RL = 10 kΩ, CL = 1000 pF 25°C 56° Gain margin RL = 10 kΩ, CL = 1000 pF 25°C 7 Settling time 31 µss 25°C WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 26 0.01% † Full range is 0°C to 70°C for C suffix and − 40°C to 125°C for I suffix. 6 MIN f = 1 kHz f = 1 kHz THD + N ts CL = 150 pF, TA† 25°C dB µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLV245x VIO TA† 25°C MIN Input offset voltage 25°C Full range VDD = ±2.5 V VIC = 0, VO = 0, RS = 50 Ω Input offset current IIB Input bias current 4.87 High-level output voltage VIC = 2.5 V, A IOH = − 500 µA 25°C VOH Full range 4.85 VOL Low-level output voltage VIC = 2.5 V, IOL = 500 µA A Full range 0.3 Full range Output current VO = 0.5 V from rail AVD Large-signal differential voltage amplification ri(d) Differential input resistance CIC Common-mode input capacitance f = 10 kHz zo Closed-loop output impedance f = 10 kHz, VO(PP) = 3 V, AV = 10 VIC = 0 to 5 V, RS = 50 Ω Common-mode rejection ratio Supply voltage rejection ratio ((∆V VDD //∆V VIO) Full range 18 25°C 12 Full range 10 TLV245xC VDD = 2.7 V to 6 V, No load VIC = VDD /2, VDD = 3 V to 5 V, No load VIC = VDD /2, IDD(SHDN) Supply current (per channel) VO = 2.5 V, No load Supply current in shutdown mode (TLV2450, TLV2453, TLV2455) (per channel) 25°C 96 Full range 91 V 32 mA 18 mA 103 dB 25°C 109 Ω 25°C 4.5 pF 45 Ω 25°C 25°C 70 Full range 68 25°C 76 Full range 74 25°C 88 Full range 84 80 dB 89 dB 106 23 42 TLV245xC Full range 44 TLV245xI Full range 46 25°C SHDN = −VDD 0.15 ±10 25°C RL = 10 kΩ V 0.16 20 nA 4.97 0.07 25°C nA 5 7 25°C 25°C IDD 0.5 Full range Sinking 4.5 5.5 25°C Short-circuit output current µV V µV/°C V/°C 0.3 25°C Sourcing 1000 UNIT 1300 IIO kSVR 1500 300 αVIO CMRR 300 2000 Temperature coefficient of input offset voltage IO MAX Full range TLV245xA IOS TYP 16 µA 70 TLV245xC Full range 70 TLV245xI Full range 80 nA † Full range is 0°C to 70°C for C suffix and − 40°C to 125°C for I suffix. WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 7 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 operating characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted) PARAMETER SR Slew rate at unity gain Vn Equivalent input noise voltage In Equivalent input noise current TEST CONDITIONS VO(PP) = 2 V, RL = 10 kΩ Total harmonic distortion plus noise t(on) t(off) Amplifier turnon time φm TYP 0.05 0.11 Full range 0.02 25°C 49 25°C 52 25°C AV = 1 AV = 10 VO(PP) = 3 V, RL = 10 kΩ, f = 1 kHz MAX UNIT V/ s V/µs f = 100 Hz 3.5 nV/√Hz pA /√Hz 0.02% 25°C 25 C AV = 100 0.18% 0.9% µs 59 Amplifier turnoff time AV = 5, RL = OPEN, Measured at 50% point 25°C 25°C 836 ns Gain-bandwidth product f = 10 kHz, RL = 10 kΩ 25°C 220 kHz V(STEP)PP = 2 V, AV = −1, CL = 10 pF, RL = 10 kΩ 0.1% V(STEP)PP = 2 V, AV = −1, CL = 56 pF, RL = 10 kΩ 0.1% 25 0.01% 30 Phase margin RL = 10 kΩ, CL = 1000 pF 25°C 56° Gain margin RL = 10 kΩ, CL = 1000 pF 25°C 7 Settling time 30 µss 25°C WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 24 0.01% † Full range is 0°C to 70°C for C suffix and − 40°C to 125°C for I suffix. 8 MIN f = 1 kHz f = 1 kHz THD + N ts CL = 150 pF, TA† 25°C dB µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage vs Common-mode input voltage 1, 2 IIO Input offset current vs Common-mode input voltage vs Free-air temperature 3, 4 7, 8 IIB Input bias current vs Common-mode input voltage vs Free-air temperature 5, 6 7, 8 AVD Differential voltage amplification vs Frequency 9, 10 Phase vs Frequency 9, 10 VOL VOH Low-level output voltage vs Low-level output current 11, 13 High-level output voltage vs High-level output current 12, 14 Zo CMRR Output impedance vs Frequency 15, 16 Common-mode rejection ratio vs Frequency 17 PSRR Power supply rejection ratio vs Frequency 18 IDD IDD Supply current vs Supply voltage 19 Supply current vs Free-air temperature 20 Vn THD + N Equivalent input noise voltage vs Frequency 21 Total harmonic distortion plus noise vs Frequency 22, 23 φm Phase margin vs Load capacitance 24 Gain-bandwidth product vs Supply voltage 25 SR Slew rate vs Supply voltage vs Free-air temperature 26 27 VO(PP) Maximum peak-to-peak output voltage vs Frequency 28 Crosstalk vs Frequency 29, 30 Small-signal follower pulse response vs Time 31, 33 Large-signal follower pulse response vs Time 32, 34 Shutdown on supply current vs Time 35 Shutdown off supply current vs Time 36 Shutdown supply current vs Free-air temperature Shutdown supply current vs Time 38 − 41 Shutdown pulse vs Time 38 − 41 Shutdown off pulse response vs Time 42, 43 Shutdown on pulse response vs Time 44, 45 Shutdown reverse isolation vs Frequency 46 Shutdown forward isolation vs Frequency 47 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 37 9 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 200 VDD = 3 V TA = 25°C 100 50 0 −50 −100 −150 −200 −0.5 VDD = 5 V TA = 25°C 80 VIO − Input Offset Voltage − µV VIO − Input Offset Voltage − µV 150 100 60 40 20 0 −20 −40 −60 −80 0 0.5 1 1.5 2 2.5 3 VIC − Common-Mode Input Voltage − V −100 −0.5 3.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIC − Common-Mode Input Voltage − V Figure 1 Figure 2 INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE 60 20 VDD = 3 V TA = 25°C 10 I IO − Input Offset Current − pA I IO − Input Offset Current − pA 40 20 0 −20 VDD = 5 V TA = 25°C 0 −10 −20 −30 −40 −40 −50 −60 0 0.5 1 0 0.5 1 1.5 −60 0 0.5 1 Figure 3 10 1.5 2 2.5 3 3.5 4 4.5 VIC − Common-Mode Input Voltage − V VIC − Common-Mode Input Voltage − V Figure 4 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE 3 3 2 I IB − Input Bias Current − nA IIB − Input Bias Current − nA 2 VDD = 3 V TA = 25°C 1 0 −1 −2 1 0 −1 −2 −3 −3 −4 −0.5 VDD = 5 V TA = 25°C 0 0.5 1 2 1.5 2.5 3 −4 −0.5 0 3.5 VIC − Common-Mode Input Voltage − V 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIC − Common-Mode Input Voltage − V Figure 6 Figure 5 1.5 1.4 1.3 INPUT OFFSET CURRENT AND INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE VDD = 3 V 1.2 1.1 1 IIB 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 −0.1 −55 IIO 85 −35 −15 5 25 45 65 TA − Free-Air Temperature − °C 105 125 I IB / I IO − Input Bias and Input Offset Currents − nA I IB / I IO − Input Bias and Input Offset Currents − nA INPUT OFFSET CURRENT AND INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE 0.9 0.8 VDD = 5 V 0.7 0.6 IIB 0.5 0.4 0.3 0.2 IIO 0.1 0 −0.1 −55 85 −35 −15 5 25 45 65 TA − Free-Air Temperature − °C 105 125 Figure 8 Figure 7 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 11 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS 120 VDD = ±3 V TA = 25°C 90 120 60 60 Gain 30 0 0 Phase − ° A VD − Differential Voltage Amplification − dB DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE vs FREQUENCY −60 Phase −120 −30 −60 100 1k 10k 100k f − Frequency − Hz −180 1M Figure 9 120 VDD = ±5 VDC TA = 25°C 90 120 60 60 Gain 30 0 0 −60 Phase −30 −60 100 1k 10k 100k f − Frequency − Hz Figure 10 12 Phase − ° A VD − Differential Voltage Amplification − dB DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE vs FREQUENCY WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • −120 −180 1M µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 3 3 VDD = 3 V VOH − High-Level Output Voltage − V VOL− Low-Level Output Voltage − V VDD = 3 V 2.5 2 TA = 25°C 1.5 TA = 85°C TA = 125°C 1 TA = −40°C 0.5 2.5 TA = −40°C 2 TA = 25°C 1.5 TA = 85°C 1 TA = 125°C 0.5 0 0 0 1 2 3 4 5 6 7 8 9 0 10 2.5 5 7.5 12.5 15 Figure 12 Figure 11 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 5 5 VDD = 5 V VDD = 5 V 4.5 4.5 4 VOH − High-Level Output Voltage − V VOL − Low-Level Output Voltage − V 10 IOH − High-Level Output Current − mA IOL − Low-Level Output Current − mA TA = 25°C 3.5 TA = 85°C 3 2.5 TA = 125°C 2 1.5 TA = −40°C 1 0.5 TA = −40°C 4 3.5 3 TA = 125°C TA = 85°C 2.5 2 TA = 25°C 1.5 1 0.5 0 0 0 5 10 15 20 25 0 IOL − Low-Level Output Current − mA 5 10 15 20 25 30 35 IOH − High-Level Output Current − mA Figure 13 40 Figure 14 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 13 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS OUTPUT IMPEDANCE vs FREQUENCY OUTPUT IMPEDANCE vs FREQUENCY 10k 10k VDD = 5 V TA = 25°C VDD = 3 V TA = 25°C Zo − Output Impedance − Ω Zo − Output Impedance − Ω 1k 1k AV = 100 100 AV = 10 AV = 1 10 AV = 100 100 10 AV = 10 1 1 100 AV = 1 0.1 1k 10k 100k 1M 100 1k f − Frequency − Hz 10k f − Frequency − Hz Figure 15 Figure 16 COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR − Common-Mode Rejection Ratio − dB 120 VDD = 3 V or 5 V TA = 25°C 100 80 60 40 20 0 10 100 1k 10k 100k f − Frequency − Hz Figure 17 14 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 1M 100k 1M µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS POWER SUPPLY REJECTION RATIO vs FREQUENCY SUPPLY CURRENT vs SUPPLY VOLTAGE 40 90 VDD = 3 V or 5 V TA = 25°C 80 35 70 PSRR + 60 50 40 PSRR − 30 20 10 0 AV = 1 SHDN = VDD Per Channel 30 TA = 25°C 25 TA = −40°C 20 15 10 5 10 100 1k 10k 100k 0 2.5 1M 3 f − Frequency − Hz 3.5 5 5.5 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 30 Vn − Equivalent Input Noise Voltage − nV/ Hz 100 VDD = 5 V 20 VDD = 3 V 15 10 VI = VDD /2 SHDN = VDD per channel 5 0 −55 4.5 Figure 19 SUPPLY CURRENT vs FREE-AIR TEMPERATURE 25 4 VDD − Supply Voltage − V Figure 18 I DD − Supply Current − µ A TA = 125°C TA = 85°C I DD − Supply Current − µ A PSRR − Power Supply Rejection Ratio − dB 100 25 45 65 85 −35 −15 5 TA − Free-Air Temperature − °C 10 VDD = 3 V or 5 V TA = 25°C 1 10 105 125 Figure 20 100 1k 10k f − Frequency − Hz 100k Figure 21 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 15 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY 100% VDD = 3 V VO(PP) = 1.5 V RL = 10 kΩ TA = 25°C 10% THD+N − Total harmonic Distortion + Noise THD+N − Total harmonic Distortion + Noise 100% AV = 10 AV = 100 1% 0.1% AV = 1 0.01% 0.001% 10 100 1k 10k VDD = 5 V VO(PP) = 3 V RL = 10 kΩ TA = 25°C 10% 1% AV = 100 0.1% AV = 10 0.010% AV = 1 0.001% 10 100k 100 f − Frequency − MHz Figure 22 GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 100 ° 280 270 Gain-Bandwidth Product − kHz RNULL = 500Ω φ m − Phase Margin 80 ° 70 ° RNULL = 200Ω 60 ° RNULL = 100Ω 50 ° RNULL = 50Ω 40 ° 30 ° RNULL = 10Ω 20 ° 10 ° 0° 100 VDD = 5 V RL = 10 kΩ TA = 25°C RNULL = 0Ω 1k 10k 260 f = 1 kHz RL = 10 kΩ TA = 25°C 250 240 230 220 210 200 190 100k 180 2.5 3 CL − Load Capacitance − pF Figure 24 16 100k Figure 23 PHASE MARGIN vs LOAD CAPACITANCE 90 ° 1k 10k f − Frequency − Hz 3.5 4 4.5 VDD − Supply Voltage − V Figure 25 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 5.5 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS SLEW RATE vs SUPPLY VOLTAGE SLEW RATE vs FREE-AIR TEMPERATURE 0.16 SR − Slew Rate − V/ µ s f = 10 kHz TA = 25°C RL = 10 kΩ CL = 160 pF AV = 1 0.11 0.1 0.14 f = 10 kHz RL = 10 kΩ CL = 160 pF AV = 1 0.12 VDD = 5 V VDD = 3 V 0.1 0.08 0.09 2.5 3 3.5 4.5 4 0.06 −40 −20 5 0 20 40 60 80 100 120 140 TA − Free-Air Temperature − °C VDD − Supply Voltage − V Figure 26 Figure 27 MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY VO(PP) − Maximum Peak-to-Peak Output Voltage − V SR − Slew Rate − V/ µ s 0.12 5 4.5 VO(PP) = 5 V 4 3.5 3 2.5 VO(PP) = 3 V 2 1.5 1 0.5 0 100 THD + N < 5% AV = 5 RL = 20 kΩ TA = 25°C 1k 10k 100k f − Frequency − Hz Figure 28 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 17 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY −20 −20 VDD = 3 V AV = 1 RL = 10 kΩ All Channels −30 −40 −50 Crosstalk − dB Crosstalk − dB −40 VDD = 5 V AV = 1 RL = 10 kΩ All Channels −30 −60 −70 −50 −60 −70 −80 −80 −90 −90 −100 −100 −110 −110 10 100 10k 1k 100k 10 100 1k f − Frequency − Hz f − Frequency − Hz Figure 29 Figure 30 SMALL-SIGNAL FOLLOWER PULSE RESPONSE vs TIME 0.3 0.15 0.1 VI 0.05 0.2 0 −0.05 0.15 −0.1 0.1 −0.15 VO 0.05 −0.2 VDD = 3 V RL = 10 kΩ CL = 160 pF AV = 1 TA = 25°C f = 45 kHz 0 −0.05 −0.1 −0.25 −0.3 −0.35 −0.4 −2 0 2 4 6 8 10 t − Time − µs 12 14 Figure 31 18 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 16 VI − Input Voltage − V VO − Output Voltage − V 0.25 10k 100k µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS LARGE-SIGNAL FOLLOWER PULSE RESPONSE vs TIME 5 2 VO − Output Voltage − V 3 2 VI 1 0 −1 1 −2 0 −3 VI − Input Voltage − V VDD = 3 V AV = 1 RL = 10 kΩ CL = 160 pF f = 10 kHz TA = 25°C 4 VO −4 −1 −2 −20 0 20 40 60 80 −5 100 t − Time − µs Figure 32 240 80 200 40 160 0 120 VI −40 VDD = 5 V AV = 1 RL = 10 kΩ CL = 160 pF TA = 25°C 80 40 −80 −120 VI − Input Voltage − mV VO − Output Voltage − mV SMALL-SIGNAL FOLLOWER PULSE RESPONSE vs TIME −160 0 VO −200 −40 −80 −5 0 5 10 t − Time − µs 15 −240 20 Figure 33 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 19 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS LARGE-SIGNAL FOLLOWER PULSE RESPONSE vs TIME 8 VO − Output Voltage − V 2 VDD = 5 V RL = 10 kΩ CL = 160 pF AV = 1 TA = 25°C f = 10 kHz VI 6 1 0 −1 −2 −3 4 −4 VO 2 −5 −6 0 VI − Input Voltage − V 10 −7 −8 −2 −9 −4 −10 0 10 20 30 40 50 60 t − Time − µs 70 80 −10 90 100 Figure 34 SHUTDOWN ON SUPPLY CURRENT vs TIME I DD − Supply Current − µ A Shutdown Control Signal 160 5 140 0 120 −5 100 −10 −15 80 −20 60 −25 40 Supply Current − IDD 20 −30 0 −35 −20 −4 −2 0 4 2 t − Time − µS 6 8 Figure 35 20 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • −40 10 Shutdown Pulse − V 10 180 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS SHUTDOWN OFF SUPPLY CURRENT vs TIME 10 50 5 30 0 20 −5 Supply Current − IDD 10 −10 0 −15 −10 −20 −10 0 10 20 30 40 t − Time − µS 50 60 70 Shutdown Pulse − V I DD − Supply Current − µ A Shutdown Control Signal 40 −20 80 Figure 36 SHUTDOWN SUPPLY CURRENT vs FREE-AIR TEMPERATURE 1.6 Shutdown Mode AV = 1 RL = Open VI = VDD/2 V I DD − Supply Current − µ A 1.4 1.2 VDD = 5 V 1 0.8 0.6 0.4 VDD = 3 V 0.2 0 −55 −35 −15 5 25 45 65 85 105 125 TA − Free-Air Temperature − °C Figure 37 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 21 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS SHUTDOWN SUPPLY CURRENT AND SHUTDOWN PULSE vs TIME 5 VDD = 3 V AV = 1 VI = 1.5 V RL = 10 kΩ CL = 160 pF and 10 pF TA = 25°C 4 3 2 1 Shutdown Pulse − V I DD(SD) − Shutdown Supply Current − µ A SD Pulse 0 30 IDD(SD) 25 20 15 10 5 0 −5 −3 −1 1 3 5 7 9 11 13 15 t − Time − µs Figure 38 SHUTDOWN SUPPLY CURRENT AND SHUTDOWN PULSE vs TIME 4 3 VDD = 3 V AV = 1 VI = 1.5 V RL = 10 kΩ CL = 160 pF and 10 pF TA = 25°C SD Pulse 30 1 0 25 20 15 10 5 0 −100 IDD(SD) −50 0 50 100 150 t − Time − µs Figure 39 22 2 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 200 Shutdown Pulse − V I DD(SD) − Shutdown Supply Current − µ A 5 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS SHUTDOWN SUPPLY CURRENT AND SHUTDOWN PULSE vs TIME VDD = 5 V AV = 1 VI = 2.5 V RL = 10 kΩ CL = 160 pF and 10 pF TA = 25°C SD Pulse 4 3 2 1 0 25 20 15 Shutdown Pulse − V I DD(SD) − Shutdown Supply Current − µ A 5 10 5 IDD(SD) 0 −100 −50 0 50 100 150 200 t − Time − µs Figure 40 SHUTDOWN SUPPLY CURRENT AND SHUTDOWN PULSE vs TIME I DD(SD) − Shutdown Supply Current −µ A 5 4 3 2 1 0 30 IDD(SD) 25 20 15 Shutdown Pulse − V VDD = 5 V AV = 1 VI = 2.5 V RL = 10 kΩ CL = 160 pF and 10 pF TA = 25°C SD Pulse 10 5 0 −10 −5 0 5 10 15 t − Time − µs Figure 41 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 23 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS SHUTDOWN OFF PULSE RESPONSE vs TIME SHUTDOWN OFF PULSE RESPONSE vs TIME 4 6 SD Pulse SD Pulse 5 VDD = 3 V AV = 1 VI = 2.5 V RL = 10 kΩ CL = 160 pF and 8 pF TA = 25°C 2 VO − Output Voltage − V VO − Output Voltage − V 3 1 4 VO Channel 1 3 2 VDD = 5 V AV = 1 VI = 4 V RL = 10 kΩ CL = 160 pF and 8 pF TA = 25°C 1 0 VO Channel 1 −1 −10 10 30 50 0 70 90 110 130 −1 −20 150 0 20 t − Time − µs 60 80 100 120 140 t − Time − µs Figure 42 Figure 43 SHUTDOWN ON PULSE RESPONSE vs TIME SHUTDOWN ON PULSE RESPONSE vs TIME 6 4 VDD = 3 V AV = 1 VI = 2.5 V RL = 10 kΩ TA = 25°C 3 2 CL = 160 pF 1 VDD = 5 V AV = 1 VI = 4 V RL = 10 kΩ TA = 25°C SD Pulse 5 VO − Output Voltage − V SD Pulse VO − Output Voltage − V 40 CL = 8 pF 4 3 CL = 160 pF 2 CL = 8 pF 1 0 0 −1 −1 −2 −1 0 1 2 3 4 5 6 −2 0 4 Figure 45 Figure 44 24 2 6 t − Time − µs t − Time − µs WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 8 10 12 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 TYPICAL CHARACTERISTICS SHUTDOWN REVERSE ISOLATION vs FREQUENCY SHUTDOWN FORWARD ISOLATION vs FREQUENCY 140 VDD = 3 V and 5 V VI(PP) = 0.1, 1.5, 2.5 V RL = 10 kΩ CL = 28 pF TA = 25°C 120 100 Shutdown Forward Isolation − dB Shutdown Reverse Isolation − dB 140 80 60 40 20 VDD = 3 V and 5 V VI(PP) = 0.1, 1.5, 2.5 V RL = 10 kΩ CL = 28 pF TA = 25°C 120 100 80 60 40 20 0 10 100 1k 10k 100k 1M 10M 0 10 100 f − Frequency − Hz 1k 10k f − Frequency − Hz 100k 1M Figure 47 Figure 46 PARAMETER MEASUREMENT INFORMATION _ Rnull + RL CL Figure 48 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 25 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 APPLICATION INFORMATION shutdown function Three members of the TLV245x family (TLV2450/3/5) have a shutdown terminal for conserving battery life in portable applications. When the shutdown terminal is pulled to the voltage level on the GND terminal of the device, the supply current is reduced to 16 nA/channel, the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the shutdown terminal must be pulled high. The shutdown terminal should never be left floating. The shutdown terminal threshold is always referenced to the GND terminal of the device. Therefore, when operating the device with split supply voltages (e.g. ± 2.5 V), the shutdown terminal needs to be pulled to VDD− (not system ground) to disable the operational amplifier. The amplifier’s output with a shutdown pulse is shown in Figures 42, 43, 44, and 45. The amplifier is powered with a single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon and turnoff times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The times for the single, dual, and quad are listed in the data tables. Figures 46 and 47 show the amplifier’s forward and reverse isolation in shutdown. The operational amplifier is powered by ±1.35-V supplies and configured as a voltage follower (AV = 1). The isolation performance is plotted across frequency using 0.1-VPP, 1.5-VPP, and 2.5-VPP input signals. During normal operation, the amplifier would not be able to handle a 2.5-VPP input signal with a supply voltage of ±1.35 V since it exceeds the common-mode input voltage range (VICR). However, this curve illustrates that the amplifier remains in shutdown even under a worst case scenario. driving a capacitive load When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series (RNULL) with the output of the amplifier, as shown in Figure 49. A minimum value of 20 Ω should work well for most applications. RF RG Input RNULL − Output + CLOAD Figure 49. Driving a Capacitive Load 26 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF RG IIB− V + − VI +V IO ǒ ǒ ǓǓ 1) R R F ǒ IB)Ǔ " I G R ǒ ǒ ǓǓ 1) S R R F G ǒ IB*Ǔ " I R F VO + RS OO IIB+ Figure 50. Output Offset Voltage Model general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 51). RG RF O + V I ǒ –3dB + V − VI VO + R1 f C1 1) R R F G Ǔǒ Ǔ 1 1 ) sR1C1 1 2pR1C1 Figure 51. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RF RG –3dB RG = + ( 1 2pRC RF 1 2− Q ) Figure 52. 2-Pole Low-Pass Sallen-Key Filter WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 27 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 APPLICATION INFORMATION general power dissipation considerations For a given θJA, the maximum power dissipation is shown in Figure 53 and is calculated by the following formula: P D + Where: ǒ T Ǔ –T MAX A q JA PD = Maximum power dissipation of TLV245x IC (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA = θJC + θCA θJC = Thermal coefficient from junction to case θCA = Thermal coefficient from case to ambient air (°C/W) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 2 Maximum Power Dissipation − W 1.75 PDIP Package Low-K Test PCB θJA = 104°C/W 1.5 1.25 TJ = 150°C MSOP Package Low-K Test PCB θJA = 260°C/W SOIC Package Low-K Test PCB θJA = 176°C/W 1 0.75 0.5 0.25 SOT-23 Package Low-K Test PCB θJA = 324°C/W 0 −55 −40 −25 −10 5 20 35 50 65 80 95 110 125 TA − Free-Air Temperature − °C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 53. Maximum Power Dissipation vs Free-Air Temperature 28 WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 1) and subcircuit in Figure 54 are generated using the TLV245x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 1: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). PSpice and Parts are trademarks of MicroSim Corporation. WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 29 µ SLOS218F − DECEMBER 1998 − REVISED JANUARY 2005 APPLICATION INFORMATION 3 VDD+ 99 + rp rc1 ree rc2 egnd cee c1 IN+ 11 1 12 + c2 r2 9 7 + vlim − 8 6 vc 2 q1 IN− dp q2 − 13 14 re1 re2 53 4 dc − vb − ve + 54 ga gcm dlp 91 iee GND + ro1 ioff OUT 10 90 dln + hlim − + vlp − 5 92 − vln + de * AMP_TLV2450−X operational amplifier ”macromodel” subcircuit * created using Parts release 8.0 on 10/12/98 at 11:06 * Parts is a MicroSim product. * * connections: noninverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | .subckt AMP_TLV2450−X 1 2 3 4 5 * C1 11 12 354.48E−15 C2 6 7 7.5000E−12 CEE 10 99 42.237E−15 DC 5 53 dy DE 54 5 dy DLP 90 91 dx DLN 92 90 dx DP 4 3 dx EGND 99 0 poly(2) (3,0) (4,0) 0 .5 .5 FB 7 99 poly(5) vb vc ve vlp vln 0 + 207.31E6 −1E3 1E3 210E6 −210E6 GA 6 0 11 12 15.254E−6 GCM 0 6 10 99 48.237E−12 IEE HLIM Q1 Q2 R2 RC1 RC2 RE1 RE2 REE RO1 RO2 RP VB VC VE VLIM VLP VLN .model .model .model .model .ends 10 90 11 12 6 3 3 13 14 10 8 7 3 9 3 54 7 91 0 dx dy qx1 qx2 4 dc 938.61E−9 0 vlim 1K 2 13 qx1 1 14 qx2 9 100.00E3 11 65.557E3 12 65.557E3 10 10.367E3 10 10.367E3 99 213.08E6 5 10 99 10 4 147.06 0 dc 0 53 dc .82 4 dc .82 8 dc 0 0 dc 38 92 dc 38 D(Is=800.00E−18) D(Is=800.00E−18 Rs=1m Cjo=10p) NPN(Is=800.00E−18 Bf=843.08) NPN(Is=800.0000E−18 Bf=843.08) Figure 54. Boyle Macromodel and Subcircuit 30 ro2 fb − WWW.TI.COM POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • PACKAGE OPTION ADDENDUM www.ti.com 14-Jan-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2450AID ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2450AIDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2450AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2450CD ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2450CDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2450CDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2450CDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2450CDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2450CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2450ID ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2450IDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2450IDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2450IDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2450IDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2450IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2451AID ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2451AIDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2451AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2451CD ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2451CDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2451CDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2451CDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2451CDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2451CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2451ID ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 14-Jan-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2451IDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2451IDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2451IDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV2451IDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2451IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2452AID ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2452AIDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2452AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2452CD ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM Lead/Ball Finish MSL Peak Temp (3) TLV2452CDGK ACTIVE MSOP DGK 8 80 None CU SNPB Level-1-220C-UNLIM TLV2452CDGKR ACTIVE MSOP DGK 8 2500 None CU SNPB Level-1-220C-UNLIM TLV2452CDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2452CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2452ID ACTIVE SOIC D 8 75 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2452IDGK ACTIVE MSOP DGK 8 80 None CU SNPB Level-1-220C-UNLIM TLV2452IDGKR ACTIVE MSOP DGK 8 2500 None CU SNPB Level-1-220C-UNLIM TLV2452IDR ACTIVE SOIC D 8 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2452IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2453AID ACTIVE SOIC D 14 50 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2453AIDR ACTIVE SOIC D 14 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2453AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2453CD ACTIVE SOIC D 14 50 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2453CDGS ACTIVE MSOP DGS 10 80 None CU SNPB Level-1-220C-UNLIM TLV2453CDGSR ACTIVE MSOP DGS 10 2500 None CU SNPB Level-1-220C-UNLIM TLV2453CDR ACTIVE SOIC D 14 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2453CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2453ID ACTIVE SOIC D 14 50 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2453IDGS ACTIVE MSOP DGS 10 80 None CU SNPB Level-1-220C-UNLIM TLV2453IDGSR ACTIVE MSOP DGS 10 2500 None CU SNPB Level-1-220C-UNLIM Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 14-Jan-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2453IDR ACTIVE SOIC D 14 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2453IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2454AID ACTIVE SOIC D 14 50 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2454AIDR ACTIVE SOIC D 14 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2454AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Lead/Ball Finish MSL Peak Temp (3) Level-NA-NA-NA TLV2454AIPW ACTIVE TSSOP PW 14 90 None CU NIPDAU Level-1-220C-UNLIM TLV2454AIPWR ACTIVE TSSOP PW 14 2000 None CU NIPDAU Level-1-220C-UNLIM TLV2454CD ACTIVE SOIC D 14 50 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2454CDR ACTIVE SOIC D 14 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2454CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NA-NA-NA TLV2454CPW ACTIVE TSSOP PW 14 90 None Call TI TLV2454CPWR ACTIVE TSSOP PW 14 2000 None CU NIPDAU Call TI Level-1-220C-UNLIM TLV2454ID ACTIVE SOIC D 14 50 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2454IDR ACTIVE SOIC D 14 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2454IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPD Level-NA-NA-NA TLV2454IPW ACTIVE TSSOP PW 14 90 None CU NIPDAU Level-1-220C-UNLIM TLV2454IPWR ACTIVE TSSOP PW 14 2000 None CU NIPDAU Level-1-220C-UNLIM TLV2455AID ACTIVE SOIC D 16 40 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2455AIDR ACTIVE SOIC D 16 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2455AIN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2455AIPW ACTIVE TSSOP PW 16 90 None CU NIPDAU Level-1-220C-UNLIM TLV2455AIPWR ACTIVE TSSOP PW 16 2000 None CU NIPDAU Level-1-220C-UNLIM TLV2455CD ACTIVE SOIC D 16 40 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2455CDR ACTIVE SOIC D 16 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2455CN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA TLV2455CPW ACTIVE TSSOP PW 16 90 None CU NIPDAU Level-1-220C-UNLIM TLV2455CPWR ACTIVE TSSOP PW 16 2000 None CU NIPDAU Level-1-220C-UNLIM TLV2455ID ACTIVE SOIC D 16 40 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2455IDR ACTIVE SOIC D 16 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1YEAR/ Level-1-220C-UNLIM TLV2455IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA Addendum-Page 3 PACKAGE OPTION ADDENDUM www.ti.com 14-Jan-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TLV2455IPW ACTIVE TSSOP PW 16 90 None CU NIPDAU Level-1-220C-UNLIM TLV2455IPWR ACTIVE TSSOP PW 16 2000 None CU NIPDAU Level-1-220C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 4 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. 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