TSC TSM6963SDCARV

TSM6963SD
20V Dual P-Channel MOSFET
TSSOP-8
PRODUCT SUMMARY
VDS (V)
RDS(on)(mΩ)
Pin Definition:
1. Drain 1
8. Drain 2
2. Source 1
7. Source 2
3. Source 1
6. Source 2
4. Gate 1
5. Gate 2
-20
Features
ID (A)
30 @ VGS = -4.5V
-4.5
42 @ VGS = -2.5V
-3
68 @ VGS = -1.8V
-2
Block Diagram
●
Advance Trench Process Technology
●
High Density Cell Design for Ultra Low On-resistance
Application
●
Load Switch
●
PA Switch
Ordering Information
Part No.
Package
Packing
TSM6963SDCA RV
TSSOP-8
2.5Kpcs / 13” Reel
Dual P-Channel MOSFET
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
VDS
-20
V
Gate-Source Voltage
VGS
±12
V
ID
-4.5
A
IDM
-16
A
IS
-1.0
A
Continuous Drain Current, VGS @4.5V.
Pulsed Drain Current, VGS @4.5V
Continuous Source Current (Diode Conduction)
a,b
o
Maximum Power Dissipation
Ta = 25 C
PD
o
Ta = 70 C
Operating Junction Temperature
W
0.73
+150
o
C
TJ, TSTG
- 55 to +150
o
C
Symbol
Limit
TJ
Operating Junction and Storage Temperature Range
1.14
Thermal Performance
Parameter
Junction to Foot (Drain) Thermal Resistance
RӨJF
Junction to Ambient Thermal Resistance (PCB mounted)
RӨJA
Unit
75
o
C/W
90
o
C/W
Notes:
a. Surface Mounted on 1” x 1” FR4 Board.
b. Pulse width limited by maximum junction temperature
1/1
Version: B09
TSM6963SD
20V Dual P-Channel MOSFET
Electrical Specifications (Ta =25oC unless otherwise noted)
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
VGS =0V, ID =-250uA
BVDSS
-20
--
--
V
Gate Threshold Voltage
VDS =VGS, ID =-250uA
VGS(TH)
-0.5
-0.7
-1.0
V
Zero Gate Voltage Drain Current
VDS =-16V, VGS =0V
IDSS
--
--
-1
uA
Gate Body Leakage
VGS =±12V, VDS =0V
IGSS
--
--
±100
nA
On-State Drain Current
VDS =-5V, VGS =-4.5V
ID(ON)
-25
--
--
A
--
23
30
--
30
42
--
45
68
VGS =-4.5V, ID =-4.5A
Drain-Source On-State Resistance
VGS =-2.5V, ID =-3A
RDS(ON)
VGS =-1.8V, ID =-2A
mΩ
Forward Transconductance
VDS =-5V, ID =-4.5A
gfs
--
16
--
S
Diode Forward Voltage
IS =-0.5A, VGS =0V
VSD
--
- 0.8
-1.3
V
Qg
--
14
20
Qgs
--
2.1
10
Qgd
--
4.7
--
Ciss
--
1500
--
Coss
--
220
--
Crss
--
160
--
td(on)
--
6
11 tr
--
13
23
td(off)
--
86
145
--
42
70
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
VDS =-10V, ID =-4.5A,
VGS =-4.5V
VDS =-10V, VGS =0V,
f =1.0MHz
nC
pF
C
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
VDD =-10V, RL =10Ω,
ID =-1A, VGEN =-4.5V,
RG =6Ω
Turn-Off Fall Time
tf
Notes:
a. pulse test: PW≤300µS, duty cycle ≤2%
b. For DESIGN AID ONLY, not subject to production testing.
b. Switching time is essentially independent of operating temperature.
2/2
nS
Version: B09
TSM6963SD
20V Dual P-Channel MOSFET
Electrical Characteristics Curve (Ta = 25oC, unless otherwise noted)
Output Characteristics
Transfer Characteristics
On-Resistance vs. Drain Current
Gate Charge
On-Resistance vs. Junction Temperature
Source-Drain Diode Forward Voltage
3/3
Version: B09
TSM6963SD
20V Dual P-Channel MOSFET
Electrical Characteristics Curve (Ta = 25oC, unless otherwise noted)
On-Resistance vs. Gate-Source Voltage
Threshold Voltage
Single Pulse Power
Normalized Thermal Transient Impedance, Junction-to-Ambient
4/4
Version: B09
TSM6963SD
20V Dual P-Channel MOSFET
TSSOP-8 Mechanical Drawing
TSSOP-8 DIMENSION
DIM
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
A
6.20
6.60
0.244
0.260
a
4.30
4.50
0.170
0.177
B
2.90
3.10
0.114
0.122
C
0.65 (typ)
0.025 (typ)
D
0.25
0.30
0.010
0.019
E
1.05
1.20
0.041
0.049
e
0.05
0.15
0.002
F
0.127
L
0.50
0.009
0.005
0.70
0.020
0.028
Marking Diagram
Y = Year Code
M = Month Code
(A=Jan, B=Feb, C=Mar, D=Apl, E=May, F=Jun, G=Jul, H=Aug,
I=Sep, J=Oct, K=Nov, L=Dec)
L = Lot Code
5/5
Version: B09
TSM6963SD
20V Dual P-Channel MOSFET
Notice
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assumes no responsibility or liability for any errors or inaccuracies.
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6/6
Version: B09