PIC16C73A Errata Sheet for Rev. B PIC16C73A Silicon The PIC16C73A (Rev. B) parts you have received conform functionally to the PIC16C7X data sheet (DS30390C), except for the anomalies described below. All the problems listed here will be addressed in future revisions of PIC16C73A silicon. 1. Module: USART When the USART (SCI) is configured in asynchronous mode with the BRGH bit set, a high number of receive errors may be experienced. For asynchronous receive operations it is recommended that the USART be configured with the BRGH bit cleared. 2. Module: CCP The special event trigger of the Compare mode may not occur if both of the following conditions exist: • An instruction one cycle (TCY) prior to a Timer1/ Compare register match has literal data equal to the address of a CCP register being used.* • An instruction in the same cycle as a Timer1/ Compare register match has an MSb of ‘0’. The interrupt for the compare event will still be generated, but no special event trigger will occur. * 15h(CCPR1L), 16h(CCPR1H) or 17h(CCP1CON) for CCP1; 1Bh(CCPR2L), 1Ch(CCPR2H) or 1Dh(CCP2CON) for CCP2. Work Around Use the interrupt service routine instead of using the special event trigger to reset Timer1 (and start an A/D conversion, if applicable). 3. Module: Timer1 The Timer1 value may unexpectedly increment if either the TMR1H or the TMR1L register is written. If Timer1 is ON, then turned OFF, performing any write instruction with TMR1H as the destination may cause TMR1L to increment. TMR1 value before MOVF instruction: TMR1H:TMR1L = 3F:00 TMR1 value after MOVF instruction: TMR1H:TMR1L = 3F:01 Example 2: BSF T1CON, TMR1ON : BCF T1CON, TMR1ON MOVF TMR1H, 1 TMR1 value before MOVF instruction: TMR1H:TMR1L = FF:FF TMR1 value after MOVF instruction: TMR1H:TMR1L = FF:00 If Timer1 is ON, then turned OFF when TMR1H:TMR1L = xx:FF, performing any write instruction with TMR1L as the destination may cause TMR1H to increment. Example 1: BSF T1CON, TMR1ON : BCF T1CON, TMR1ON CLRF TMR1L TMR1 value before CLRF instruction: TMR1H:TMR1L = FF:FF TMR1 value after CLRF instruction: TMR1H:TMR1L = 00:00 (TMR1IF is not set.) Work Around To preserve Timer1 register values: Read Timer1 register values into “shadow” registers. Perform any write instruction(s) on the shadow registers. Write the shadow register values back into the Timer1 registers. Example 1: BSF T1CON, TMR1ON : BCF T1CON, TMR1ON MOVF TMR1H, 1 Note: As with any windowed EPROM device, please cover the window at all times, except when erasing. November, 1996 Microchip Technology Inc. DS30390C/73A/B1E1-page 1 PIC16C73A 4. Module: SSP When the SPI is using Timer2/2 as the clock source, a shorter-than-expected SCK pulse may occur on the first bit of the transmitted/received data. Example: Write SSPBUF bit0=1 bit1=0 bit2=1 . . . . SD0 SCK Work Around To avoid producing the short pulse, turn off Timer2 and clear the TMR2 register, load the SSPBUF with the data to transmit, and then turn Timer2 back on. Example Code: BSF STATUS, RP0 LOOP BTFSS SSPSTAT, BF GOTO BCF MOVF MOVWF MOVF BCF CLR MOVWF BSF LOOP STATUS, RP0 SSPBUF, W RXDATA TXDATA, W T2CON, TMR2ON TMR2 SSPBUF T2CON, TMR2ON DS30390C/73A/B1E1-page 2 ;Bank 1 ;Data received? ;(Xmit complete?) ;No ;Bank 0 ;W = SSPBUF ;Save in user RAM ;W = TXDATA ;Timer2 off ;Clear Timer2 ;Xmit New data ;Timer2 on November, 1996 Microchip Technology Inc. PIC16C73A Clarifications/Corrections to the Data Sheet: In the PIC16C7X Data Sheet (DS30390C), the following clarifications and corrections should be noted. NONE November, 1996 Microchip Technology Inc. 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No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical com ponents in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectu al property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. All rights reserved. All other trademarks mentioned herein are the p roperty of their respective companies. November, 1996 Microchip Technology Inc. DS30390C/73A/B1E1-page 4