SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDAS143C – APRIL 1982 – REVISED AUGUST 1995 • SN54ALS74A, SN54AS74A . . . J PACKAGE SN74ALS74A, SN74AS74A . . . D OR N PACKAGE (TOP VIEW) Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs TYPE TYPICAL MAXIMUM CLOCK FREQUENCY (CL = 50 pF) (MHz) 1CLR 1D 1CLK 1PRE 1Q 1Q GND TYPICAL POWER DISSIPATION PER FLIP-FLOP (mW) ′ALS74A 50 6 ′AS74A 134 26 description 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q SN54ALS74A, SN54AS74A . . . FK PACKAGE (TOP VIEW) 1D 1CLR NC VCC 2CLR These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2D NC 2CLK NC 2PRE 1Q GND NC 2Q 2Q 1CLK NC 1PRE NC 1Q NC – No internal connection The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0°C to 70°C. FUNCTION TABLE INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H L X X H H† L L X X L H† H H ↑ H H L H H ↑ L L H H H L X Q0 Q0 † The output levels in this configuration are not specified to meet the minimum levels for VOH if the lows at PRE and CLR are near VIL maximum. Furthermore, this configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDAS143C – APRIL 1982 – REVISED AUGUST 1995 logic symbol† 1PRE 1CLK 1D 1CLR 2PRE 2CLK 2D 2CLR 4 2 1 5 S 3 1Q C1 1D 6 1Q R 10 9 11 2Q 12 8 13 2Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages. logic diagram (positive logic) PRE CLR Q Q CLK D absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54ALS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDAS143C – APRIL 1982 – REVISED AUGUST 1995 recommended operating conditions SN54ALS74A SN74ALS74A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.7 0.8 High-level output current – 0.4 – 0.4 mA IOL fclock Low-level output current 4 8 mA 34 MHz High-level input voltage 2 Clock frequency 0 PRE or CLR low tw 2 Pulse duration tsu Set p time before CLK↑ Setup th TA Hold time after CLK↑ 25 15 CLK high 17.5 14.5 CLK low 17.5 14.5 Data 16 15 PRE or CLR inactive 10 10 Data Operating free-air temperature 2 V 0 15 125 V ns ns 0 – 55 V ns 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 2 mA VOL VCC = 4 4.5 5V IOL = 4 mA IOL = 8 mA VCC = 4 4.5 5V V, VI = 7 V VCC = 4 4.5 5V V, VI = 2 2.7 7V VCC = 4 4.5 5V V, VI = 0 0.4 4V II IIH IIL CLK or D PRE or CLR CLK or D PRE or CLR CLK or D PRE or CLR SN54ALS74A MIN TYP† MAX SN74ALS74A MIN TYP† MAX –1.5 VCC – 2 –1.5 VCC – 2 0.25 0.4 UNIT V V 0.25 0.4 0.35 0.5 0.1 0.1 0.2 0.2 20 20 40 40 – 0.2 – 0.2 – 0.4 – 0.4 V mA µA mA IO‡ VCC = 5.5 V, VO = 2.25 V – 20 –112 – 30 –112 mA ICC VCC = 5.5 V, See Note 1 2.4 4 2.4 4 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. NOTE 1: ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDAS143C – APRIL 1982 – REVISED AUGUST 1995 switching characteristics (see Figure 1) FROM (INPUT) PARAMETER VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† SN54ALS74A SN74ALS74A TO (OUTPUT) MIN fmax tPLH tPHL tPLH MAX MIN 25 PRE or CLR Q or Q MAX 34 MHz 3 18 3 13 5 17 5 15 5 16 5 18 5 23 CLK Q or Q tPHL 5 20 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. UNIT ns ns absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74AS74A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS74A SN74AS74A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current –2 –2 mA IOL fclock* Low-level output current 20 20 mA 105 MHz tw* Pulse duration High-level input voltage 2 Clock frequency tsu* Set p time before CLK↑ Setup th* TA Hold time after CLK↑ 0 2 90 0 PRE or CLR low 4 CLK high 4 4 CLK low 5.5 5.5 Data 4.5 4.5 2 2 PRE or CLR inactive Data Operating free-air temperature V 4 0 – 55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns ns 0 125 0 * On products compliant to MIL-STD-833, Class B, this parameter is based on characterization data but is not production tested. 4 V ns 70 °C SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDAS143C – APRIL 1982 – REVISED AUGUST 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VOH VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = –18 mA IOH = – 2 mA VOL II VCC = 4.5 V, VCC = 5.5 V, IOL = 20 mA VI = 7 V IIH IIL CLK or D PRE or CLR CLK or D PRE or CLR VCC = 5 5.5 5V V, VI = 2 2.7 7V VCC = 5 5.5 5V V, VI = 0 0.4 4V SN54AS74A TYP† MAX MIN SN74AS74A TYP† MAX MIN –1.2 VCC – 2 –1.2 VCC – 2 0.25 0.5 UNIT V V 0.25 0.5 V 0.1 0.1 mA 20 20 40 40 – 0.5 – 0.5 –1.8 –1.8 µA mA IO‡ VCC = 5.5 V, VO = 2.25 V – 30 –112 – 30 –112 mA ICC VCC = 5.5 V, See Note 1 10.5 16 10.5 16 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. NOTE 1: ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX§ SN54AS74A MIN fmax* tPLH tPHL tPLH MAX 90 PRE or CLR Q or Q CLK Q or Q UNIT SN74AS74A MIN MAX 105 MHz 2 9 2 7.5 2.5 11.5 2.5 10.5 2.5 10 3 8 tPHL 3.5 10.5 3 9 * On products compliant to MIL-STD-833, Class B, this parameter is based on characterization data but is not production tested. § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns ns 5 SN54ALS74A, SN54AS74A, SN74ALS74A, SN74AS74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDAS143C – APRIL 1982 – REVISED AUGUST 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V Data Input tw th tsu 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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