SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 D Available in the Texas Instruments D D D D D D D D DBV OR DCK PACKAGE (TOP VIEW) NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) D CLK GND 1 5 VCC 4 Q 2 3 YEA, YEP, YZA, OR YZP PACKAGE (BOTTOM VIEW) GND CLK D 3 4 Q 2 1 5 VCC description/ordering information This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. ORDERING INFORMATION NanoStar − WCSP (DSBGA) 0.17-mm Small Bump − YEA SN74LVC1G79YEAR NanoFree − WCSP (DSBGA) 0.17-mm Small Bump − YZA (Pb-free) SN74LVC1G79YZAR NanoStar − WCSP (DSBGA) 0.23-mm Large Bump − YEP −40 C to 85°C 85 C −40°C ORDERABLE PART NUMBER PACKAGE† TA Reel of 3000 SOT (SC-70) − DCK _ _ _CR_ SN74LV1G79YEPR NanoFree − WCSP (DSBGA) 0.23-mm Large Bump − YZP (Pb-free) SOT (SOT-23) − DBV TOP-SIDE MARKING‡ SN74LV1G79YZPR Reel of 3000 SN74LVC1G79DBVR Reel of 250 SN74LVC1G79DBVT Reel of 3000 SN74LVC1G79DCKR Reel of 250 SN74LVC1G79DCKT C79_ CR_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments. Copyright 2003, Texas Instruments Incorporated !"# $"%&! '#( '"! ! $#!! $# )# # #* "# '' +,( '"! $!#- '# #!#&, !&"'# #- && $##( POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 description/ordering information (continued) This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE INPUTS CLK D OUTPUT Q ↑ H H ↑ L L L X Q0 logic diagram (positive logic) 2 CLK C C C 4 TG C C Q C C D 1 TG TG TG C C C absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 154°C/W YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 132°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 recommended operating conditions (see Note 4) Operating VCC VIH Supply voltage High-level input voltage VIL Low-level input voltage VI VO Input voltage Data retention only VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2.3 V ∆t/∆v Low-level output current Input transition rise or fall rate 5.5 0.65 × VCC 1.7 V 2 0.7 × VCC 0.35 × VCC 0.7 0.8 V 0.3 × VCC 0 5.5 V 0 VCC −4 V −8 mA −24 −32 4 8 16 VCC = 3 V UNIT V 1.5 −16 VCC = 3 V VCC = 4.5 V VCC = 1.65 V IOL 1.65 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V Output voltage High-level output current MAX VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 1.65 V VCC = 2.3 V IOH MIN mA 24 VCC = 4.5 V VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 32 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 10 20 ns/V 5 TA Operating free-air temperature −40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH TEST CONDITIONS VCC MIN IOH = −100 mA IOH = −4 mA 1.65 V to 5.5 V 1.65 V VCC−0.1 1.2 IOH = −8 mA IOH = −16 mA 2.3 V 1.9 ICC ∆ICC 2.3 4.5 V IOL = 100 mA IOL = 4 mA 1.65 V to 5.5 V 1.65 V 0.45 IOL = 8 mA IOL = 16 mA 2.3 V 0.3 3.8 0.1 0.4 3V 0.55 0.55 0 to 5.5 V ±10 mA ±10 mA 1.65 V to 5.5 V 10 mA 3 V to 5.5 V 500 mA VI = 5.5 V or GND VI or VO = 5.5 V 0 VI = 5.5 V or GND, One input at VCC − 0.6 V, IO = 0 Other inputs at VCC or GND V 4.5 V IOL = 32 mA CLK or D inputs UNIT V IOH = −32 mA IOL = 24 mA II Ioff MAX 2.4 3V IOH = −24 mA VOL TYP† Ci VI = VCC or GND † All typical values are at VCC = 3.3 V, TA = 25°C. 3.3 V 4 pF timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) VCC = 1.8 V ± 0.15 V MIN fclock tw 4 Clock frequency Setup time before CLK↑ th Hold time, data after CLK↑ MIN 160 Pulse duration, CLK high or low tsu MAX VCC = 2.5 V ± 0.2 V MAX VCC = 3.3 V ± 0.3 V MIN 160 MAX VCC = 5 V ± 0.5 V MIN 160 160 2.5 2.5 2.5 2.5 Data high 2.2 1.4 1.3 1.2 Data low 2.6 1.4 1.3 1.2 0.3 0.4 1 0.5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT MAX MHz ns ns ns SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd VCC = 1.8 V ± 0.15 V MIN MAX 160 CLK Q VCC = 2.5 V ± 0.2 V MIN MAX 160 2.5 9.1 VCC = 3.3 V ± 0.3 V MIN MAX 160 1.2 6 VCC = 5 V ± 0.5 V MIN 160 1 4 UNIT MAX MHz 0.8 3.8 ns switching characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd VCC = 1.8 V ± 0.15 V MIN MAX 160 CLK Q VCC = 2.5 V ± 0.2 V MIN MAX 160 3.9 9.9 VCC = 3.3 V ± 0.3 V MIN MAX 160 2 7 VCC = 5 V ± 0.5 V MIN 160 1.7 5 UNIT MAX MHz 1 4.5 ns operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS f = 10 MHz POST OFFICE BOX 655303 VCC = 1.8 V TYP VCC = 2.5 V TYP 26 • DALLAS, TEXAS 75265 26 VCC = 3.3 V TYP 27 VCC = 5 V TYP 30 UNIT pF 5 SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MΩ 1 MΩ 1 MΩ 1 MΩ 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPZL tPLZ VLOAD/2 VM tPZH VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES220N − APRIL 1999 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION RL From Output Under Test CL (see Note A) VLOAD Open S1 GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH tPHL VOH VM Output VM VOL tPHL Output Waveform 1 S1 at VLOAD (see Note B) tPLH VM VM VM 0V tPZL tPLZ VLOAD/2 VM tPZH VOH Output VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 18-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC1G79DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G79DBVT ACTIVE SOT-23 DBV 5 250 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G79DCKR ACTIVE SC70 DCK 5 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G79DCKT ACTIVE SC70 DCK 5 250 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G79YEAR ACTIVE WCSP YEA 5 3000 None SNPB Level-1-260C-UNLIM SN74LVC1G79YEPR ACTIVE WCSP YEP 5 3000 None SNPB Level-1-260C-UNLIM SN74LVC1G79YZAR ACTIVE WCSP YZA 5 3000 None Call TI Call TI SN74LVC1G79YZPR ACTIVE WCSP YZP 5 3000 Pb-Free (RoHS) SNAGCU Lead/Ball Finish MSL Peak Temp (3) Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002 DCK (R-PDSO-G5) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 5 0,10 M 4 1,40 1,10 1 0,13 NOM 2,40 1,80 3 Gage Plane 2,15 1,85 0,15 0°–8° 0,46 0,26 Seating Plane 1,10 0,80 0,10 0,00 0,10 4093553-2/D 01/02 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. 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