MOTOROLA MC100ES6130

Freescale Semiconductor, Inc.
MOTOROLA
Order number: MC100ES6130
Rev 1, 5/2004
SEMICONDUCTOR TECHNICAL DATA
2.5/3.3V 1:4 PECL Clock Driver
with 2:1 Input MUX
MC100ES6130
The MC100ES6130 is a 2.5 GHz differential PECL 1:4 fanout buffer. The
ES6130 offers a wide operating range of 2.5 V and 3.3 V and also features a
2:1 input MUX which is ideal for redundant clock switchover applications. This
device also includes a synchronous enable pin that forces the outputs into a
fixed logic state. Enable or disable state is initiated only after the outputs are
in a LOW state to eliminate the possibility of a runt clock pulse.
DT SUFFIX
16 LEAD TSSOP PACKAGE
CASE 948F
•
•
•
•
•
•
•
•
•
2 GHz maximum output frequency
25 ps maximum output-to-output skew
150 ps part-to-part skew
350 ps typical propagation delay
2:1 differential MUX input
2.5 / 3.3 V operating range
LVPECL and HSTL input compatible
16-lead TSSOP package
Temperature range –40°C to +85°C
ORDERING INFORMATION
Device
16
VCC
15
EN
3
14
IN1
Q1
4
13
IN1
Q2
5
12
IN0
Q2
6
11
IN0
Q3
7
10
IN_SEL
Q3
8
9
VEE
Q0
1
Q0
2
Q1
Q
D
1
Package
MC100ES6130DT
TSSOP-16
MC100ES6130DTR2
TSSOP-16
0
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Features
Figure 1. 16-Lead Pinout (Top View) and Logic Diagram
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MC100ES6130
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Table 1. Pin Description
Number
Name
Description
1, 2, 3, 4, 5, 6, 7,
8
Q0 to Q3
Q0 to Q3
9
VEE
10
IN_SEL
LVPECL compatible 2:1 mux input signal select: When IN_SEL is LOW, the IN0 input pair is selected. When
IN_SEL is HIGH, the IN1 input pair is selected. Includes a 75kΩ pulldown. Default state is LOW and IN0 is
selected.
11, 12, 13, 14
IN0, IN0
IN1, IN1
LVPECL, HSTL clock or data inputs. Internal 75kΩ pulldown resistors on IN0 and IN1. Internal 75kΩ pullup
and 75kΩ pulldown resistors on IN0, IN1. IN0, IN1 default condition is VCC/2 when left floating. IN0, IN1 default
condition is LOW when left floating.
15
EN
LVPECL compatible synchronous enable: When EN goes HIGH, QOUT will go LOW and QOUT will go HIGH on
the next LOW input clock transition. Includes a 75kΩ pulldown. Default state is LOW when left floating. The
internal latch is clocked on the falling edge of the input (IN0, IN1).
16
VCC
Positive power supply: Bypass with 0.1µF//0.01µF low ESR capacitors.
LVPECL differential outputs: Terminate with 50Ω to VCC–2V. For single-ended applications, terminate the
unused output with 50Ω to VCC–2V.
Negative power supply: For LVPECL applications, connect to GND.
Table 2. Truth Table1
IN0
IN1
IN_SEL
EN
Q
L
X
L
L
L
H
X
L
L
H
X
L
H
L
L
X
H
H
L
L
Z
X
L
H
L
X
Z
H
H
L
1. Z = HIGH to LOW Transition
X = Don’t Care
Table 3. General Specifications
Characteristics
Value
Internal Input Pulldown Resistor
75 kΩ
Internal Input Pullup Resistor
75 kΩ
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 2000 V
> 200 V
> 1500 V
θJA Thermal Resistance (Junction-to-Ambient)
0 LFPM, 16 TSSOP
500 LFPM, 16 TSSOP
138°C/W
108°C/W
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
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MC100ES6130
Table 4. Absolute Maximum Ratings1
Symbol
Rating
Conditions
VSUPPLY
Power Supply Voltage
Difference between VCC & VEE
VIN
Input Voltage
VCC – VEE ≤ 3.6 V
Iout
Output Current
Continuous
Surge
TA
TSTG
Rating
Units
3.9
V
VCC + 0.3
VEE – 0.3
V
V
50
100
mA
mA
Operating Temperature Range
–40 to +85
°C
Storage Temperature Range
–65 to +150
°C
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions
or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not
implied.
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Table 5. DC Characteristics (VCC = 0 V, VEE = –2.5 V ±5% or VCC = 2.5 V ±5%, VEE = 0 V)
Symbol
–40°C
Characteristic
Min
0°C to 85°C
Typ
Max
45
70
VCC – 990
VCC – 800
Min
Unit
Typ
Max
45
70
mA
VCC – 960
IEE
Power Supply Current
VOH
Output HIGH Voltage1
VCC – 1250
VCC – 750
mV
VOL
Output LOW Voltage1
VCC – 2000 VCC – 1550 VCC – 1150 VCC – 1925 VCC – 1630 VCC – 1200
mV
VoutPP
Output Peak-to-Peak Voltage
VIH
Input HIGH Voltage
VCC – 1165
VCC – 880
VCC – 1165
VCC – 880
mV
VIL
Input LOW Voltage
VCC – 1810
VCC – 1475 VCC – 1810
VCC – 1475
mV
VPP
Differential Input Voltage2
VCMR
Differential Cross Point Voltage3
IIN
Input Current
VCC – 1200
200
200
mV
0.12
1.3
0.12
1.3
V
VEE + 0.2
VCC – 1.0
VEE + 0.2
VCC – 1.0
V
±150
µA
±150
1. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase.
2. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality.
3. VCMR (DC) is the cross point of the differential input signal. Functional operation is obtained when the cross point is within the VCMR (DC) range
and the input swing lies within the VPP (DC) specification.
Table 6. DC Characteristics (VCC = 0 V, VEE = –3.8 to 3.135 V or VCC = 3.135 to 3.8 V, VEE = 0 V)
Symbol
IEE
–40°C
Characteristic
Min
0°C to 85°C
Typ
Max
Unit
48
70
mA
VCC – 970
VCC – 750
mV
VCC– 1950 VCC – 1620 VCC – 1250 VCC – 2000 VCC – 1680 VCC – 1300
mV
Power Supply Current
Typ
Max
48
70
Min
VOH
Output HIGH Voltage
VOL
Output LOW Voltage1
VoutPP
Output Peak-to-Peak Voltage
VIH
Input HIGH Voltage
VCC – 1165
VCC – 880
VCC – 1165
VCC – 880
mV
VIL
Input LOW Voltage
VCC – 1810
VCC – 1475 VCC – 1810
VCC – 1475
mV
VPP
Differential Input Voltage2
VCMR
Differential Cross Point Voltage3
IIN
Input Current
1
VCC – 1150 VCC – 1020
VCC – 800
VCC – 1200
200
200
mV
0.12
1.3
0.12
1.3
V
VEE + 0.2
VCC - 1.1
VEE + 0.2
VCC – 1.1
V
±150
µA
±150
1. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase.
2. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality.
3. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range
and the input swing lies within the VPP (DC) specification.
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MC100ES6130
Table 7. AC Characteristics (VCC = 0 V, VEE = –3.8 V to –2.375 V; VCC = 2.375 to 3.8 V, VEE = 0 V)1
–40°C
Symbol
Maximum Frequency
Typ
Max
Min
2
tPLH / tPHL Propagation Delay to Output
Differential
CLK to Q, Q
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85°C
Unit
Min
fmax
25°C
Characteristic
tSKEW
Skew2
tJITTER
Cycle-to-Cycle Jitter
VPP
Minimum Input Swing
VCMR
Differential Cross Point Voltage
tr / tf
Output Rise/Fall Times
(20% – 80% @ 50 MHz)
Typ
Max
2
300
output-to-output
part-to-part
340
450
15
25
125
RMS (1σ)
300
VEE + 0.2
200
450
15
25
150
1200
VCC – 1.2 VEE + 0.2
70
350
300
1
1200
225
Typ
Max
2
1
200
Min
70
200
VCC – 1.2 VEE + 0.2
250
70
GHz
350
475
ps
15
25
150
ps
ps
1
ps
1200
mV
VCC – 1.2
V
275
ps
1. Measured using a 750 mV source, 50% Duty Cycle clock source. All loading with 50 ohms to VCC –2.0V.
2. Skew is measured between outputs under identical transitions.
Figure 1.
Q
D
Driver
Device
Receiver
Device
Qb
Db
50Ω
50Ω
V TT
Figure 2. Typical Termination for Output Driver and Device Evaluation
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MC100ES6130
OUTLINE DIMENSIONS
TSSOP-16
DT SUFFIX
16-LEAD TSSOP PACKAGE
CASE 948F-01
ISSUE 0
K
16X
REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH
OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE -W-.
K
K1
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2X
L/2
16
9
J1
B
-U-
L
SECTION N-N
J
PIN 1
IDENT.
8
1
N
0.25 (0.010)
0.15 (0.006) T U
S
A
-V-
M
N
F
DETAIL E
-W-
C
0.10 (0.004)
-T-
SEATING
PLANE
H
D
DETAIL E
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
--1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0˚
8˚
INCHES
MIN
MAX
0.193
0.200
0.169
0.177
--0.047
0.002
0.006
0.020
0.030
0.026 BSC
0.007
0.011
0.004
0.008
0.004
0.006
0.007
0.012
0.007
0.010
0.252 BSC
0˚
8˚
G
CASE 948F-01
ISSUE O
TIMING SOLUTIONS
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
5
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DATE 12/20/94
MOTOROLA
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MC100ES6130
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NOTES
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TIMING SOLUTIONS
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MC100ES6130
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NOTES
TIMING SOLUTIONS
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MC100ES6130
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