MOTOROLA SEMICONDUCTOR TECHNICAL DATA ÷4 Divider MC100LVEL33 The MC100LVEL33 is an integrated ÷4 divider. The differential clock inputs and the VBB allow a differential, single-ended or AC coupled interface to the device. If used, the VBB output should be bypassed to ground with a 0.01µF capacitor. Also note that the VBB is designed to be used as an input bias on the EL33 only, the VBB output has limited current sink and source capability. The LVEL is functionally equivalent to the EL33 and works from a low voltage supply. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple LVEL33’s in a system. • • • • • • 8 630ps Propagation Delay 1 4.0GHz Toggle Frequency High Bandwidth Output Transitions D SUFFIX PLASTIC SOIC PACKAGE CASE 751-05 Operates from –3.3V (or 3.3V) Supply 75kΩ Internal Input Pulldown Resistors >2000V ESD Protection LOGIC DIAGRAM AND PINOUT ASSIGNMENT Reset 1 CLK 2 8 VCC 7 Q 6 Q R PIN DESCRIPTION ÷4 CLK VBB 3 4 5 VEE PIN FUNCTION CLK Reset VBB Q Clock Inputs Asynch Reset Ref Voltage Output Data Ouputs 8/96 Motorola, Inc. 1996 3–1 REV 0 MC100LVEL33 DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = GND) –40°C Symbol Characteristic Min 0°C Typ Max 33 37 Min 25°C Typ Max 33 37 Min 85°C Typ Max 33 37 Min Typ Max Unit 35 39 mA IEE Power Supply Current VEE Power Supply Voltage –3.0 –3.8 –3.0 –3.8 –3.0 –3.8 –3.0 –3.8 V VBB Output Reference Voltage –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 V IIH Input HIGH Current 150 µA IIL Input LOW Current CLK Other 150 –600 0.5 150 –600 0.5 150 –600 0.5 µA –600 0.5 AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = GND) –40°C Symbol Characteristic Min Typ 3.4 4.2 0°C Max Min Typ 3.8 4.2 25°C Max Min Typ 3.8 4.2 85°C Max Min Typ 3.8 4.2 Max fMAX Maximum Toggle Frequency tPLH tPHL Propagation Delay CLK to Q (Diff) CLK to Q (SE) Reset to Q 510 460 500 trr Reset Recovery 300 tskew Duty Cycle Skew2 VPP Minimum Input Swing1 150 VCMR Common Mode Range3 VPP < 500mV VPP ≥ 500mV –2.0 –1.8 –0.4 –0.4 –2.1 –1.9 –0.4 –0.4 –2.1 –1.9 –0.4 –0.4 –2.1 –1.9 –0.4 –0.4 tr tf Output Rise/Fall Times Q (20% – 80%) 120 320 120 320 120 320 120 320 690 740 700 530 480 510 710 760 710 300 540 490 520 720 770 720 300 20 20 150 600 550 580 GHz 780 830 780 300 20 150 Unit ps ps 20 150 ps mV V ps 1. Minimum input swing for which AC parameters are guaranteed. 2. Duty cycle skew is the difference between TPLH and TPLL. 3. The CMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1V. The lower end of the CMR range varies 1:1 with VEE. The numbers in the spec table assume a nominal VEE = –3.3V. Note for PECL operation, the VCMR(min) will be fixed at 3.3V – |VCMR(min)|. CLK RESET Q Figure 1. Timing Diagram MOTOROLA 3–2 ECLinPS and ECLinPS Lite DL140 — Rev 3 MC100LVEL33 OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751–05 ISSUE P –A– M 1 4 R 0.25 (0.010) 4X –B– X 45 _ B M 5 P 8 NOTES: 1. DIMENSIONS A AND B ARE DATUMS AND T IS A DATUM SURFACE. 2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 3. DIMENSIONS ARE IN MILLIMETER. 4. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 6. DIMENSION D DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. J M_ C F G –T– K SEATING PLANE 8X D 0.25 (0.010) M T B S A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.18 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 ◊ ECLinPS and ECLinPS Lite DL140 — Rev 3 3–3 *MC100LVEL33/D* MC100LVEL33/D MOTOROLA