ONSEMI NTMSD2P102LR2G

NTMSD2P102LR2
FETKY™
Power MOSFET and Schottky Diode
Dual SO−8 Package
Features
• High Efficiency Components in a Single SO−8 Package
• High Density Power MOSFET with Low RDS(on),
•
•
•
•
•
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Schottky Diode with Low VF
Logic Level Gate Drive
Independent Pin−Outs for MOSFET and Schottky Die
Allowing for Flexibility in Application Use
Less Component Placement for Board Space Savings
SO−8 Surface Mount Package, Mounting Information for SO−8
Package Provided
Pb−Free Package is Available
Applications
• Power Management in Portable and Battery−Powered Products, i.e.:
MOSFET
−2.3 AMPERES, −20 VOLTS
90 mW @ VGS = −4.5 V
SCHOTTKY DIODE
2.0 AMPERES, 20 VOLTS
580 mV @ IF = 2.0 A
Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Value
Unit
VDSS
−20
V
Gate−to−Source Voltage − Continuous
VGS
"10
V
Thermal Resistance, Junction−to−Ambient
(Note 1)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 100°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
175
0.71
−2.3
−1.45
−9.0
°C/W
W
A
A
A
Thermal Resistance, Junction−to−Ambient
(Note 2)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 100°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
105
1.19
−2.97
−1.88
−12
°C/W
W
A
A
A
RqJA
PD
ID
ID
IDM
62.5
2.0
−3.85
−2.43
−15
°C/W
W
A
A
A
Operating and Storage Temperature Range
TJ, Tstg
−55 to +150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = −20 Vdc, VGS = −4.5 Vdc,
Peak IL = −5.0 Apk, L = 28 mH, RG = 25 W)
EAS
350
mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 Seconds
TL
G
1
8
2
7
6
3
4
5
C
C
D
D
TOP VIEW
MARKING DIAGRAM
& PIN ASSIGNMENTS
Anode
Anode
1
8
2
7
3
Source
4
6
5
Cathode
Cathode
Drain
Drain
(Top View)
E2P102
A
Y
WW
G
= Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
°C
260
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Minimum FR−4 or G−10 PCB, Steady State.
2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single
sided), Steady State.
3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single
sided), t ≤ 10 seconds.
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
May, 2006− Rev. 3
S
SO−8
CASE 751
STYLE 18
Gate
Thermal Resistance, Junction−to−Ambient
(Note 3)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 100°C
Pulsed Drain Current (Note 4)
A
1
E2P102
AYWW
G
Symbol
Drain−to−Source Voltage
© Semiconductor Components Industries, LLC, 2006
A
8
1
Device
Package
Shipping†
NTMSD2P102LR2
SO−8
2500/Tape & Reel
NTMSD2P102LR2G
SO−8
2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMSD2P102LR2/D
NTMSD2P102LR2
SCHOTTKY MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Peak Repetitive Reverse Voltage
DC Blocking Voltage
VRRM
VR
20
V
Average Forward Current (Note 5)
(Rated VR, TA = 100°C)
IO
1.0
A
Peak Repetitive Forward Current
(Note 5) (Rated VR, Square Wave, 20 kHz, TA = 105°C)
IFRM
2.0
A
Non−Repetitive Peak Surge Current (Note 5)
(Surge Applied at Rated Load Conditions, Half−Wave, Single Phase, 60 Hz)
IFSM
20
A
Rating
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 6)
Symbol
Characteristic
Min
Typ
Max
−20
−
−
−12.7
−
−
−
−
−
−
−1.0
−25
−
−
−2.0
−
−
−100
−
−
100
−0.5
−
−0.90
2.5
−1.5
−
−
−
−
0.070
0.100
0.110
0.090
0.130
0.150
−
4.2
−
Ciss
−
550
750
Coss
−
200
300
Crss
−
100
175
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(VGS = 0 Vdc, ID = −250 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = −16 Vdc, VGS = 0 Vdc, TJ = 25°C)
(VDS = −16 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
Zero Gate Voltage Drain Current
(VGS = 0 Vdc, VDS = −20 Vdc, TJ = 25°C)
IDSS
Gate−Body Leakage Current
(VGS = −10 Vdc, VDS = 0 Vdc)
IGSS
Gate−Body Leakage Current
(VGS = +10 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
mAdc
nAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = −250 mAdc)
Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−State Resistance
(VGS = −4.5 Vdc, ID = −2.4 Adc)
(VGS = −2.7 Vdc, ID = −1.2 Adc)
(VGS = −2.5 Vdc, ID = −1.2 Adc)
RDS(on)
Forward Transconductance
(VDS = −10 Vdc, ID = −1.2 Adc)
Vdc
mV/°C
W
gFS
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = −16 Vdc, VGS = 0 Vdc, f = 1.0 MHz)
Reverse Transfer Capacitance
5. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds.
6. Handling precautions to protect against electrostatic discharge is mandatory.
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2
pF
NTMSD2P102LR2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) (Note 7)
Characteristic
Symbol
Min
Typ
Max
Unit
td(on)
−
10
20
ns
tr
−
35
65
td(off)
−
33
60
SWITCHING CHARACTERISTICS (Notes 8 & 9)
Turn−On Delay Time
Rise Time
(VDD = −10 Vdc, ID = −2.4 Adc,
VGS = −4.5 Vdc, RG = 6.0 W)
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
(VDD = −10 Vdc, ID = −1.2 Adc,
VGS = −2.7 Vdc, RG = 6.0 W)
Turn−Off Delay Time
tf
−
29
55
td(on)
−
15
−
tr
−
40
−
td(off)
−
35
−
tf
−
35
−
Qtot
−
10
18
Fall Time
Total Gate Charge
(VDS = −16 Vdc, VGS = −4.5 Vdc,
ID = −2.4 Adc)
Gate−Source Charge
ns
nC
Qgs
−
1.5
−
Qgd
−
5.0
−
VSD
−
−
−0.88
−0.75
−1.0
−
Vdc
trr
−
37
−
ns
ta
−
16
−
tb
−
21
−
QRR
−
0.025
−
Gate−Drain Charge
BODY−DRAIN DIODE RATINGS (Note 8)
Diode Forward On−Voltage
(IS = −2.4 Adc, VGS = 0 Vdc)
(IS = −2.4 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse Recovery Time
(IS = −2.4 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms)
Reverse Recovery Stored Charge
mC
SCHOTTKY RECTIFIER ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 8)
VF
Maximum Instantaneous Forward Voltage
IF = 1.0 Adc
IF = 2.0 Adc
IR
Maximum Instantaneous Reverse Current
VR = 20 Vdc
Maximum Voltage Rate of Change
VR = 20 Vdc
dV/dt
7. Handling precautions to protect against electrostatic discharge is mandatory.
8. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%.
9. Switching characteristics are independent of operating junction temperature.
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TJ = 25°C
TJ = 125°C
0.47
0.58
0.39
0.53
TJ = 25°C
TJ = 125°C
0.05
10
10,000
V
mA
V/ms
NTMSD2P102LR2
4
5
VGS = −10 V
VGS = −4.5 V
VGS = −2.5 V
3
TJ = 25°C
−ID, DRAIN CURRENT (AMPS)
−ID, DRAIN CURRENT (AMPS)
VGS = −2.1 V
VGS = −1.9 V
2
VGS = −1.7 V
1
VGS = −1.5 V
3
2
TJ = 25°C
1
TJ = 100°C
0
2
4
6
8
1
10
3
2.5
Figure 2. Transfer Characteristics.
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics.
0.15
0.1
0.05
0
2
4
6
8
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.12
TJ = 25°C
0.1
VGS = −2.7 V
0.08
VGS = −4.5 V
0.06
0.04
1
1.5
2
2.5
3
3.5
4
4.5
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage.
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage.
1.6
1000
VGS = 0 V
ID = −2.4 A
VGS = −4.5 V
TJ = 125°C
−IDSS, LEAKAGE (nA)
100
1.2
1
0.8
0.6
−50
2
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TJ = 25°C
1.4
1.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.2
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 55°C
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VDS > = −10 V
4
TJ = 100°C
10
TJ = 25°C
1
0.1
0.01
−25
0
25
75
50
100
125
TJ, JUNCTION TEMPERATURE (°C)
150
0
Figure 5. On−Resistance Variation with
Temperature.
4
8
12
16
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current
vs. Voltage.
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4
20
C, CAPACITANCE (pF)
VDS = 0 V
1200
VGS = 0 V
Ciss
TJ = 25°C
900
Crss
Ciss
600
300
Coss
Crss
0
10
5
0
−VGS −VDS
5
10
15
20
5
20
18
QT
16
4
14
3
12
VGS
Q1
10
Q2
8
2
6
1
ID = −2.4 A
TJ = 25°C
VDS
4
2
0
0
0
2
4
6
8
12
10
14
Qg, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1500
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
NTMSD2P102LR2
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
100
td (off)
tr
t, TIME (ns)
t, TIME (ns)
VDD = −10 V
ID = −1.2 A
VGS = −2.7 V
100
tr
td
(on)
10
tf
td (off)
VDD = −10 V
ID = −2.4 A
VGS = −4.5 V
td (on)
1.0
10
10
1.0
tf
100
1.0
100
RG, GATE RESISTANCE (OHMS)
10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Resistive Switching Time Variation
versus Gate Resistance
−IS, SOURCE CURRENT (AMPS)
2
1.6
VGS = 0 V
TJ = 25°C
di/dt
IS
trr
1.2
ta
tb
TIME
0.8
0.25 IS
tp
IS
0.4
0
0.4
0.5
0.6
0.7
0.8
0.9
1
Figure 12. Diode Reverse Recovery Waveform
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 11. Diode Forward Voltage
versus Current
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NTMSD2P102LR2
Rthja(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
1
D = 0.5
0.2
0.1
Normalized to R∅ja at Steady State (1 inch pad)
0.1
0.0125 W 0.0563 W
0.110 W
0.273 W
0.113 W
0.436 W
2.93 F
152 F
261 F
0.05
0.02
0.01
0.021 F
0.137 F
1.15 F
Single Pulse
0.01
1E−03
1E−02
1E−01
1E+00
1E+03
1E+02
1E+03
t, TIME (s)
Figure 13. FET Thermal Response
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
10
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
10
TJ = 125°C
1.0
85°C
25°C
−40°
C
0.1
TJ = 125°C
85°C
1.0
25°C
0.1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
0.2
0.4
0.6
0.8
1.0
1.2
VF, MAXIMUM INSTANTANEOUS
FORWARD VOLTAGE (VOLTS)
Figure 14. Typical Forward Voltage
Figure 15. Maximum Forward Voltage
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1.4
NTMSD2P102LR2
IR , REVERSE CURRENT (AMPS)
1E−2
TJ = 125°C
1E−3
85°C
1E−4
1E−5
25°C
1E−6
1E−7
0
5.0
15
10
20
IR, MAXIMUM REVERSE CURRENT (AMPS)
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
1E−1
TJ = 125°C
1E−2
1E−3
1E−4
25°C
1E−5
1E−6
0
5.0
VR, REVERSE VOLTAGE (VOLTS)
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 17. Maximum Reverse Current
1000
100
10
15
10
20
1.6
dc
FREQ = 20 kHz
1.4
1.2
SQUARE WAVE
1.0
Ipk/Io = p
0.8
Ipk/Io = 5.0
0.6
Ipk/Io = 10
0.4
Ipk/Io = 20
0.2
0
0
20
VR, REVERSE VOLTAGE (VOLTS)
40
60
0.6
dc
SQUARE
WAVE
Ipk/Io = p
Ipk/Io = 5.0
0.4
Ipk/Io = 10
Ipk/Io = 20
0.3
0.2
0.1
0
0
0.5
100
120
Figure 19. Current Derating
0.7
0.5
80
TA, AMBIENT TEMPERATURE (°C)
Figure 18. Typical Capacitance
PFO, AVERAGE POWER DISSIPATION (WATTS)
C, CAPACITANCE (pF)
TYPICAL CAPACITANCE AT 0 V = 170 pF
5.0
20
VR, REVERSE VOLTAGE (VOLTS)
Figure 16. Typical Reverse Current
0
15
10
1.0
1.5
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 20. Forward Power Dissipation
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2.0
140
160
NTMSD2P102LR2
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1.0
D = 0.5
0.2
0.1
0.1
NORMALIZED TO RqJA AT STEADY STATE (1″ PAD)
0.05
0.02
0.0031 W
CHIP
JUNCTION 0.0014 F
0.01
0.01
0.0154 W
0.1521 W 0.4575 W 0.3719 W
0.0082 F
0.1052 F
SINGLE PULSE
2.7041 F 158.64 F
AMBIENT
0.001
1.0E−05
1.0E−04
1.0E−03
1.0E−02
1.0E−01
t, TIME (s)
1.0E+00
Figure 21. Schottky Thermal Response
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8
1.0E+01
1.0E+02
1.0E+03
NTMSD2P102LR2
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
FETKY is a trademark of International Rectifier Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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NTMSD2P102R2/D