ONSEMI NTHD4N02FT1G

NTHD4N02F
Power MOSFET and
Schottky Diode
20 V, 3.9 A, N−Channel, with 3.7 A
Schottky Barrier Diode, ChipFET
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Features
•
•
•
•
•
Leadless SMD Package Featuring a MOSFET and Schottky Diode
40% Smaller than TSOP−6 Package with Better Thermals
Super Low Gate Charge MOSFET
Ultra Low VF Schottky
Pb−Free Package is Available
MOSFET
60 m @ 4.5 V
20 V
Converters
• Li−Ion Battery Applications in Cell Phones, PDAs, DSCs, and Media
•
3.9 A
80 m @ 2.5 V
Applications
• Fast Switching, low Gate Charge for Dc to Dc Buck and Boost
ID MAX
RDS(on) TYP
V(BR)DSS
SCHOTTKY DIODE
VR MAX
VF TYP
IF MAX
20 V
0.35 V
3.7 A
Players
Load Side Switching
D1
A
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
20
V
Gate−to−Source Voltage
VGS
±12
V
ID
2.9
A
Continuous Drain
Current
Steady
State
TJ = 25°C
TJ = 85°C
2.1
t5s
TJ = 25°C
3.9
tp=10 s
Pulsed Drain Current
Power Dissipation
IDM
12
A
PD
0.91
W
Steady
State
TJ = 25°C
TJ = 85°C
0.36
t5s
TJ = 25°C
2.1
Continuous Source Current (Body Diode)
Operating Junction and Storage
Temperature
2.6
A
TJ, TSTG
−55 to 150
°C
DC Blocking Voltage
Symbol
Value
Unit
VRRM
20
V
VR
20
V
IF
2.2
A
3.7
A
TJ = 25°C
25 C
t5s
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
 Semiconductor Components Industries, LLC, 2004
1
8
2
7
6
1
S
3
G
4
5
MARKING
DIAGRAM
C
1
C
2
D
3
C2 M
Parameter
October, 2004 − Rev. 7
A
°C
260
(TJ = 25°C unless otherwise noted)
Peak Repetitive Reverse Voltage
C
SCHOTTKY DIODE
ChipFET
CASE 1206A
STYLE 3
A
TL
SCHOTTKY DIODE MAXIMUM RATINGS
Steady
State
S1
N−Channel MOSFET
PIN
CONNECTIONS
IS
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Average Rectified
Forward Current
G1
4
D
C2 = Specific Device Code
M = Month Code
ORDERING INFORMATION
Package
Shipping†
NTHD4N02FT1
ChipFET
3000/Tape & Reel
NTHD4N02FT1G
ChipFET
(Pb−Free)
3000/Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTHD4N02F/D
NTHD4N02F
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
Junction−to−Ambient – Steady State (Note 1)
RJA
110
°C/W
Junction−to−Ambient – t 5 s
RJA
60
°C/W
1. Surface Mounted on FR4 Board using 1 in sq. pad size (Cu area = 1.27 in sq.
[1 oz] including traces).
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
VGS = 0 V, ID = 250 A
20
28
Max
Units
1.0
A
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V
VDS = 16 V
V
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = 12 V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250 A
1.2
V
Drain−to−Source On−Resistance
RDS(on)
( )
VGS = 4.5, ID = 2.9 A
0.058
0.080
VGS = 2.5, ID = 2.3 A
0.077
0.115
VDS = 10 V, ID = 2.9 A
6.0
TJ = 25°C
TJ = 85°C
5.0
100
nA
ON CHARACTERISTICS (Note 2)
Forward Transconductance
gFS
0.6
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Total Gate Charge
VGS = 0 V,
V f = 1.0
1 0 MHz,
MH
VDS = 10 V
QG(TOT)
VGS = 4
4.5
5V
V, VDS = 10 V
V,
ID = 2.9 A
pF
180
300
80
130
30
50
2.6
4.0
nC
ns
Gate−to−Source Charge
QGS
0.6
Gate−to−Drain Charge
QGD
0.7
td(ON)
5.0
10
9.0
18
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
tr
Turn−Off Delay Time
Fall Time
td(OFF)
VGS = 4.5 V, VDD = 16 V,
ID = 2.9 A, RG = 2.5 tf
10
20
3.0
6.0
0.8
1.15
DRAIN−SOURCE DIODE CHARACTERISTICS (Note 2)
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, IS = 2.6 A
V
ns
12.5
9.0
VGS = 0 V, IS = 2.6 A,
dIS/dt = 100 A/s
3.5
QRR
6.0
nC
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Max
Units
Maximum Instantaneous Forward Voltage
VF
IF = 0.1 A
0.31
V
IF = 1.0 A
0.365
Maximum Instantaneous Reverse Current
IR
VR = 10 V
0.75
VR = 20 V
2.5
Halfwave, Single Pulse, 60 Hz
23
Non−Repetitive Peak Surge Current
IFSM
2. Pulse Test: Pulse Width 300 s, Duty Cycle 2%.
3. Switching characteristics are independent of operating junction temperatures.
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2
Min
Typ
mA
A
NTHD4N02F
TYPICAL MOSFET PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
8
VGS = 5 V to 3 V
VGS = 2.4 V
2V
2.2 V
6
4
1.8 V
2
1.6 V
1.4 V
4
2
TC = −55°C
100°C
0
1
2
3
4
5
6
7
8
9
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0
0.5
1
1.5
2
2.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
6
25°C
0
0.15
ID = 2.9 A
TJ = 25°C
0.1
0.05
0
0
3
5
2
4
1
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
6
3
0.1
TJ = 25°C
VGS = 2.5 V
0.07
VGS = 4.5 V
0.04
1
3
7
5
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.7
100
ID = 2.9 A
VGS = 4.5 V
VGS = 0 V
1.5
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
VDS ≥ 10 V
TJ = 25°C
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
8
1.3
1.1
TJ = 100°C
10
0.9
0.7
−50
1
−25
0
25
50
75
100
125
150
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
20
NTHD4N02F
TYPICAL MOSFET PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VDS = 0 V
20
5
VGS = 0 V
TJ = 25°C
QT
4.5
300
16
4
3.5
CRSS
12
3
2.5
200
2
ID = 2.9 A
TJ = 25°C
QGD
QGS
1.5
100
COSS
8
1
4
0.5
0
10
5
VGS
0
VDS
5
10
15
20
0
0
0
0.5
1.5
2
2.5
3
QG, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
100
7
IS, SOURCE CURRENT (AMPS)
VDD = 16 V
ID = 2.9 A
VGS = 4.5 V
t, TIME (ns)
1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
CISS
VGS, GATE−TO−SOURCE VOLTAGE (V)
400
tr
10
td(off)
td(on)
tf
1
1
10
RG, GATE RESISTANCE ()
100
VGS = 0 V
TJ = 25°C
6
5
4
3
2
1
0
0.3
0.45
0.6
0.75
0.9
1.05
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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4
1.2
NTHD4N02F
TYPICAL SCHOTTKY PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
10
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
10
TJ = 150°C
1
TJ = 25°C
TJ = −55°C
0.1
0.00
0.40
0.20
0.60
TJ = 150°C
1
TJ = 25°C
0.1
0.00
0.80
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
0.80
IR, MAXIMUM REVERSE CURRENT (AMPS)
Figure 12. Maximum Forward Voltage
100E−3
IR, REVERSE CURRENT (AMPS)
0.60
VF, MAXIMUM INSTANTANEOUS FORWARD
VOLTAGE (VOLTS)
Figure 11. Typical Forward Voltage
100E−3
TJ = 150°C
10E−3
TJ = 100°C
1E−3
100E−6
TJ = 150°C
10E−3
TJ = 100°C
1E−3
100E−6
TJ = 25°C
10E−6
TJ = 25°C
10E−6
20
10
VR, REVERSE VOLTAGE (VOLTS)
0
PFO, AVERAGE POWER DISSIPATION (WATTS)
freq = 20 kHz
dc
2.5
square wave
2
Ipk/Io = 1.5
Ipk/Io = 5
1
Ipk/Io = 10
0.5
Ipk/Io = 20
0
25
45
65
85
105
125
20
Figure 14. Maximum Reverse Current
3.5
3
10
VR, REVERSE VOLTAGE (VOLTS)
0
Figure 13. Typical Reverse Current
IO, AVERAGE FORWARD CURRENT (AMPS)
0.40
0.20
145
165
TL, LEAD TEMPERATURE (°C)
1.4
Ipk/Io = 1.2
square wave
dc
Ipk/Io = 5
1
Ipk/Io = 10
0.8
Ipk/Io = 20
0.6
0.4
0.2
0
0
Figure 15. Current Derating
0.5
1
1.5
2
2.5
3
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 16. Forward Power Dissipation
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5
3.5
NTHD4N02F
PACKAGE DIMENSIONS
ChipFET
CASE 1206A−03
ISSUE E
A
8
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM
PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN
HORIZONTAL AND VERTICAL SHALL NOT EXCEED
0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE
BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND
BOTTOM LEAD SURFACE.
7. 1206A−01 AND 1206A−02 OBSOLETE. NEW
STANDARD IS 1206A−03.
M
6
K
5
S
5
6
7
8
4
3
2
1
B
1
2
3
L
4
D
J
G
STYLE 3:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
C
DIM
A
B
C
D
G
J
K
L
M
S
A
A
S
G
D
D
C
C
0.05 (0.002)
MILLIMETERS
MIN
MAX
2.95
3.10
1.55
1.70
1.00
1.10
0.25
0.35
0.65 BSC
0.10
0.20
0.28
0.42
0.55 BSC
5 ° NOM
2.00
1.80
INCHES
MIN
MAX
0.116
0.122
0.061
0.067
0.039
0.043
0.010
0.014
0.025 BSC
0.004
0.008
0.011
0.017
0.022 BSC
5 ° NOM
0.072
0.080
SOLDER FOOTPRINTS*
2.032
0.08
2.032
0.08
0.457
0.018
0.711
0.028
0.635
0.025
1.092
0.043
0.178
0.007
0.457
0.018
0.711
0.028
0.66
0.026
0.254
0.010
0.66
0.026
SCALE 20:1
mm inches
Style 3
Basic
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your
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NTHD4N02F/D