TI SN75112DR

SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
D
D
D
D
D
D
D
D
D
SN55110A . . . J OR W PACKAGE
SN75110A . . . D, N, OR NS PACKAGE
SN75112 . . . D OR N PACKAGE
(TOP VIEW)
Improved Stability Over Supply Voltage and
Temperature Ranges
Constant-Current Outputs
High Speed
Standard Supply Voltages
High Output Impedance
High Common-Mode Output Voltage Range
. . . –3 V to 10 V
TTL-Input Compatibility
Inhibitor Available for Driver Selection
Glitch Free During Power Up/Power Down
SN75112 and External Circuit Meets or
Exceeds the Requirements of CCITT
Recommendation V.35
1A
1B
1C
2C
2A
2B
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC+
1Y
1Z
VCC–
D
2Z
2Y
SN55110A . . . FK PACKAGE
(TOP VIEW)
1B
1A
NC
V CC+
1Y
D
description/ordering information
1C
NC
2C
NC
2A
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
1Z
NC
VCC–
NC
D
2B
GND
NC
2Y
2Z
The SN55110A, SN75110A, and SN75112 dual
line drivers have improved output current
regulation with supply-voltage and temperature
variations. In addition, the higher current of the
SN75112 (27 mA) allows data to be transmitted
over longer lines. These drivers offer optimum
performance when used with the SN55107A,
SN75107A, and SN75108A line receivers.
4
NC – No internal connection
ORDERING INFORMATION
PDIP (N)
0°C to 70°C
Tube of 25
SOIC (D)
SOP (NS)
–55°C
55°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
SN75110AN
SN75110AN
SN75112N
SN75112N
Tube of 50
SN75110AD
Reel of 2500
SN75110ADR
Tube of 50
SN75112D
Reel of 2500
SN75112DR
Reel of 2000
SN75110ANSR
SN75110A
SN55110AJ
SN55110AJ
SNJ55110AJ
SNJ55110AJ
SNJ55110AW
CDIP (J)
Tube of 25
CFP (W)
Tube of 150
SNJ55110AW
LCCC (FK)
Tube of 55
SNJ55110AFK
SN75110A
SN75112A
SNJ55110AFK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
description/ordering information (continued)
These drivers feature independent channels with common voltage supply and ground terminals. The significant
difference between the three drivers is in the output-current specification. The driver circuits feature a constant
output current that is switched to either of two output terminals by the appropriate logic levels at the input
terminals. The output current can be switched off (inhibited) by low logic levels on the enable inputs. The output
current is nominally 12 mA for the ’110A devices, and is 27 mA for the SN75112.
The enable/inhibit feature is provided so the circuits can be used in party-line or data-bus applications. A strobe
or inhibitor (enable D), common to both drivers, is included for increased driver-logic versatility. The output
current in the inhibited mode, IO(off), is specified so that minimum line loading is induced when the driver is used
in a party-line system with other drivers. The output impedance of the driver in the inhibited mode is very high.
The output impedance of a transistor is biased to cutoff.
The driver outputs have a common-mode voltage range of –3 V to 10 V, allowing common-mode voltage on the
line without affecting driver performance.
All inputs are diode clamped and are designed to satisfy TTL-system requirements. The inputs are tested at
2 V for high-logic-level input conditions and 0.8 V for low-logic-level input conditions. These tests ensure
400-mV noise margin when interfaced with TTL Series 54/74 devices.
The SN55110A is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN75110A and SN75112 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each driver)
LOGIC
INPUTS
A
B
X
X
ENABLE
INPUTS
OUTPUTS†
C
D
Y
Z
X
L
X
Off
Off
X
X
L
Off
Off
Off
L
X
H
H
On
X
L
H
H
On
Off
H
H
H
H
Off
On
H = high level, L = low level, X = irrelevant
† When using only one channel of the line drivers,
the other channel should be inhibited and/or have
its outputs grounded.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
schematic (each driver)
VCC+
14
+
C
D
2.2 kΩ
NOM
3, 4
10
To Other
Driver
–
–
+
2.2 kΩ
NOM
8, 13
9, 12
A
B
GND
Y
Z
1, 5
2, 6
7
–
Common to Both Drivers
+
VCC–
11
–
+
. . . VCC+ Bus
–
. . . VCC– Bus
–
To Other Driver
Pin numbers shown are for the D, J, N, NS, and W packages.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage: VCC+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
VCC– (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to 12 V
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Package thermal impedance, θJC (see Notes 4 and 5): FK package . . . . . . . . . . . . . . . . . . . . . . . . 13.42°C/W
J package . . . . . . . . . . . . . . . . . . . . . . . . . 15.05°C/W
W package . . . . . . . . . . . . . . . . . . . . . . . . 14.65°C/W
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package . . . . . . . . . . . . . . . . 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or NS package . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case
temperature is PD = (TJ(max) – TC)/θJC. Operating at the absolute maximum TJ of 150°C can affect reliability.
5. The package thermal impedance is calculated in accordance with MIL-STD-883.
recommended operating conditions (see Note 6)
SN75110A
SN75112
SN55110A
MIN
VCC+
VCC–
VIH
VIL
NOM
MAX
MIN
NOM
UNIT
MAX
Supply voltage
4.5
5
5.5
4.75
5
5.25
V
Supply voltage
–4.5
–5
–5.5
–4.75
–5
–5.25
V
Positive common-mode output voltage
0
10
0
10
V
Negative common-mode output voltage
0
–3
0
–3
V
High-level input voltage
2
0.8
V
0.8
V
TA
Operating free-air temperature
–55
125
0
70
NOTE 6: When using only one channel of the line drivers, the other channel should be inhibited and/or have its outputs grounded.
°C
4
Low-level output current
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN55110A
SN75110A
TEST CONDITIONS†
PARAMETER
MIN
VIK
Input clamp voltage
IO(on)
O( )
On state output current
On-state
VCC± = MIN,
VCC± = MAX,
SN75112
TYP‡
MAX
–0.9
12
IL = –12 mA
VO = 10 V
MAX
–1.5
–0.9
–1.5
15
27
40
24
28
32
mA
15
27
100
100
µA
1
1
2
2
40
40
80
80
–3
–3
–6
–6
VCC = MIN to MAX,,
VO = –1 V to 1 V, TA = 25°C
VCC± = MIN,
VCC± = MIN,
VO = –3 V
VO = 10 V
6.5
UNIT
TYP‡
12
MIN
V
IO(off)
Off-state output current
A, B, or C inputs
II
Input current
at maximum
input voltage
IIH
High-level
g
input current
A, B, or C inputs
IIL
Low-level
input current
A, B, or C inputs
ICC+(on)
Supply current from VCC
with driver enabled
VCC± = MAX,
A and B inputs at 0.4 V,
C and D inputs at 2 V
23
35
25
40
mA
ICC–(on)
CC ( )
Supplyy current from VCC
CC–
with driver enabled
VCC± = MAX,
A and B inputs at 0
0.4
4V
V,
C and D inputs at 2 V
–34
34
–50
50
–65
65
–100
100
mA
ICC+(off)
Supply current from VCC–
with driver inhibited
VCC± = MAX,
A, B, C, and D inputs at 0.4 V
21
30
mA
ICC–(off)
Supply current from VCC±
with driver inhibited
VCC± = MAX,
A, B, C, and D inputs at 0.4 V
–17
–32
mA
D input
D input
D input
VCC± = MAX
MAX,
VI = 5
5.5
5V
VCC± = MAX
MAX,
VI = 2
2.4
4V
VCC± = MAX
MAX,
VI = 0
0.4
4V
mA
µA
mA
† For conditions shown as MIN or MAX, use appropriate value specified under recommended operating conditions.
‡ All typical values are at VCC+ = 5 V, VCC– = –5 V, TA = 25°C.
switching characteristics, VCC± = ±5 V, TA = 25°C (see Figure 1)
PARAMETER§
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y or Z
pF
CL = 40 pF,
RL = 50 Ω
Ω,
tPLH
tPHL
C or D
Y or Z
CL = 40 pF,
pF
RL = 50 Ω
Ω,
TEST CONDITIONS
MIN
TYP
MAX
9
15
9
15
16
25
13
25
UNIT
ns
ns
§ tPLH = Propagation delay time, low- to high-level output
tPHL = Propagation delay time, high- to low-level output
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
VCC+
Input A or B
VCC–
50 Ω
890 Ω
890 Ω
Output Y
RL = 50 Ω
CL = 40 pF
(see Note A)
RL = 50 Ω
CL = 40 pF
(see Note A)
Pulse
Generator
(See Note B)
Output Z
Pulse
Generator
(See Note B)
To Other Driver
Input C or D
50 Ω
See Note C
TEST CIRCUIT
3V
50%
Input A or B
50%
0V
tw1
tw2
3V
50%
Enable C or D
50%
0V
tPLH
tPHL
tPLH
tPHL
Off
Output Y
50%
50%
50%
50%
On
tPHL
tPLH
Off
Output Z
50%
50%
On
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generators have the following characteristics: ZO = 50 Ω, tr = tf = 10 ± 5 ns, tw1 = 500 ns, PRR ≤ 1 MHz, tw2 = 1 µs, PRR ≤
500 kHz.
C. For simplicity, only one channel and the enable connections are shown.
Figure 1. Test Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
TYPICAL CHARACTERISTICS
SN75112
ON-STATE OUTPUT CURRENT
vs
NEGATIVE SUPPLY VOLTAGE
SN55110A, SN75110A
ON-STATE OUTPUT CURRENT
vs
NEGATIVE SUPPLY VOLTAGE
35
VCC+ = 4.5 V
VO = –3 V
TA = 25°C
12
I O(on) – On-State Output Current – mA
I O(on) – On-State Output Current – mA
14
10
8
6
4
2
0
–3
–4
–5
–6
–7
30
VCC+ = 4.5 V
VO = –3 V
TA = 25°C
25
20
15
10
5
0
–3
VCC– – Negative Supply Voltage – V
–4
–5
–6
–7
VCC– – Negative Supply Voltage – V
Figure 2
Figure 3
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
APPLICATION INFORMATION
special pulse-control circuit
Figure 4 shows a circuit that can be used as a pulse-generator output or in many other testing applications.
INPUT
A
High
Low
OUTPUTS
Z
Y
Off
On
On
Off
5V
2
3
3
4
VCC+
Y
A
Input
1
5
2
5
1
6
4
6
B
2.5 V
Z
C
D
3
1/2 ’110A
or SN75112
GND
4
5
2
VCC–
6
1
–5 V
To Other Logic and
Strobe Inputs
Output
Input Pulse
0V
Switch
Position
1
2
3
4
Output Pulse
6
0V
Figure 4. Pulse-Control Circuit
8
5
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN55110A, SN75110A, SN75112
DUAL LINE DRIVERS
SLLS106F – DECEMBER 1975 – REVISED JULY 2003
APPLICATION INFORMATION
using the SN75112 as a CCITT-recommended V.35 line driver
The SN75112 dual line driver, the SN75107A dual line receiver, and some external resistors can be used to
implement the data-interchange circuit of CCITT recommendation V.35 (1976) modem specification. The circuit
of one channel is shown in Figure 1 and meets the requirement of the interface as specified by Appendix 11
of CCITT V.35 and is summarized in Table 1 (V.35 has been replaced by ITU V.11).
Table 1. CCITT V.35 Electrical Requirements
GENERATOR
MIN
MAX
UNIT
50
150
Ω
Resistance to ground, R
135
165
Ω
Differential output voltage, VOD
440
660
mV
Source impedance, Zsource
10% to 90% rise time, tr
40
ns
0.01 × ui†
or
Common-mode output voltage, VOC
–0.6
0.6
LOAD (RECEIVER)
MIN
MAX
Input impedance, ZI
90
110
Ω
Resistance to ground, R
135
165
† ui = unit interval or minimum signal-element pulse duration
Ω
5V
V
UNIT
5V
5V
R3
390 Ω
100 pF
1/2 SN75112
13 1Y
1
1A
2
Data In
1B
10
Enable
1C
R1
1.3 kΩ
R5
75 Ω
12
1Z
3
100 pF
R4
390 Ω
All resistors are 5%, 1/4 W.
Strobe
R6
50 Ω
R8
125 Ω
R7
50 Ω
6
1A 1
2
1B
4 Data Out
1Y
5 Enable
1G
1/2 SN75107A
R2
1.3 kΩ
5V
Figure 5. CCITT-Recommended V.35 Interface Using the SN75112 and SN75107A
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
MECHANICAL DATA
MCFP002A – JANUARY 1995 – REVISED FEBRUARY 2002
W (R-GDFP-F14)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.260 (6,60)
0.235 (5,97)
0.045 (1,14)
0.026 (0,66)
0.008 (0,20)
0.004 (0,10)
0.080 (2,03)
0.045 (1,14)
0.280 (7,11) MAX
1
0.019 (0,48)
0.015 (0,38)
14
0.050 (1,27)
0.390 (9,91)
0.335 (8,51)
0.005 (0,13) MIN
4 Places
7
8
0.360 (9,14)
0.250 (6,35)
0.360 (9,14)
0.250 (6,35)
4040180-2 / C 02/02
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL
MPDI002C – JANUARY 1995 – REVISED DECEMBER 20002
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
1.060
(26,92)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
MS-100
VARIATION
AA
BB
AC
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
C
AD
8
0.070 (1,78)
0.045 (1,14)
0.045 (1,14)
0.030 (0,76)
D
D
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
14/18 PIN ONLY
20 pin vendor option
D
4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A).
D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
POST OFFICE BOX 655303
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1
MECHANICAL DATA
MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047/E 09/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
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