TI TL034CDR

TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
D
D
D
Direct Upgrades for the TL06x Low-Power
BiFETs
Low Power Consumption . . .
6.5 mW/Channel Typ
On-Chip Offset-Voltage Trimming for
Improved DC Performance
(1.5 mV, TL031A)
D
D
Higher Slew Rate and Bandwidth Without
Increased Power Consumption
Available in TSSOP for Small Form-Factor
Designs
description
The TL03x series of JFET-input operational amplifiers offer improved dc and ac characteristics over the TL06x
family of low-power BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision
grades as low as 1.5 mV (TL031A) for greater accuracy in dc-coupled applications. The Texas Instruments
improved BiFET process and optimized designs also yield improved bandwidths and slew rates without
increased power consumption. The TL03x devices are pin-compatible with the TL06x and can be used to
upgrade existing circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors without
sacrificing the output drive associated with bipolar amplifiers. This higher input impedance makes the TL3x
amplifiers better suited for interfacing with high-impedance sensors or very low-level ac signals. These devices
also feature inherently better ac response than bipolar or CMOS devices having comparable power
consumption.
The TL03x family has been optimized for micropower operation, while improving on the performance of the
TL06x series. Designers requiring significantly faster ac response should consider the Excalibur TLE206x
family of low-power BiFET operational amplifiers.
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to
observe common-mode input-voltage limits and output swing when operating from a single supply. DC biasing
of the input signal is required, and loads should be terminated to a virtual-ground node at midsupply. The TI
TLE2426 integrated virtual-ground generator is useful when operating BiFET amplifiers from single supplies.
The TL03x devices are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply
systems, the TI LinCMOS families of operational amplifiers (TLC prefix) are recommended. When moving from
BiFET to CMOS amplifiers, particular attention should be paid to slew rate, bandwidth requirements, and output
loading.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Excalibur is a trademark of Texas Instruments.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032x, TL032Ax
D, JG, OR P PACKAGE
(TOP VIEW)
1
8
2
7
3
6
4
5
NC
VCC+
OUT
OFFSET N2
1OUT
1IN–
1IN+
VCC –
TL031M, TL031AM
FK PACKAGE
(TOP VIEW)
5
17
6
16
7
15
8
14
9 10 11 12 13
7
3
6
4
5
VCC+
2OUT
2IN–
2IN+
NC
1OUT
NC
VCC+
NC
NC
VCC+
NC
OUT
NC
NC
1IN–
NC
1IN+
NC
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
NC
2OUT
NC
2IN–
NC
NC – No internal connection
2
1OUT
1IN–
1IN+
VCC+
2IN+
2IN–
2OUT
POST OFFICE BOX 655303
1
14
2
13
3
12
4
11
5
10
6
9
7
8
4OUT
4IN–
4IN+
VCC–
3IN+
3IN–
3OUT
TL034M, TL034AM
FK PACKAGE
(TOP VIEW)
NC
VCC–
NC
2IN+
NC
3 2 1 20 19
18
8
2
TL032M, TL032AM
FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
NC
NC
4
NC
VCC–
NC
OFFSET N2
NC
NC
IN–
NC
IN+
NC
1
1IN–
1OUT
NC
4OUT
4IN–
OFFSET N1
IN–
IN+
VCC–
TL034x, TL034Ax
D, J, N, OR PW PACKAGE
(TOP VIEW)
• DALLAS, TEXAS 75265
1IN+
NC
VCC+
NC
2IN+
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2IN–
2OUT
NC
3OUT
3IN–
TL031x, TL031Ax
D, JG, OR P PACKAGE
(TOP VIEW)
4IN+
NC
VCC–
NC
3IN+
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
0°C to 70°C
–40°C to 85°C
–55°C to 125°C
VIOMAX
AT 25°C
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(N)
PLASTIC
DIP
(P)
TSSOP
(PW)
0.8 mV
TL031ACD
TL032ACD
—
—
—
—
TL031ACP
TL032ACP
—
1.5 mV
TL031CD
TL032CD
TL034ACD
—
—
—
TL034ACN
TL031CP
TL032CP
—
4 mV
TL034CD
—
—
—
TL034CN
0.8 mV
TL031AID
TL032AID
—
—
—
1.5 mV
TL031ID
TL032ID
TL034AID
—
—
—
TL034AIN
4 mV
TL034ID
—
—
—
TL034IN
0.8 mV
TL031AMD
TL032AMD
TL031AMFK
TL032AMFK
—
TL031AMJG
TL032AMJG
1.5 mV
TL031MD
TL032MD
TL034AMD
TL031MFK
TL032MFK
TL034AMFK
TL034AMJ
4 mV
TL034MD
TL034MFK
TL034MJ
TL031MJG
TL032MJG
—
—
—
TL034AMN
TL034MN
—
TL034CPW
TL031AIP
TL032AIP
—
TL031IP
TL032IP
—
—
—
TL031AMP
TL032AMP
—
TL031MP
TL032MP
—
—
—
The D and PW packages are available taped and reeled and are indicated by adding an R suffix to device type (e.g., TL034CDR or TL034CPWR).
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
symbol (each amplifier)
IN–
–
IN+
+
OUT
equivalent schematic (each amplifier)
VCC+
Q14
Q5
Q2
D1
Q3
R4
Q6
IN+
IN–
JF1
Q11
OUT
Q8 Q10
JF2
R7
Q17
R3
Q15
R6
C1
Q1
Q4
See Note A OFFSET N1
OFFSET N2
Q12
JF3
Q9
R8
Q7
R1
R2
Q16
R5
Q13
VCC–
NOTE A: OFFSET N1 and OFFSET N2 are available only on the TL031, TL031A.
4
JF4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage (see Note 1): VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Input voltage, VI (any input) (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA
Output current, IO (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40 mA
Total current into VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
Total current out of VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
Duration of short-circuit current at (or below) 25°C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Package thermal impedance, θJA (see Note 5): D package (8 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
D package (14 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Lead temperature 1,6 mm (1 /16 inch) from case for 10 seconds: D, N, P, or PW package . . . . . . . . . 260°C
Lead temperature 1,6 mm (1 /16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . 300°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–.
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
5. The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
FK
1375 mW
11.0 mW/°C
880 mW
715 mW
275 mW
J
1375 mW
11.0 mW/°C
880 mW
715 mW
275 mW
JG
1050 mW
8.4 mW/°C
672 mW
546 mW
210 mW
recommended operating conditions
VCC±
Supply voltage
VIC
Common mode input voltage
Common-mode
TA
Operating free-air temperature
VCC± = ±5 V
VCC± = ±15 V
POST OFFICE BOX 655303
C SUFFIX
I SUFFIX
M SUFFIX
MIN
MAX
MIN
MAX
MIN
MAX
±5
±15
±5
±15
±5
±15
–1.5
4
–1.5
4
–1.5
4
–11.5
14
–11.5
14
–11.5
14
0
70
–40
85
–55
125
• DALLAS, TEXAS 75265
UNIT
V
V
°C
5
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL031C and TL031AC electrical characteristics at specified free-air temperature
TL031C, TL031AC
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
Full range†
0.04
VO = 0,, VIC = 0
See Figure 5
25°C
1
100
1
100
70°C
9
200
12
200
VO = 0,, VIC = 0
See Figure 5
25°C
2
200
2
200
70°C
50
400
80
400
µV/°C
25°C
–1.5
to 4
Full range†
–1.5
to 4
RL = 10 kΩ
RL = 10 kΩ
–13.4
to 15.4
–11.5
to 14
3
4.3
13
14
3
4.2
13
14
25
µV/mo
pA
pA
V
V
70°C
3
4.3
13
14
25°C
–3
–4.2
–12.5
–13.9
0°C
–3
–4.1
–12.5
–13.9
70°C
–3
–4.2
–12.5
–14
25°C
4
12
5
14.3
0°C
3
11.1
4
13.5
V/mV
70°C
4
13.3
1012
5
15.2
1012
Ω
4
pF
ri
Input resistance
25°C
ci
Input capacitance
25°C
VO = 0, RS = 50 Ω
–11.5
to 14
0°C
Large-signal
L
i
l diff
differential
ti l
voltage am
lification§
amplification
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
–3.4
to 5.4
25°C
AVD
RL = 10 kΩ
mV
1.8
0.04
VICR
Supply-voltage
Su
ly voltage
rejection ratio
( VCC±/∆V
(∆V
/ VIO)
3.8
0.8
25°C
Common-mode input
voltage range
kSVR
0.34
59
5.9
Input bias current
Common-mode
C
d
rejection ratio
2.8
71
7.1
IIB
CMRR
0.41
2.5
25°C to
70°C
Input offset current
Maximum
M
i
negative
ti peak
k
output
out
ut voltage swing
25°C
UNIT
1.5
TL031AC
IIO
VOM–
0.5
4.5
59
5.9
VO = 0,
VIC =0,
RS = 50 Ω
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
3.5
71
7.1
Input offset voltage
long-term drift‡
VOM+
0.54
25°C to
70°C
VO = 0,
VIC =0,
0
RS = 50 Ω
IO
TL031AC
25°C
Full range†
VCC± = ±15 V
MIN
TYP
MAX
TL031C
Temperature coefficient of
input offset voltage
aV
TL031C
TA
VCC± = ±5 V
MIN
TYP
MAX
5
25°C
70
87
75
94
0°C
70
87
75
94
70°C
70
87
75
94
25°C
75
96
75
96
0°C
75
96
75
96
70°C
75
96
75
96
V
dB
dB
† Full range is 0°C to 70°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL031C and TL031AC electrical characteristics at specified free-air temperature (continued)
TL031C, TL031AC
PARAMETER
PD
ICC
TEST CONDITIONS
Total power dissipation
Supply current
VO = 0,
No load
VO = 0,
No load
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
25°C
1.9
2.5
6.5
8.4
0°C
1.8
2.5
6.3
8.4
TA
70°C
1.9
2.5
6.3
8.4
25°C
192
250
217
280
0°C
184
250
211
280
70°C
189
250
210
280
UNIT
mW
µA
TL031C and TL031AC operating characteristics at specified free-air temperature
TL031C, TL031AC
PARAMETER
SR+
SR–
tr
tf
TEST CONDITIONS
Positive
P
iti slew
l
rate
t att
unity gain†
Negative
N
ti slew
l
rate
t att
unity gain†
Rise time
Fall time
Overshoot factor
TL031C
Vn
Equivalent
q
input
noise voltage
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
25°C
2
1.5
2.9
0°C
1.8
1
2.6
70°C
2.2
1.5
3.2
25°C
3.9
1.5
5.1
0°C
3.7
1.5
5
70°C
4
1.5
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
138
132
0°C
134
127
70°C
150
142
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figure 1
25°C
138
132
0°C
134
127
70°C
150
142
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
11%
5%
0°C
10%
4%
70°C
12%
6%
61
61
41
41
61
61
41
41
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
f = 10 Hz
RS = 20 Ω
See Figure 3
TL031AC
f = 1 kHz
f = 10 Hz
f = 1 kHz
25°C
25°C
In
f = 1 kHz
25°C
0.003
0.003
1
1.1
Unity-gain bandwidth
VI = 10 mV
RL = 10 kΩ, CL = 25 pF
See Figure 4
25°C
B1
0°C
1
1.1
70°C
1
1
VI = 10 mV
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
25°C
61°
65°
0°C
61°
65°
70°C
60°
64°
Phase margin at unity gain
V/µs
V/µs
5
Equivalent input noise
current
φm
UNIT
ns
ns
nV/√H
nV/√Hz
60
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL031I and TL031AI electrical characteristics at specified free-air temperature
TL031I, TL031AI
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL031I
TL031AI
TA
VCC± = ±5 V
MIN
TYP
MAX
25°C
0.54
Full range†
VCC± = ±15 V
MIN
TYP
MAX
3.5
0.5
5.3
25°C
0.41
Full range†
1.5
3.3
2.8
0.34
4.6
UNIT
0.8
mV
2.6
TL031I
25°C to
85°C
65
6.5
TL031AI
25°C to
85°C
65
6.5
62
6.2
25°C
0 04
0.04
0 04
0.04
62
6.2
Temperature coefficient
of
input
in
ut offset voltage
VO = 0,
VIC = 0
0,
RS = 50 Ω
Input offset voltage
g
long-term drift‡
VO = 0,
VIC = 0
0,
RS = 50 Ω
IIO
Input offset current
VO = 0,, VIC = 0
See Figure 5
25°C
1
100
1
100
pA
85°C
0.02
0.45
0.02
0.45
nA
IIB
Input bias current
VO = 0,, VIC = 0
See Figure 5
25°C
2
200
2
200
pA
85°C
0.2
0.9
0.2
0.9
nA
aV
IO
VICR
VOM+
VOM–
AVD
Common-mode input
voltage range
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
M i
ti peak
k
Maximum
negative
out
ut voltage swing
output
Large-signal
L
i
l diff
differential
ti l
voltage am
lification§
amplification
RL = 10 kΩ
RL = 10 kΩ
RL = 10 kΩ
µV/°C
25°C
–1.5
to 4
Full range†
–1.5
to 4
–3.4
to 5.4
25°C
3
4.3
13
14
–40°C
3
4.1
13
14
85°C
3
4.4
13
14
25°C
–3
–4.2
–12.5
–13.9
–40°C
–3
–4.1
–12.5
–13.8
85°C
–3
–4.2
–12.5
–14
14.3
V
12
5
3
8.4
4
11.6
85°C
4
5
15.3
1012
Ω
4
pF
25°C
Input capacitance
25°C
5
CMRR
Common-mode
C
d
rejection ratio
RS = 50 Ω
V
4
Input resistance
VO = 0,
V
25°C
ci
Supply-voltage
Su
ly voltage
rejection ratio
( VCC±/∆V
(∆V
/ VIO)
µV/mo
–40°C
ri
kSVR
–13.4
to 15.4
–11.5
to 14
13.5
1012
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
–11.5
to 14
25
25°C
70
87
75
94
–40°C
70
87
75
94
85°C
70
87
75
94
25°C
75
96
75
96
–40°C
75
96
75
96
85°C
75
96
75
96
V/mV
dB
dB
† Full range is –40°C to 85°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL031I and TL031AI electrical characteristics at specified free-air temperature (continued)
TL031I, TL031AI
PARAMETER
PD
ICC
TEST CONDITIONS
Total power dissipation
Supply current
VO = 0,
No load
VO = 0,
No load
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
25°C
1.9
2.5
6.5
8.4
–40°C
1.4
2.5
5.4
8.4
85°C
1.9
2.5
6.2
8.4
TA
25°C
192
250
217
280
–40°C
144
250
181
280
85°C
189
250
207
280
UNIT
mW
µA
TL031I and TL031AI operating characteristics at specified free-air temperature
TL031I, TL031AI
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
TYP
MAX
MIN
SR+
SR–
tr
tf
Positive
P
iti slew
l
rate
t att
unity gain†
N
ti slew
l
t att unity
it
Negative
rate
gain†
Rise time
Fall time
Overshoot factor
Vn
In
B1
φm
Equivalent
input
noise voltage
TL031I
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
kΩ CL = 100 pF
F
RL = 10 kΩ,
See Figure 1
25°C
2
–40°C
85°C
VCC± = ±15 V
MIN
TYP
MAX
1.5
2.9
1.6
1
2.1
2.3
1.5
3.3
25°C
3.9
1.5
5.1
–40°C
3.3
1.5
4.8
85°C
4.1
1.5
4.9
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
138
132
–40°C
132
123
85°C
154
146
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figure 1
25°C
138
132
–40°C
132
123
85°C
154
146
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
11%
5%
–40°C
12%
5%
85°C
13%
7%
61
61
41
41
61
61
41
41
f = 10 Hz
RS = 20 Ω
See Figure 3
TL031AI
f = 1 kHz
f = 10 Hz
f = 1 kHz
25°C
25°C
Equivalent
q
input noise
current
f = 1 kHz
25°C
0 003
0.003
0 003
0.003
25°C
1
1.1
Unity-gain bandwidth
VI = 10 mV
RL = 10 kΩ, CL = 25 pF
See Figure 4
–40°C
1
1.1
85°C
0.9
1
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
25°C
61°
65°
–40°C
60°
65°
85°C
60°
64°
Phase margin at unity gain
UNIT
V/µs
V/µs
ns
ns
nV/√H
nV/√Hz
60
pA/√H
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL031M and TL031AM electrical characteristics at specified free-air temperature
TL031M, TL031AM
PARAMETER
VIO
aV
Input offset voltage
Temperature coefficient of
IO
input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL031M
TL031AM
TA
VCC± = ±5 V
MIN
TYP
MAX
25°C
0.54
Full range†
VCC± = ±15 V
MIN
TYP
MAX
3.5
0.5
6.5
25°C
0.41
Full range†
1.5
4.5
2.8
0.34
5.8
UNIT
0.8
mV
3.8
TL031M
25°C to
125°C
5.1
4.3
TL031AM
25°C to
125°C
5.1
4.3
25°C
0.04
0.04
µV/°C
Input offset voltage
long-term drift‡
VO = 0,
VIC = 0,
RS = 50 Ω
IIO
Input offset current
VO = 0,, VIC = 0
See Figure 5
25°C
1
100
1
100
pA
125°C
0.2
10
0.2
10
nA
IIB
Input bias current
VO = 0,, VIC = 0
See Figure 5
25°C
2
200
2
200
pA
125°C
7
20
8
20
nA
VICR
VOM+
VOM–
AVD
25°C
Common-mode input
voltage range
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
M i
ti peak
k
Maximum
negative
out
ut voltage swing
output
Large-signal
L
i
l diff
differential
ti l
voltage am
lification§
amplification
Full range†
RL = 10 kΩ
RL = 10 kΩ
RL = 10 kΩ
–1.5
to 4
–3.4
to 5.4
–1.5
to 4
25°C
3
4.3
13
14
–55°C
3
4.1
13
14
125°C
3
4.4
13
14
25°C
–3
–4.2
–12.5
–13.9
–55°C
–3
–4
–12.5
–13.8
125°C
–3
–4.3
–12.5
–14
12
5
14.3
3
7.1
4
10.4
125°C
3
4
15
12
10
Ω
4
pF
25°C
Input capacitance
25°C
5
CMRR
Common-mode
C
d
rejection ratio
PD
Total power dissipation
VO = 0,
RS = 50 Ω
No load
V
4
Input resistance
VO = 0,
V
25°C
ci
Supply-voltage
Su
ly voltage
rejection ratio
(∆VCC±/∆VIO)
V
–55°C
ri
kSVR
–13.4
to 15.4
–11.5
to 14
12.9
1012
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
–11.5
to 14
µV/mo
25°C
70
87
75
94
–55°C
70
87
70
94
125°C
70
87
70
94
25°C
75
96
75
96
–55°C
75
96
75
95
125°C
75
96
75
96
V/mV
dB
dB
25°C
1.9
2.5
6.5
8.4
–55°C
1.1
2.5
4.7
8.4
125°C
1.8
2.5
5.8
8.4
mW
† Full range is –55°C to 125°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL031M and TL031AM electrical characteristics at specified free-air temperature (continued)
TL031M, TL031AM
PARAMETER
ICC
TEST CONDITIONS
Supply current
VO = 0,
No load
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
25°C
192
250
217
280
–55°C
114
250
156
280
125°C
178
250
197
280
UNIT
µA
TL031M and TL031AM operating characteristics at specified free-air temperature
TL031M, TL031AM
PARAMETER
SR+
SR–
tr
tf
TEST CONDITIONS
Positive
P
iti slew
l
rate
t att
unity gain†
Negative
N
ti slew
l
rate
t att
unity gain†
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Rise time
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figure 1
Fall time
VI(PP) = ±10 mV,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Overshoot factor
TL031M
Vn
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
Equivalent
q
input
noise voltage
f = 10 Hz
RS = 20 Ω
See Figure 3
TL031AM
f = 1 kHz
f = 10 Hz
f = 1 kHz
In
Equivalent
q
input noise
current
f = 1 kHz
B1
Unity-gain bandwidth
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
See Figure 4
φm
Phase margin at unity gain
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
25°C
2
1.5
2.9
–55°C
1.4
1
1.9
125°C
2.4
1
3.5
25°C
3.9
1.5
5.1
–55°C
3.2
1
4.6
125°C
4.1
1
25°C
138
132
–55°C
142
123
125°C
166
158
25°C
138
132
–55°C
142
123
125°C
166
158
25°C
11%
5%
–55°C
16%
6%
125°C
14%
8%
61
61
41
41
61
61
41
41
25°C
0 003
0.003
0 003
0.003
25°C
1
1.1
–55°C
1
1.1
25°C
25°C
UNIT
V/µs
V/µs
4.7
125°C
0.9
0.9
25°C
61°
65°
–55°C
57°
64°
125°C
59°
62°
ns
ns
nV/√H
nV/√Hz
pA/√H
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032C and TL032AC electrical characteristics at specified free-air temperature
TL032C, TL032AC
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
TL032C
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL032AC
0.04
25°C
1
100
1
100
70°C
9
200
12
200
25°C
2
200
2
200
70°C
50
400
80
400
VO = 0,,
See Figure 5
VIC = 0
25°C
Common-mode input
voltage range
Full range†
Large signal
Large-signal
differential voltage
amplification§
RL = 10 kΩ
µV/°C
–1.5
to 4
–3.4
to 5.4
–1.5
to 4
3
4.3
13
14
µV/mo
pA
pA
V
V
0°C
3
4.2
13
14
3
4.3
13
14
25°C
–3
–4.2
–12.5
–13.9
0°C
–3
–4.1
–12.5
–13.9
70°C
–3
–4.2
–12.5
–14
25°C
4
12
5
14.3
0°C
3
11.1
4
13.5
70°C
4
5
15.2
1012
Ω
14
pF
Input resistance
25°C
Input capacitance
25°C
5
CMRR
Common-mode
C
d
rejection ratio
V
VCC± = ±5 V to ±15 V,
VO = 0, RS = 50 Ω
25
70°C
ci
Supply-voltage
Su
ly voltage
rejection ratio
( VCC±//∆V
(∆V
VIO)
–13.4
to 15.4
25°C
ri
kSVR
–11.5
to 14
–11.5
to 14
13.3
1012
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
mV
1.8
0.04
Input bias current
RL = 10 kΩ
3.8
0.8
25°C
IIB
Maximum negative
peak output voltage
swing
0.39
10.8
VIC = 0
AVD
Full range†
2.8
11.5
VO = 0,,
See Figure 5
RL = 10 kΩ
0.53
2.5
25°C to
70°C
Input offset current
VOM–
25°C
UNIT
1.5
TL032AC
IIO
VOM+
4.5
10.8
VO = 0,
VIC = 0,
RS = 50 Ω
Maximum positive
ositive
peak output voltage
swing
0.57
3.5
11.5
Input offset voltage
long-term drift‡
VICR
0.69
25°C
Full range†
25°C to
70°C
VO = 0,
VIC = 0
0,
RS = 50 Ω
IO
VCC± = ±15 V
MIN
TYP
MAX
TL032C
Temperature
coefficient of input
offset voltage
aV
TA
VCC± = ±5 V
MIN
TYP
MAX
25°C
70
87
75
94
0°C
70
87
75
94
70°C
70
87
75
94
25°C
75
96
75
96
0°C
75
96
75
96
70°C
75
96
75
96
V
V/mV
dB
dB
† Full range is 0°C to 70°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032C and TL032AC electrical characteristics at specified free-air temperature (continued)
TL032C, TL032AC
PARAMETER
TEST CONDITIONS
Total
T
t l power di
dissipation
i ti
(two amplifiers)
am lifiers)
PD
VO = 0,
No load
ICC
Supplyy current
(two amplifiers)
VO = 0
0,
VO1/VO2
Crosstalk attenuation
AVD = 100 dB
No load
VCC± = ±5 V
MIN
TYP
MAX
TA
VCC± = ±15 V
MIN
TYP
MAX
25°C
3.8
5
13
17
0°C
3.7
5
12.7
17
70°C
3.8
5
12.6
17
0°C
368
500
422
560
70°C
378
500
420
560
25°C
120
UNIT
mW
µA
120
dB
VCC± = ±15 V
MIN
TYP
MAX
UNIT
TL032C and TL032AC operating characteristics at specified free-air temperature
TL032C, TL032AC
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
TYP
MAX
MIN
SR+
SR–
tr
tf
Positive
P
iti slew
l
rate
t att unity
it
gain†
N
ti slew
l
t att unity
it
Negative
rate
gain†
Rise time
Fall time
Overshoot factor
TL032C
Vn
Equivalent
q
input
noise voltage
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
kΩ CL = 100 pF
F
RL = 10 kΩ,
See Figure 1
25°C
1.2
1.5
2.9
0°C
1.8
1
2.6
70°C
2.2
1.5
3.2
25°C
3.9
1.5
5.1
0°C
3.7
1.5
5
70°C
4
1.5
5
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
138
132
0°C
134
127
70°C
150
142
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
138
132
0°C
134
127
70°C
150
142
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
11%
5%
0°C
10%
4%
70°C
12%
6%
49
49
41
41
49
49
f = 10 Hz
RS = 20 Ω
See Figure 3
TL032AC
f = 1 kHz
f = 10 Hz
25°C
41
41
In
Equivalent input noise current
f = 1 kHz
25°C
0.003
0.003
1
1.1
Unity-gain bandwidth
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
See Figure 4
25°C
B1
0°C
1
1.1
70°C
1
1
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
25°C
61°
65°
0°C
61°
65°
70°C
60°
64°
φm
Phase margin at unity gain
f = 1 kHz
25°C
V/µs
V/µs
ns
ns
nV/√Hz
√
60
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032I and TL032AI electrical characteristics at specified free-air temperature
TL032I, TL032AI
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL032I
TL032AI
5.3
25°C
0.53
Full range†
1.5
3.3
2.8
0.39
4.6
0.8
mV
2.6
25°C to
85°C
11.4
10.8
25°C
0.04
0.04
25°C
1
100
1
100
pA
85°C
0.02
0.45
0.02
0.45
nA
25°C
2
200
2
200
pA
85°C
0.2
0.9
0.3
0.9
nA
VO = 0,,
See Figure 5
VIC = 0
IIB
Input bias current
VO = 0,,
See Figure 5
VIC = 0
VICR
Common-mode input
voltage range
25°C
Full range†
µV/°C
–1.5
to 4
–3.4
to 5.4
–1.5
to 4
–11.5
to 14
–13.4
to 15.4
–11.5
to 14
25°C
3
4.3
13
14
–40°C
3
4.2
13
14
85°C
3
4.4
13
14
25°C
–3
–4.2
–12.5
–13.9
–40°C
–3
–4.1
–12.5
–13.8
85°C
–3
–4.2
–12.5
–14
–40°C
3
8.4
4
11.6
4
5
25°C
13.5
1012
15.3
1012
25°C
5
Maximum positive
ositive
peak output voltage
swing
RL = 10 kΩ
VOM–
Maximum negative
peak output voltage
swing
RL = 10 kΩ
AVD
Large-signal
g
g
differential
RL = 10 kΩ
voltage amplification§
85°C
ri
Input resistance
ci
Input capacitance
CMRR
Common-mode
C
d
rejection ratio
Supply-voltage
Su
ly voltage
rejection ratio
( VCC±/∆V
(∆V
/ VIO)
3.5
TL032AI
Input offset current
kSVR
0.57
Full range†
10.8
VO = 0,
VIC = 0,
RS = 50 Ω
VOM+
0.69
25°C
UNIT
11.4
Input offset voltage
long-term drift‡
IIO
VCC± = ±15 V
MIN
TYP
MAX
TL032I
VO = 0,
VIC = 0
0,
RS = 50 Ω
IO
VCC± = ±5 V
MIN
TYP
MAX
25°C to
85°C
Temperature
coefficient of input
offset voltage
aV
TA
4
25°C
70
87
75
94
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
–40°C
70
87
75
94
85°C
70
87
75
94
V
VCC± = ±5 V to ±15 V,
VO = 0, RS = 50 Ω
25°C
75
96
75
96
–40°C
75
96
75
96
85°C
75
96
75
96
25
µV/mo
V
V
V
V/mV
Ω
pF
dB
dB
† Full range is –40°C to 85°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V
14
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032I and TL032AI electrical characteristics at specified free-air temperature (continued)
TL032I, TL032AI
PARAMETER
PD
ICC
VO1/VO2
TEST CONDITIONS
Total power
ower
dissipation
(two amplifiers)
VO = 0,
Supply
S
l currentt
(two amplifiers)
am lifiers)
VO = 0,
Crosstalk
attenuation
No load
No load
AVD = 100 dB
VCC± = ±5 V
MIN
TYP
MAX
TA
VCC± = ±15 V
MIN
TYP
MAX
25°C
3.8
5
13
17
–40°C
2.9
5
10.9
17
85°C
3.7
5
12.4
17
25°C
384
500
434
560
–40°C
288
500
362
560
85°C
372
500
414
560
25°C
120
UNIT
mW
µA
120
dB
VCC± = ±15 V
MIN
TYP
MAX
UNIT
TL032I and TL032AI operating characteristics at specified free-air temperature
TL032I, TL032AI
PARAMETER
SR+
SR–
tr
tf
TEST CONDITIONS
Positive
P
iti slew
l
rate
t att unity
it
gain†
Negative
N
ti slew
l
rate
t att unity
it
gain†
RL = 10 kΩ, CL = 100 pF
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Rise time
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figure 1
Fall time
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Overshoot factor
TL032I
Vn
RL = 10 kΩ, CL = 100 pF
Equivalent
q
input
noise voltage
f = 10 Hz
RS = 20 Ω
See Figure 3
TL032AI
f = 1 kHz
f = 10 Hz
f = 1 kHz
TA
VCC± = ±5 V
MIN
TYP
MAX
25°C
2
1.5
2.9
–40°C
1.6
1
2.1
85°C
2.3
1.5
3.3
25°C
3.9
1.5
5.1
–40°C
3.3
1.5
4.8
85°C
4.1
1.5
25°C
138
132
–40°C
132
123
85°C
154
146
25°C
138
132
–40°C
132
123
85°C
154
146
25°C
11%
5%
–40°C
12%
5%
85°C
13%
7%
49
49
41
41
49
49
41
41
25°C
0.003
0.003
25°C
25°C
Equivalent input noise
current
f = 1 kHz
1
1.1
Unity-gain bandwidth
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
See Figure 4
25°C
B1
–40°C
1
1.1
85°C
0.9
1
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
25°C
61°
65°
–40°C
61°
65°
85°C
60°
64°
Phase margin at unity gain
V/µs
4.9
In
φm
V/µs
ns
ns
nV/√Hz
√
60
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
15
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032M and TL032AM electrical characteristics at specified free-air temperature
TL032M, TL032AM
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL032M
TL032AM
0.53
Full range†
5.8
25°C
0.04
0.04
25°C
1
125°C
25°C
125°C
IIB
Input bias current
VIC = 0
VICR
Common-mode input
voltage range
25°C
Full range†
RL = 10 kΩ
RL = 10 kΩ
–1.5
to 4
100
1
0.2
10
2
200
7
20
–3.4
to 5.4
–1.5
to 4
0.2
10
nA
2
200
pA
8
20
nA
–13.4
to 15.4
25°C
3
4.3
13
14
3
4.1
13
14
125°C
3
4.4
13
14
V
V
25°C
–3
–4.2
–12.5
–13.9
–55°C
–3
–4
–12.5
–13.8
125°C
–3
–4.3
–12.5
–14
25°C
4
12
5
14.3
–55°C
3
7.1
4
10.4
125°C
3
4
15
1012
Ω
4
pF
Input resistance
25°C
12.9
1012
ci
Input capacitance
25°C
5
CMRR
Common-mode
C
d rejection
j ti
ratio
VCC± = ±5 V to ±15 V,
V
VO = 0, RS = 50 Ω
pA
–55°C
ri
Su ly voltage
Supply-voltage
rejection ratio
( VCC±/∆V
(∆V
/ VIO)
–11.5
to 14
µV/mo
100
–11.5
to 14
Large-signal
L
i
l diff
differential
ti l
voltage am
amplification
lification§
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
mV
µV/°C
AVD
RL = 10 kΩ
0.8
3.8
9.7
VO = 0,,
See Figure 5
kSVR
0.39
UNIT
1.5
4.5
2.8
9.7
VIC = 0
Maximum
M
i
negative
ti peak
k
out
ut voltage swing
output
6.5
25°C
25°C to
125°C
VO = 0,,
See Figure 5
VOM–
3.5
TL032AM
Input offset current
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
0.57
Full range†
9.7
VO = 0,
VIC = 0,
RS = 50 Ω
VOM+
0.69
25°C
9.7
Input offset voltage
long-term drift‡
IIO
VCC± = ±15 V
MIN
TYP
MAX
TL032M
VO = 0,
VIC = 0
0,
RS = 50 Ω
IO
VCC± = ±5 V
MIN
TYP
MAX
25°C to
125°C
Temperature coefficient
of input offset voltage
aV
TA
25°C
70
87
75
94
–55°C
70
87
70
94
125°C
70
87
70
94
25°C
75
96
75
96
–55°C
75
95
75
95
V
V/mV
dB
dB
125°C
75
96
75
96
† Full range is –55°C to 125°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL032M and TL032AM electrical characteristics at specified free-air temperature (continued)
TL032M, TL032AM
PARAMETER
PD
ICC
VO1/VO2
TEST CONDITIONS
Total power
ower dissi
dissipation
ation
(two amplifiers)
VO = 0,
VO = 0,
Supply
S
l currentt
(two amplifiers)
am lifiers)
VO = 0,
Crosstalk attenuation
No load
No load
AVD = 100 dB
TA
VCC± = ±5 V
MIN
TYP
MAX
25°C
3.8
5
–55°C
2.3
125°C
3.6
VCC± = ±15 V
MIN
TYP
MAX
13
17
5
9.4
17
5
11.8
17
25°C
384
500
434
560
–55°C
228
500
312
560
125°C
356
500
394
560
25°C
120
120
UNIT
mW
µA
dB
TL032M and TL032AM operating characteristics at specified free-air temperature
TL032M, TL032AM
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
TYP
MAX
MIN
SR+
SR–
tr
tf
Positive
P
iti slew
l
rate
t att unity
it
gain†
Negative
N
ti slew
l
rate
t att unity
it
gain†
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figure 1
Fall time
Overshoot factor
Vn
RL = 10 kΩ,
kΩ CL = 100 pF
F
See and Figure 1
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Rise time
Equivalent
input noise
voltage
RL = 10 kΩ,
kΩ CL = 100 pF
F
See and Figure 1
TL032M
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
f = 10 Hz
RS = 20 Ω
See Figure 3
TL032AM
f = 1 kHz
f = 10 Hz
f = 1 kHz
In
Equivalent input noise
current
f = 1 kHz
B1
Unity-gain bandwidth
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
See Figure 4
φm
Phase margin at unity gain
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
VCC± = ±15 V
MIN
TYP
MAX
25°C
2
1.5
2.9
–55°C
1.4
1
1.9
125°C
2.4
1
3.5
25°C
3.9
1.5
5.1
–55°C
3.2
1
4.6
125°C
4.1
1
4.7
25°C
138
132
–55°C
142
123
125°C
166
58
25°C
138
132
–55°C
142
123
125°C
166
158
25°C
11%
5%
–55°C
16%
6%
125°C
14%
8%
49
49
41
41
49
49
41
41
25°C
0.003
0.003
25°C
1
1.1
–55°C
1
1.1
25°C
25°C
125°C
0.9
0.9
25°C
61°
65°
–55°C
57°
64°
125°C
59°
62°
UNIT
V/µs
V/µs
ns
ns
√
nV/√Hz
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL034C and TL034AC electrical characteristics at specified free-air temperature
TL034C, TL034AC
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL034C
TL034AC
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
0.91
0.79
25°C
Full range†
6
8.2
25°C
0.7
Full range†
4
6.2
3.5
0.58
5.7
1.5
TL034C
11.6
12
TL034AC
25°C to
70°C
11.6
12
25°C
0.04
0.04
VO = 0,
VIC = 0
0,
RS = 50 Ω
Input offset voltage
long-term drift‡
VO = 0,
VIC = 0,
RS = 50 Ω
IIO
Input offset current
VO = 0,, VIC = 0
See Figure 5
25°C
1
100
1
100
70°C
9
200
12
200
IIB
Input bias current
VO = 0,, VIC = 0
See Figure 5
25°C
2
200
2
200
70°C
50
400
80
400
VICR
Common-mode input
voltage range
IO
VOM+
VOM–
AVD
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
Maximum
M
i
negative
ti peak
k
out
ut voltage swing
output
Large-signal
L
i
l diff
differential
ti l
voltage am
amplification
lification§
25°C
Full range†
RL = 10 kΩ
RL = 10 kΩ
RL = 10 kΩ
µV/°C
–1.5
to 4
–3.4
to 5.4
–1.5
to 4
3
4.3
13
14
0°C
3
4.2
13
14
70°C
3
4.3
13
14
25°C
–3
–4.2
–12.5
–13.9
µV/mo
pA
pA
V
V
V
0°C
–3
–4.1
–12.5
–13.9
–3
–4.2
–12.5
–14
25°C
4
12
5
14.3
0°C
3
11.1
4
13.5
70°C
4
5
15.2
1012
Ω
14
pF
Input resistance
25°C
Input capacitance
25°C
5
CMRR
Common-mode
C
d
rejection ratio
VO = 0, RS = 50 Ω
25
70°C
ci
kSVR
–13.4
to 15.4
25°C
ri
Su ly voltage
Supply-voltage
rejection ratio
( VCC±//∆V
(∆V
VIO)
–11.5
to 14
–11.5
to 14
13.3
1012
VIC = VICRmin,
VO = 0,
RS = 50 Ω
mV
3.7
25°C to
70°C
Temperature coefficient
of input offset voltage
aV
UNIT
25°C
70
87
75
94
0°C
70
87
75
94
70°C
70
87
75
94
25°C
75
96
75
96
0°C
75
96
75
96
70°C
75
96
75
96
V/mV
dB
dB
† Full range is 0°C to 70°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V
18
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL034C and TL034AC electrical characteristics at specified free-air temperature (continued)
TL034C, TL034AC
PARAMETER
TEST CONDITIONS
Total
T
t l power di
dissipation
i ti
(two amplifiers)
am lifiers)
PD
Supply
S
l currentt (four
(f
am
lifiers)
amplifiers)
ICC
VO1/VO2
Crosstalk attenuation
VO = 0, No load
VO = 0, No load
AVD = 100
VCC± = ±5 V
MIN
TYP
MAX
TA
VCC± = ±15 V
MIN
TYP
MAX
25°C
7.7
10
26
34
0°C
7.4
10
25.3
34
70°C
7.6
10
25.2
34
25°C
0.77
1
0.87
1.12
0°C
0.74
1
0.85
1.12
70°C
0.76
1
0.84
1.12
25°C
120
UNIT
mW
mA
120
dB
VCC± = ±15 V
MIN
TYP
MAX
UNIT
TL034C and TL034AC operating characteristics at specified free-air temperature
TL034C, TL034AC
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
TYP
MAX
MIN
SR+
SR–
tr
tf
Positive
P
iti slew
l
rate
t att unity
it
gain†
Negative
N
ti slew
l
rate
t att unity
it
gain†
Rise time
Fall time
Overshoot factor
TL034C
Vn
Equivalent
input
q
noise voltage
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
25°C
2
1.5
2.9
0°C
1.8
1
2.6
70°C
2.2
1.5
3.2
25°C
3.9
1.5
5.1
0°C
3.7
1.5
5
70°C
4
1.5
5
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
138
132
0°C
134
127
70°C
150
142
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figure 1
25°C
138
132
0°C
134
127
70°C
150
142
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
25°C
11%
5%
0°C
10%
4%
70°C
12%
6%
83
83
43
43
83
83
f = 10 Hz
RS = 20 Ω
See Figure 3
TL034AC
f = 1 kHz
f = 10 Hz
25°C
43
43
In
Equivalent input noise current
f = 1 kHz
25°C
0.003
0.003
1
1.1
Unity-gain bandwidth
VI = 10 mV
RL = 10 kΩ, CL = 25 pF
See Figure 4
25°C
B1
0°C
1
1.1
70°C
1
1
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
25°C
61°
65°
0°C
61°
65°
70°C
60°
64°
φm
Phase margin at unity gain
f = 1 kHz
25°C
V/µs
V/µs
ns
ns
√
nV/√Hz
60
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL034I and TL034AI electrical characteristics at specified free-air temperature
TL034I, TL034AI
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL034I
TL034AI
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
0.91
0.79
25°C
Full range†
3.6
9.3
25°C
0.7
Full range†
4
7.3
3.5
0.58
6.8
UNIT
1.5
mV
4.8
TL034I
25°C to
85°C
11.5
11.6
TL034AI
25°C to
85°C
11.5
11.6
25°C
0.04
0.04
Temperature coefficient
of input offset voltage
VO = 0, VIC
= 0,
0
RS = 50 Ω
Input offset voltage
long-term drift‡
VO = 0,
VIC = 0,
RS = 50 Ω
IIO
Input offset current
VO = 0,, VIC = 0
See Figure 5
25°C
1
100
1
100
pA
85°C
0.02
0.45
0.02
0.45
nA
IIB
Input bias current
VO = 0,, VIC = 0
See Figure 5
25°C
2
200
2
200
pA
85°C
0.2
0.9
0.3
0.9
nA
aV
IO
VICR
VOM+
25°C
Common-mode input
voltage range
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
Full range†
RL = 10 kΩ
–40°C
3
4.1
13
14
85°C
3
4.4
13
14
25°C
–3
–4.2
–12.5
–13.9
–40°C
–3
–4.1
–12.5
–13.8
85°C
–3
–4.2
–12.5
–14
–40°C
4
12
5
14.3
85°C
3
8.4
1012
4
11.6
1012
ri
Input resistance
25°C
ci
Input capacitance
25°C
Supply-voltage
Su
ly voltage
rejection ratio
( VCC±/ ∆V
(∆V
VIO)
VO = 0, RS = 50 Ω
–11.5
to 14
14
RL = 10 kΩ
kSVR
–13.4
to 15.4
13
Large-signal
g
g
differential
voltage amplification§
VIC = VICRmin,
VO = 0,
RS = 50 Ω
–1.5
to 4
–11.5
to 14
4.3
AVD
Common-mode
C
d
rejection ratio
–3.4
to 5.4
3
RL = 10 kΩ
CMRR
–1.5
to 4
25°C
Maximum negative
peak
output voltage swing
VOM–
µV/°C
5
4
25°C
70
87
75
94
–40°C
70
87
75
94
85°C
70
87
75
94
25°C
75
96
75
96
–40°C
75
96
75
96
25
µV/mo
V
V
V
V/mV
Ω
pF
dB
dB
85°C
75
96
75
96
† Full range is –40°C to 85°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL034I and TL034AI electrical characteristics at specified free-air temperature (continued)
TL034I, TL034AI
PARAMETER
TEST CONDITIONS
Total
T
t l power di
dissipation
i ti
(four amplifiers)
am lifiers)
PD
Supply
S
l currentt
(four amplifiers)
am lifiers)
ICC
VO1/VO2
Crosstalk attenuation
VO = 0, No load
VO = 0, No load
AVD = 100
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
25°C
7.7
10
26
34
–40°C
5.8
10
21.7
34
85°C
7.4
10
24.8
34
25°C
0.77
1
0.87
1.12
–40°C
0.58
1
0.72
1.12
85°C
0.74
1
0.83
1.12
25°C
120
UNIT
mW
mA
120
dB
VCC± = ±15 V
MIN
TYP
MAX
UNIT
TL034I and TL034AI operating characteristics
TL034I, TL034AI
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
TYP
MAX
MIN
SR+
SR–
tr
tf
Positive
P
iti slew
l
rate
t att unity
it
gain†
Negative
N
ti slew
l
rate
t att unity
it
gain†
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Rise time
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Fall time
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Overshoot factor
TL034I
Vn
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
Equivalent
input
q
noise voltage
f = 10 Hz
RS = 20 Ω
See Figure 3
TL034AI
f = 1 kHz
f = 10 Hz
f = 1 kHz
In
Equivalent input noise
current
f = 1 kHz
B1
Unity-gain bandwidth
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
See Figure 4
φm
Phase margin at unity gain
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
25°C
2
1.5
2.9
–40°C
1.6
1
2.1
85°C
2.3
1.5
3.3
25°C
3.9
1.5
5.1
–40°C
3.3
1.5
4.8
85°C
4.1
1.5
4.9
25°C
138
132
–40°C
132
123
85°C
154
146
25°C
138
132
–40°C
132
123
85°C
154
146
25°C
11%
5%
–40°C
12%
5%
85°C
13%
7%
83
83
43
43
83
83
43
43
25°C
0.003
0.003
25°C
1
1.1
–40°C
1
1.1
25°C
25°C
85°C
0.9
1
25°C
61°
65°
–40°C
61°
65°
85°C
60°
64°
V/µs
V/µs
ns
ns
√
nV/√Hz
60
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
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21
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL034M and TL034AM electrical characteristics at specified free-air temperature
TL034M, TL034AM
PARAMETER
VIO
Input offset voltage
TEST CONDITIONS
VO = 0,
VIC = 0
0,
RS = 50 Ω
TL034M
TL034AM
TA
VCC± = ±5 V
MIN
TYP
MAX
VCC± = ±15 V
MIN
TYP
MAX
0.91
3.6
0.78
4
0.7
3.5
0.58
1.5
25°C
Full range†
11
25°C
Full range†
9
8.5
UNIT
mV
6.5
TL034M
25°C to
125°C
10.6
10.9
TL034AM
25°C to
125°C
10.6
10.9
25°C
0.04
0.04
Temperature coefficient of
input offset voltage
VO = 0,
VIC = 0
0,
RS = 50 Ω
Input offset voltage
long-term drift‡
VO = 0,
VIC = 0,
RS = 50 Ω
IIO
Input offset current
VO = 0,, VIC = 0
See Figure 5
25°C
1
100
1
100
pA
125°C
0.2
10
0.2
10
nA
IIB
Input bias current
VO = 0,, VIC = 0
See Figure 5
25°C
2
200
2
200
pA
125°C
7
20
8
20
nA
aV
IO
VICR
VOM+
VOM–
AVD
25°C
Common-mode input
voltage range
Maximum
M
i
positive
iti peak
k
out
ut voltage swing
output
Maximum
M
i
negative
ti peak
k
out
ut voltage swing
output
Large-signal
L
i
l diff
differential
ti l
voltage am
amplification
lification§
Full range†
RL = 10 kΩ
RL = 10 kΩ
RL = 10 kΩ
µV/°C
–1.5
to 4
–3.4
to 5.4
–1.5
to 4
3
4.3
13
14
–55°C
3
4.1
13
14
125°C
3
4.4
13
14
25°C
–3
–4.2
–12.5
–13.9
–55°C
–3
–4
–12.5
–13.8
125°C
–3
–4.3
–12.5
–14
25°C
4
12
5
14.3
–55°C
3
7.1
4
10.4
125°C
3
4
15
12
10
Ω
4
pF
Input resistance
25°C
ci
Input capacitance
25°C
5
CMRR
Common-mode
C
d
rejection ratio
kSVR
VO = 0, RS = 50 Ω
V
25°C
ri
Su ly voltage
Supply-voltage
rejection ratio
( VCC±/∆V
(∆V
/ VIO)
–13.4
to 15.4
–11.5
to 14
12.9
1012
VIC = VICRmin,
i
VO = 0
0, RS = 50 Ω
–11.5
to 14
µV/mo
25°C
70
87
75
94
–55°C
70
87
70
94
125°C
70
87
70
94
25°C
75
96
75
96
–55°C
75
95
75
95
125°C
75
96
75
96
V
V
V/mV
dB
dB
† Full range is –55°C to 125°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V
22
POST OFFICE BOX 655303
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TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TL034M and TL034AM electrical characteristics at specified free-air temperature (continued)
TL034M, TL034AM
PARAMETER
TEST CONDITIONS
Total
T
t l power di
dissipation
i ti
(two amplifiers)
am lifiers)
PD
Supply
S
l currentt
(two amplifiers)
am lifiers)
ICC
VO1/VO2
Crosstalk attenuation
VO = 0,
No load
VO = 0,
No load
AVD = 100
VCC± = ±5 V
MIN
TYP
MAX
TA
VCC± = ±15 V
MIN
TYP
MAX
25°C
7.7
10
26
34
–55°C
4.6
12
18.7
45
125°C
7.1
12
23.6
45
25°C
0.77
1
0.87
1.12
–55°C
0.46
1.2
0.62
1.5
125°C
0.71
1.2
0.79
1.5
25°C
120
120
UNIT
mW
mA
dB
TL034M and TL034AM operating characteristics at specified free-air temperature
TL034M, TL034AM
PARAMETER
TEST CONDITIONS
TA
VCC± = ±5 V
TYP
MAX
MIN
SR+
SR–
tr
tf
Positive
P
iti slew
l
rate
t att unity
it
gain†
Negative
N
ti slew
l
rate
t att unity
it
gain†
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Rise time
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figure 1
Fall time
VI(PP) = ±10 V,
RL = 10 kΩ, CL = 100 pF
See Figures 1 and 2
Overshoot factor
TL034M
Vn
RL = 10 kΩ,
kΩ CL = 100 pF
F
See Figure 1
Equivalent
input
q
noise voltage
f = 10 Hz
RS = 20 Ω
See Figure 3
TL034AM
f = 1 kHz
f = 10 Hz
f = 1 kHz
In
Equivalent input noise
current
f = 1 kHz
B1
Unity-gain bandwidth
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
See Figure 4
φm
Phase margin at unity gain
VI = 10 mV,
RL = 10 kΩ, CL = 25 pF
S Fi
See
Figure 4
VCC± = ±15 V
MIN
TYP
MAX
25°C
2
1.5
2.9
–55°C
1.4
1
1.9
125°C
2.4
1
3.5
25°C
3.9
1.5
5.1
–55°C
3.2
1
4.6
125°C
4.1
1
4.7
25°C
138
132
–55°C
142
123
125°C
166
58
25°C
138
132
–55°C
142
123
125°C
166
158
25°C
11%
5%
–55°C
16%
6%
125°C
14%
8%
83
83
43
43
83
83
43
43
25°C
0.003
0.003
25°C
1
1.1
–55°C
1
1.1
25°C
25°C
125°C
0.9
0.9
25°C
61°
65°
–55°C
57°
64°
125°C
59°
62°
UNIT
V/µs
V/µs
ns
ns
√
nV/√Hz
pA/√Hz
MHz
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V
POST OFFICE BOX 655303
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23
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
PARAMETER MEASUREMENT INFORMATION
VCC+
–
+
VI
Overshoot
VO
90%
VCC–
CL
(see Note A)
RL
10%
tr
NOTE A: CL includes fixture capacitance.
Figure 1. Slew-Rate and Overshoot Test Circuit
Figure 2. Rise Time and Overshoot Waveform
10 kΩ
VCC+
10 kΩ
100 Ω
VCC–
CL
(see Note A)
–
VO
VO
+
VCC+
–
VI
RL
VCC–
RS
RS
NOTE A: CL includes fixture capacitance.
Figure 4. Unity-Gain Bandwidth and
Phase-Margin Test Circuit
Figure 3. Noise-Voltage Test Circuit
VCC+
Ground Shield
–
+
VCC–
Picoammeters
Figure 5. Input-Bias and Offset-Current Test Circuit
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
PARAMETER MEASUREMENT INFORMATION
typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
input bias and offset current
At the picoampere bias current level typical of the TL03x and TL03xA, accurate measurement of the bias current
becomes difficult. Not only does this measurement require a picoammeter, but test-socket leakages easily can
exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses
a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with
no device in the socket. The device is then inserted into the socket and a second test that measures both the
socket leakage and the device input bias current is performed. The two measurements are then subtracted
algebraically to determine the bias current of the device.
noise
With the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage density
is performed at f = 1 kHz, unless otherwise noted.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Distribution of TL03x input offset voltage
6–11
Distribution of TL03x input offset-voltage temperature coefficient
Input bias current vs Common-mode input voltage
15
Input bias current and input offset current vs Free-air temperature
16
Common-mode input voltage vs Supply voltage
17
Common-mode input voltage vs Free-air temperature
Output voltage vs Differential input voltage
18
19, 20
Maximum peak output voltage vs Supply voltage
21
Maximum peak-to-peak output voltage vs Frequency
22
Maximum peak output voltage vs Output current
23, 24
Maximum peak output voltage vs Free-air temperature
25, 26
Large-signal differential voltage amplification vs Load resistance
27
Large-signal differential voltage amplification and Phase shift vs Frequency
28
Large-signal differential voltage amplification vs Free-air temperature
29
Output impedance vs Frequency
30
Common-mode rejection ratio vs Frequency
26
12–14
31, 32
Common-mode rejection ratio vs Free-air temperature
33
Supply-voltage rejection ratio vs Free-air temperature
34
Short-circuit output current vs Supply voltage
35
Short-circuit output current vs Time
36
Short-circuit output current vs Free-air temperature
37
Equivalent input noise voltage vs Frequency (TL031 and TL031A)
38
Equivalent input noise voltage vs Frequency (TL032 and TL032A)
39
Equivalent input noise voltage vs Frequency (TL034 and TL034A)
40
Supply current vs Supply voltage (TL031 and TL031A)
41
Supply current vs Supply voltage (TL032 and TL032A)
42
Supply current vs Supply voltage (TL034 and TL034A)
43
Supply current vs Free-air temperature (TL031 and TL031A)
44
Supply current vs Free-air temperature (TL032 and TL032A)
45
Supply current vs Free-air temperature (TL034 and TL034A)
46
Slew rate vs Load resistance
47, 48
Slew rate vs Free-air temperature
49, 50
Overshoot factor vs Load capacitance
51
Total harmonic distortion vs Frequency
52
Unity-gain bandwidth vs Supply voltage
53
Unity-gain bandwidth vs Free-air temperature
54
Phase margin vs Supply voltage
55
Phase margin vs Load capacitance
56
Phase margin vs Free-air temperature
57
Voltage-follower small-signal pulse response
58
Voltage-follower large-signal pulse response
59, 60
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL031
INPUT OFFSET VOLTAGE
Percentage of Units – %
12
10
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
16
1681 Units Tested From 1 Wafer Lot
VCC± = ±15 V
TA = 25°C
P Package
14
Percentage of Units – %
14
DISTRIBUTION OF TL031A
INPUT OFFSET VOLTAGE
8
6
4
2
0
12
1433 Units Tested From 1 Wafer Lot
VCC± = ±15 V
TA = 25°C
P Package
ÎÎÎÎÎ
10
8
6
4
2
–1.2
–0.6
0
0.6
0
–900
1.2
–600
–300
Figure 6
600
900
DISTRIBUTION OF TL032A
INPUT OFFSET VOLTAGE
6
3
15
Percentage of Amplifiers – %
Percentage of Amplification – %
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
1681 Amplifiers Tested From 1 Wafer Lot
VCC± = ±15 V
TA = 25°C
P Package
9
300
Figure 7
DISTRIBUTION OF TL032
INPUT OFFSET VOLTAGE
12
0
VIO – Input Offset Voltage – µV
VIO – Input Offset Voltage – mV
12
1321 Amplifiers Tested From 1 Wafer Lot
VCC± = ±15 V
TA = 25°C
P Package
9
6
3
0
–1.2
–0.6
0
0.6
1.2
0
–900
–600
–300
0
300
600
900
VIO – Input Offset Voltage – µV
VIO – Input Offset Voltage – mV
Figure 9
Figure 8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
27
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL034
INPUT OFFSET VOLTAGE
9
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
1681 Amplifiers Tested From 1 Wafer Lot
VCC± = ±15 V
TA = 25°C
D Package
6
3
0
–1.2
–0.6
0
0.6
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎ
15
Percentage of Amplifiers – %
Percentage of Amplifiers – %
12
DISTRIBUTION OF TL034A
INPUT OFFSET VOLTAGE
12
1716 Amplifiers Tested From 3 Wafer Lots
VCC± = ±15 V
TA = 25°C
N Package
9
6
3
0
–1.8
1.2
–1.2
VIO – Input Offset Voltage – mV
0.6
Figure 10
1.2
1.8
DISTRIBUTION OF TL032
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT
76 Units Tested From 1 Wafer Lot
VCC± = ±15 V
TA = 25°C to 125°C
P Package
Percentage of Amplifiers – %
Percentage of Units – %
0.6
Figure 11
DISTRIBUTION OF TL031
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT
24
0
VIO – Input Offset Voltage – mV
18
12
6
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
30 160 Amplifiers Tested From 2 Wafer Lots
VCC± = ±15 V
TA = 25°C to 125°C
25 P Package
20
15
10
5
0
–30
–20
–10
0
10
20
30
a V – Input Offset-Voltage Temperature Coefficient – µV/°C
IO
0
–40
–30
–10
0
Figure 13
POST OFFICE BOX 655303
10
20
a V – Temperature Coefficient – µV/°C
IO
Figure 12
28
–20
• DALLAS, TEXAS 75265
30
40
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL034
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT
25
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
10
160 Amplifiers Tested From 2 Wafer Lots
VCC± = ±15 V
TA = 25°C to 125°C
D Package
VCC± = ±15 V
TA = 25°C
IIB
I IB – Input Bias Current – nA
Percentage of Amplifiers – %
30
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE
20
15
10
5
0
–5
5
0
–40
–30
aV
IO
–20
–10
0
10
20
30
–10
–15
40
–10
–5
0
5
10
VIC – Common-Mode Input Voltage – V
– Temperature Coefficient – µV/°C
Figure 15
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT†
vs
FREE-AIR TEMPERATURE
COMMON-MODE INPUT VOLTAGE
vs
SUPPLY VOLTAGE
16
10
1
ÎÎÎ
ÎÎÎ
IIB
0.1
ÎÎ
ÎÎ
IIO
0.01
0.001
25
ÎÎÎÎÎ
ÎÎÎÎÎ
TA = 25°C
VCC± = ±15 V
VO = 0
VIC = 0
VIC
V
IC – Common-Mode Input Voltage – V
I IO – Input Bias and Input Offset Current – nA
IIIB
IB and IIO
Figure 14
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
15
45
65
85
105
TA – Free-Air Temperature – °C
125
ÁÁ
ÁÁ
ÁÁ
12
Positive Limit
8
4
0
ÎÎÎÎÎ
ÎÎÎÎÎ
–4
Negative Limit
–8
–12
–16
0
2
Figure 16
4
6
8
10
12
|VCC±| – Supply Voltage – V
14
16
Figure 17
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
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29
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE†
vs
FREE-AIR TEMPERATURE
20
15
ÎÎÎÎÎ
Positive Limit
10
RL = 1 kΩ
RL = 2 kΩ
RL = 5 kΩ
RL = 10 kΩ
RL = 20 kΩ
1
5
0
–5
ÁÁÁ
ÁÁÁ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
1.5
VO – Output Voltage – V
VIC
V
IC – Common-Mode Input Voltage – V
VCC± = ±15 V
0.5
0
VCC± = ±5 V
TA = 25°C
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎ
ÎÎÎ
–0.5
RL = 20 kΩ
RL = 10 kΩ
RL = 5 kΩ
RL = 2 kΩ
RL = 1 kΩ
–10
–15
ÎÎÎÎÎ
ÎÎÎÎÎ
–1
Negative Limit
–20
–75
–50
–25
0
25
50
75
100
TA – Free-Air Temperature –°C
–1.5
–5
125
–4
–3
Figure 18
VO – Output Voltage – V
1
RL = 10 kΩ
RL = 20 kΩ
RL = 50 kΩ
0
–1
–1.5
–15
ÈÈÈÈ
ÈÈÈÈ
ÈÈÈÈ
ÈÈÈÈ
1
2
3
4
5
16
RL = 5 kΩ
0.5
–0.5
0
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
VOM – Maximum Peak Output Voltage – V
VOM
VCC± = ±15 V
TA = 25°C
–1
Figure 19
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
1.5
–2
VID – Differential Input Voltage – V
RL = 50 kΩ
RL = 20 kΩ
RL = 10 kΩ
RL = 5 kΩ
–10
–5
0
5
10
VID – Differential Input Voltage – V
15
RL = 10 kΩ
TA = 25°C
12
VOM+
8
4
0
ÎÎÎ
ÎÎÎ
–4
VOM–
ÁÁ
ÁÁ
–8
–12
–16
0
2
Figure 20
4
6
8
10
12
|VCC±| – Supply Voltage – V
14
16
Figure 21
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
30
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
ÎÎÎÎÎ
ÎÎÎÎÎ
30
5
|VOM | – Maximum Peak Output Voltage – V
VO(PP)
VOPP – Maximum Peak-to-Peak Output Voltage – V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE†
vs
FREQUENCY
RL = 10 kΩ
VCC± = ±15 V
25
20
15
TA = –55°C
10
TA = 125°C
VCC± = ±5 V
ÁÁ
ÁÁ
ÁÁ
5
VOM+
4
10 k
100 k
f – Frequency – Hz
1M
VOM–
3
2
1
0
0
1k
0
5
Figure 22
5
VOM
VOM – Maximum Peak Output Voltage – V
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
VOM–
10
8
VOM+
6
4
2
0
0
5
20
MAXIMUM PEAK OUTPUT VOLTAGE†
vs
FREE-AIR TEMPERATURE
VCC± = ±15 V
TA = 25°C
12
15
Figure 23
16
14
10
|IO| – Output Current – mA
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
|VOM | – Maximum Peak Output Voltage – V
VCC± = ±5 V
TA = 25°C
10
15
20
|IO| – Output Current – mA
25
30
ÎÎÎÎ
4
VOM+
3
2
1
0
–1
ÎÎÎÎÎ
ÎÎÎÎÎ
VCC± = ±5 V
RL = 10 kΩ
ÎÎÎ
ÎÎÎ
–2
ÁÁÁ
ÁÁÁ
–3
VOM–
–4
–5
–75
–50
–25
0
25
50
75
100
125
TA – Free-Air Temperature – °C
Figure 24
Figure 25
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
31
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
LOAD RESISTANCE
MAXIMUM PEAK OUTPUT VOLTAGE†
vs
FREE-AIR TEMPERATURE
40
12
VOM+
35
A VD – Large-Signal Differential
Voltage Amplification – V/mV
VOM
VOM – Maximum Peak Output Voltage – V
16
8
4
0
–4
ÁÁ
ÁÁ
ÁÁ
ÎÎÎÎÎ
ÎÎÎÎÎ
VCC± = ±15 V
RL = 10 kΩ
ÎÎÎ
ÎÎÎ
–8
VOM–
–12
–16
–75
–50
–25
0
VO = ±1 V
TA = 25°C
VCC± = ±15 V
30
25
20
VCC± = ±5 V
15
10
5
25
50
75
100
0
125
10 k
TA – Free-Air Temperature –°C
100 k
RL – Load Resistance – Ω
Figure 26
1M
Figure 27
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
0°
10 k
1k
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
VCC± = ±15 V
RL = 10 kΩ
CL = 25 pF
TA = 25°C
30°
60°
AVD
100
90°
Phase Shift
10
120°
1
0.1
10
Phase Shift
A VD – Large-Signal Differential
Voltage Amplification
100 k
150°
100
1k
10 k
100 k
f – Frequency – Hz
1M
180°
10 M
Figure 28
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
32
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION†
vs
FREE-AIR TEMPERATURE
50
OUTPUT IMPEDANCE
vs
FREQUENCY
ÎÎÎÎ
ÎÎÎÎ
200
ÁÁ
zzo
o – Output Impedence – Ω
A VD – Large-Signal Differential
Voltage Amplification – V/mV
RL = 10 kΩ
VCC± = ±15 V
10
VCC± = ±5 V
100
80
60
AVD = 10
40
ÁÁ
ÁÁ
1
–75
AVD = 100
AVD = 1
20
VCC± = ±15 V
ro (open loop) ≈ 250 Ω
TA = 25°C
ÎÎÎÎÎ
10
–50
–25
0
25
50
75
100
TA – Free-Air Temperature – °C
1k
125
Figure 29
Figure 30
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
VCC± = ±5 V
TA = 25°C
90
80
70
60
50
40
30
20
10
0
ÎÎÎÎ
ÎÎÎÎ
100
CMRR – Common-Mode Rejection Ratio – dB
CMRR – Common-Mode Rejection Ratio – dB
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
ÎÎÎÎ
ÎÎÎÎ
100
100 k
10 k
f – Frequency – Hz
VCC± = ±15 V
TA = 25°C
90
80
70
60
50
40
30
20
10
0
10
100
1k
10 k
100 k
f – Frequency – Hz
1M
10 M
10
100
Figure 31
1k
10 k
100 k
f – Frequency – Hz
1M
10 M
Figure 32
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
33
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
SUPPLY-VOLTAGE REJECTION RATIO†
vs
FREE-AIR TEMPERATURE
COMMON-MODE REJECTION RATIO†
vs
FREE-AIR TEMPERATURE
100
kSVR – Supply Voltage Rejection Ratio – dB
CMRR – Common-Mode Rejection Ratio – dB
95
VCC± = ±15 V
90
VCC± = ±5 V
85
80
ÎÎÎÎÎ
ÎÎÎÎÎ
VIC = VICRmin
75
–75
–50
–25
0
25
50
75
100
VCC± = ±5 V to ±15 V
98
96
94
92
90
–75
125
–50
–25
TA – Free-Air Temperature – °C
25
50
75
100
125
TA – Free-Air Temperature – °C
Figure 33
Figure 34
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
SHORT-CIRCUIT OUTPUT CURRENT
vs
TIME
30
30
VO = 0
TA = 25°C
20
IIOS
OS – Short-Circuit Output Current – mA
IIOS
OS – Short-Circuit Output Current – mA
0
VID = 100 mV
10
0
VID = –100 mV
–10
ÁÁ
ÁÁ
–20
–30
VID = 100 mV
20
10
0
ÁÁÎÎÎÎÎÎ
ÁÁÎÎÎÎÎÎ
ÎÎÎÎÎÎ
VID = –100 mV
–10
VCC± = ±15 V
TA = 25°C
–20
0
2
4
6
8
10
12
|VCC±| – Supply Voltage – V
14
16
0
Figure 35
5
10
15
20
t – Time – s
25
30
Figure 36
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
34
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
TL031 and TL031A
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
SHORT-CIRCUIT OUTPUT CURRENT†
vs
FREE-AIR TEMPERATURE
20
15
10
5
0
–5
–10
–15
–20
ÎÎÎÎÎ
ÎÎÎÎÎ
VID = 100 mV
ÁÁ
ÎÎÎÎÎ ÁÁ
ÁÁÁÁÁ
ÎÎÎÎÎ ÁÁ
ÁÁÁÁÁ
ÎÎÎÎÎ ÁÁ ÁÁÁÁÁ
ÎÎÎÎÎ
Vn
nV/ Hz
V n– Equivalent Input Noise Voltage – nVHz
I OS – Short-Circuit Output Current – mA
25
VCC± = ±15 V
VCC± = ±5 V
ÎÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
VID = –100 mV
VCC± = ±5 V
VCC± = ±15 V
VO = 0
–25
–75
–50 –25
0
25
50
75
TA – Free-Air Temperature – °C
100
70
VCC± = ±15 V
RS = 20 Ω
TA = 25°C
See Figure 3
60
50
40
10
125
100
Figure 38
Figure 37
TL032 and TL032A
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
ÁÁ ÁÁÁÁÁ
ÁÁ ÁÁÁÁÁ
ÁÁ ÁÁÁÁÁ
ÁÁ
ÁÁ
ÁÁ
VCC± = ±15 V
RS = 20 Ω
TA = 25°C
See Figure 3
V n– Equivalent Input Noise Voltage – nV/
Vn
nVHzHz
V n – Equivalent Input Noise Voltage – nVHz
nV/ Hz
Vn
60
100 k
1k
10 k
f – Frequency – Hz
50
40
TL034 and TL034A
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
90
VCC± = ±15 V
RS = 20 Ω
TA = 25°C
See Figure 3
80
70
60
50
40
30
10
100
1k
10 k
f – Frequency – Hz
100 k
10
Figure 39
100
1k
10 k
f – Frequency – Hz
11 k
Figure 40
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
35
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
TL031 and TL031A
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
250
500
VO = 0
No Load
VO = 0
No Load
IICC
CC – Supply Current –Aµ A
200
AA
IICC
CC – Supply Current – µ
ÁÁÁ
ÁÁÁ
TA = 25°C
150
TA = 125°C
ÁÁ
ÁÁ
400
TA = 25°C
300
ÁÁ
ÁÁ
ÁÁ
100
TA = –55°C
50
TA = 125°C
200
TA = –55°C
100
0
0
2
4
6
8
10
12
|VCC±| – Supply Voltage – V
14
0
16
0
2
4
6
8
10
12
|VCC±| – Supply Voltage – V
Figure 41
ÎÎÎ
ÎÎÎ
ÎÎÎ
1000
250
ÁÁÁ
ÁÁÁ
ÁÁÁ
VO = 0
No Load
TA = 25°C
600
TA = 125°C
ÁÁ
ÁÁ
ÁÁ
400
16
TL031 and TL031A
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
TL034 and TL034A
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
AA
IICC
CC – Supply Current – µ
800
14
Figure 42
VO = 0
No Load
IICC
CC – Supply Current –Aµ A
TL032 and TL032A
SUPPLY CURRENT†
vs
SUPPLY VOLTAGE
200
VCC± = ±15 V
VCC± = ±5 V
150
ÁÁ
ÁÁ
TA = –55°C
200
100
50
0
0
2
4
6
8
10
12
|VCC±| – Supply Voltage – V
14
16
0
–75
–50
–25
0
25
50
75
100
TA – Free-Air Temperature – °C
125
Figure 44
Figure 43
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
36
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
TL034 and TL034A
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
TL032 and TL032A
SUPPLY CURRENT†
vs
FREE-AIR TEMPERATURE
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎ
ÎÎÎÎ
ÁÁ
ÁÁ
VO = 0
No Load
VCC± = ±15 V
VCC± = ±5 V
300
ÁÁ
ÁÁ
200
100
0
–75
–50
–25
0
25
50
75
100
TA – Free-Air Temperature – °C
VCC± = ±5 V
600
400
200
0
–75
125
–50
SLEW RATE
vs
LOAD RESISTANCE
4
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
125
ÎÎÎ
6
VCC± = ±5 V
CL = 100 pF
TA = 25°C
See Figure 1
SR–
5
SR–
3
2
100
SLEW RATE
vs
LOAD RESISTANCE
SR – Slew Rate – V/sµ s
SR – Slew Rate – V/sµ s
5
–25
0
25
50
75
TA – Free-Air Temperature – °C
Figure 46
Figure 45
6
VCC± = ±15 V
800
400
IICC
CC – Supply Current –Aµ A
µA
IICC
CC – Supply Current –A
VO = 0
No Load
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
1000
500
SR+
1
4
3
SR+
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
2
VCC± = ±15 V
CL = 100 pF
TA = 25°C
See Figure 1
1
0
ÎÎ
0
1
10
RL – Load Resistance – kΩ
100
1
Figure 47
10
RL – Load Resistance – kΩ
100
Figure 48
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
37
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
SLEW RATE†
vs
FREE-AIR TEMPERATURE
SLEW RATE†
vs
FREE-AIR TEMPERATURE
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
6
VCC± = ±5 V
RL = 10 kΩ
CL = 100 pF
See Figure 1
5
SR–
SR – Slew Rate – V/sµ s
5
SR – Slew Rate – V/sµ s
6
4
SR–
3
2
SR+
1
4
3
SR+
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
2
1
0
–75
–50
–25
0
25
50
75
100
TA – Free-Air Temperature – °C
0
–75
125
VCC± = ±15 V
RL = 10 kΩ
CL = 100 pF
See Figure 1
–50
–25
0
25
50
75
100
TA – Free-Air Temperature – °C
Figure 49
Figure 50
OVERSHOOT FACTOR
vs
LOAD CAPACITANCE
0.5
VI(PP) = ±10 mV
RL = 10 kΩ
TA = 25°C
See Figure 1
50
Overshoot Factor – %
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
ÎÎÎÎÎ
ÎÎÎÎÎ
40
VCC± = ±5 V
30
ÎÎÎÎÎÎ
20
VCC± = ±15 V
10
0
0
50
100
150
200
CL – Load Capacitance – pF
250
THD – Total Harmonic Distortion – %
60
125
0.4
VCC± = ±15 V
AVD = 1
VO(rms) = 6 V
TA = 25°C
0.3
0.2
0.1
100
Figure 51
1k
10 k
f – Frequency – Hz
100 k
Figure 52
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
38
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH†
vs
FREE-AIR TEMPERATURE
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
1.05
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
VI = 10 mV
RL = 10 kΩ
CL = 25 pF
TA = 25°C
See Figure 4
1.0
0.95
2
4
6
8
10
12
|VCC±|– Supply Voltage – V
14
VI = 10 mV
RL = 10 kΩ
CL = 25 pF
See Figure 4
1.2
VCC+ = ±15 V
1.1
1.0
VCC± = ±5 V
0.9
0.8
–75
0.9
0
16
–50
–25
50
75
100
125
PHASE MARGIN
vs
LOAD CAPACITANCE
70°
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
VI = 10 mV
RL = 10 kΩ
CL = 25 pF
TA = 25°C
See Figure 4
ÁÁ
ÁÁ
59°
VI = 10 mV
RL = 10 kΩ
TA = 25°C
See Figure 4
See Note A
VCC± = ±15 V
66°
61°
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÎÎÎÎ
ÁÁÁÁ
ÎÎÎÎ
ÎÎÎÎÎ
68°
φm – Phase Margin
φm – Phase Margin
ÁÁ
ÁÁ
ÁÁ
25
Figure 54
PHASE MARGIN
vs
SUPPLY VOLTAGE
63°
0
TA – Free-Air Temperature – °C
Figure 53
65°
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
1.3
B1
B1 – Unity-Gain Bandwidth – MHz
B1
B1 – Unity-Gain Bandwidth – MHz
1.1
64°
62°
60°
58°
ÎÎÎÎ
ÎÎÎÎ
56°
VCC± = ±5 V
54°
52°
50°
0
57°
0
2
4
6
8
10
12
14
16
|VCC±| – Supply Voltage – V
10
20
30
40
50
60
70
80
90
100
CL – Load Capacitance – pF
NOTE A: Values of phase margin below a load capacitance of 25 pF
were estimated.
Figure 55
Figure 56
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
39
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
TYPICAL CHARACTERISTICS
PHASE MARGIN†
vs
FREE-AIR TEMPERATURE
VOLTAGE-FOLLOWER
SMALL-SIGNAL
PULSE RESPONSE
ÎÎÎÎÎ
ÎÎÎÎÎ
67°
16
VCC± = ±15 V
12
V
VO
O – Output Voltage – mV
φ m – Phase Margin
65°
63°
VCC± = ±5 V
61°
4
VI = 10 mV
RL = 10 kΩ
CL = 25 pF
See Figure 4
57°
VCC± = ±15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
0
ÁÁ
ÎÎÎÎÎ ÁÁ
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
59°
55°
–75
8
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
–4
–8
–12
–16
–50
–25
0
25
50
75
TA – Free-Air Temperature –°C
100
0.2 0.4 0.6 0.8 1.0 1.2 1.4
t – Time – µs
0
125
Figure 57
Figure 58
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
2
8
6
VO
VO – Output Voltage – V
VO
VO – Output Voltage – V
1
VCC± = ±5 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
0
ÁÁ
ÁÁ
ÁÁ
ÁÁ
–1
4
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
2
VCC± = ±15 V
RL = 10 kΩ
CL = 100 pF
TA = 25°C
See Figure 1
0
–2
–4
–6
–2
0
1
2
3
4
t – Time – µs
5
6
7
8
–8
0
2
4
6
8 10
t – Time – µs
12
14
16
18
Figure 60
Figure 59
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
40
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
input characteristics
The TL03x and TL03xA are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction.
Due to of the extremely high input impedance and resulting low bias-current requirements, the TL03x and
TL03xA are well suited for low-level signal processing; however, leakage currents on printed circuit boards and
sockets easily can exceed bias-current requirements and cause degradation in system performance. It is a good
practice to include guard rings around inputs (see Figure 61). These guard rings should be driven from a
low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid oscillation.
+
VI
VO
+
VI
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
+
VO
–
–
–
VI
VO
(c) UNITY-GAIN AMPLIFIER
Figure 61. Use of Guard Rings
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
41
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
output characteristics
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.
The TL03x and TL03xA drive higher capacitive loads; however, as the load capacitance increases, the resulting
response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of
the load capacitance at which oscillation occurs varies with production lots. If an application appears to be
sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate
the problem (see Figure 63). Capacitive loads of 1000 pF and larger can be driven if enough resistance is added
in series with the output (see Figure 62).
(a) CL = 100 pF, R = 0
(b) CL = 300 pF, R = 0
(c) CL = 350 pF, R = 0
(d) CL = 1000 pF, R = 0
(e) CL = 1000 pF, R = 50 Ω
(f) CL = 1000 pF, R = 2 kΩ
Figure 62. Effect of Capacitive Loads
15 V
–
–5 V
R
VO
+
5V
– 15 V
CL
(see Note A)
10 kΩ
NOTE A: CL includes fixture capacitance.
Figure 63. Test Circuit for Output Characteristics
42
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
high-Q notch filter
In general, Texas Instruments enhanced-JFET operational amplifiers serve as excellent filters. The circuit in
Figure 64 provides a narrow notch at a specific frequency. Notch filters are designed to eliminate frequencies
that are interfering with the operation of an application. For this filter, the center frequency can be calculated as:
fO
+ 2p
1
R1
C1
With the resistors and capacitors shown in Figure 64, the center frequency is 1 kHz. C1 = C3 = C2 + 2 and
R1 = R3 = 2 × R2. The center frequency can be modified by varying these values. When adjusting the center
frequency, ensure that the operational amplifier has sufficient gain at the frequency required.
15 V
–
R1
R3
VI
VO
+
1.5 MΩ
1.5 MΩ
–15 V
C2
220 pF
R3
TL03x
750 kΩ
C3
C1
110 pF
110 pF
2
1
0
Gain – dB
–1
–2
–3
–4
–5
–6
–7
–8
0.2
0.4
0.6
0.8
1
0.2 0.4
f – Frequency – kHz
0.6
0.8
2
Figure 64. High-Q Notch Filter
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
43
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
transimpedance amplifier
The low-power precision TL03x allows accurate measurement of low currents. The high input impedance and
low offset voltage of the TL03xA greatly simplify the design of a transimpedance amplifier. At room temperature,
this design achieves 10-bit accuracy with an error of less than 1/2 LSB.
ǒ
Ǔ
Assuming that R2 is much less than R1 and ignoring error terms, the output voltage can be expressed as:
V
O
+ – IIN
R
F
R1
) R2
R2
Using the resistor values shown in the schematic for a 1-nA input current, the output voltage equals –0.1 V. If
the VO limit for the TL03xA is measured at ±12 V, the maximum input current for these resistor values is ±120 nA.
Similarly, one LSB on a 10-bit scale corresponds to 12 mV of output voltage, or 120 pA of input current.
ƪ
ǒ
Ǔƫǒ
Ǔ
The following equation shows the effect of input offset voltage and input bias current on the output voltage:
V
O
+–
V
IO
) RF IIO ) IIB
R1
) R2
R2
If the application requires input protection for the transimpedance amplifier, do not use standard PN diodes.
Instead, use low-leakage Siliconix SN4117 JFETs (or equivalent) connected as diodes across the TL03xA
inputs (see Figure 65).
As with all precision applications, special care must be taken to eliminate external sources of leakage and
interference. Other precautions include using high-quality insulation, cleaning insulating surfaces to remove
fluxes and other residue, and enclosing the application within a protective box.
RF
10 MΩ
15 V
+
Input Current
TL03xA
VO
–
–15 V R1
90 kΩ
R2
10 kΩ
SN4117
Figure 65. Transimpedance Amplifier
44
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
4-mA to 20-mA current loops
Often, information from an analog sensor must be sent over a distance to the receiving circuitry. For many
applications, the most feasible method involves converting voltage information to a current before transmission.
The following circuits give two variations of low-power current loops. The circuit in Figure 66 requires three wires
from the transmitting to receiving circuitry, while the second variation in Figure 67 requires only two wires, but
includes an extra integrated circuit. Both circuits benefit from the high input impedance of the TL03xA because
many inexpensive sensors do not have low output impedance.
ǒ Ǔ ǒ Ǔ
Assuming that the voltage at the noninverting input of the TL03xA is zero, the following equation determines
the output current:
I
O
+ VI
R3
R1
R
S
) 5V
R3
R2
R
S
+ 0.16
V
I
) 4 mA
The circuits presently provide 4-mA to 20-mA output current for an input voltage of 0 to 100 mV. By modifying
R1, R2, and R3, the input voltage range or the output current range can be adjusted.
ǒ Ǔ ǒ Ǔ ǒ
Ǔ
Including the offset voltage of the operational amplifier in the above equation clearly illustrates why the low offset
TL03xA was chosen:
I
O
+ VI R1 R3R ) 5 V R2 R3R * VI
S
S
+ 0.16 VI ) 4 mA – 0.17 VI
R3
R1
R
S
) R2 R3R ) RR1
S
S
For example, an offset voltage of 1 mV decreases the output current by 0.17 mA.
Due to the low power consumption of the TL03xA, both circuits have at least 2 mA available to drive the actual
sensor from the 5-V reference node.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
45
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
VCC+ = 10 V
100 kΩ
R6
TL431
100 kΩ
R7
5 V Ref
R2
1 MΩ
–
R1
2N3904
+
VI
R5
5 kΩ
3.3 kΩ
TL03xA
VEE = –5 V
R4
5 kΩ
1N4148
R3 80 kΩ
RS
IO
Signal Common
100 Ω
50 Ω
RL
Figure 66. Three-Wire 4-mA to 20-mA Current Loop
VCC+ = 10 V
IN
OUT
LT1019-5
5 V Ref
GND
10 µF
R2 1 MΩ
8
2
3
4
LTC1044
5
–
R1
+
VI
10 µF
5 kΩ
TL03xA
R4
R3
R5
2N3904
3.3 kΩ
5 kΩ
1N4148
80 kΩ
RS
IO
Signal Common
100 Ω
Figure 67. Two-Wire 4-mA to 20-mA Current Loop
46
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
RL
50 Ω
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
low-level light-detector preamplifier
Applications that need to detect small currents require high input-impedance operational amplifiers; otherwise,
the bias currents of the operational amplifier camouflage the current being monitored. Phototransistors provide
a current that is proportional to the light reaching the transistor. The TL03x allows even the small currents
resulting from low-level light to be detected.
In Figure 68, if there is no light, the phototransistor is off and the output is high. As light is detected, the
operational amplifier output begins pulling low. Adjusting R4 both compensates for offset voltage of the amplifier
and adjusts the point of light detection by the amplifier.
15 V
R6
10 kΩ
R1
10 kΩ
+
R3
TIL601
R4
10 kΩ
R5
R2
10 kΩ
C1
100 pF
R7
TL03x
VO
–
10 kΩ
10 kΩ
5 kΩ
–15 V
Figure 68. Low-Level Light-Detector Preamplifier
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
47
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
audio-distribution amplifier
This audio-distribution amplifier (see Figure 69) feeds the input signal to three separate output channels. U1A
amplifies the input signal with a gain of 10, while U1B, U1C, and U1D serve as buffers to the output channels.
The gain response of this circuit is very flat from 20 Hz to 20 kHz. The TL03x allows quick response to the input
signal while maintaining low power consumption.
R4
1 MΩ
U1B
–
VCC+
C1
1 µF
VOA
+
–
VI
+
R1
100 kΩ
U1C
U1A
–
R2
100 kΩ
VOB
+
VCC+
C2
100 µF
R5
10 kΩ
U1D
–
R3
100 kΩ
+
NOTE A: U1A through U1D = TL03x; VCC+ = 5 V
Figure 69. Audio-Distribution Amplifier Circuit
48
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VOC
TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001
APPLICATION INFORMATION
instrumentation amplifier with linear gain adjust
The low offset voltage and low power consumption of the TL03x provide an accurate but inexpensive
instrumentation amplifier (see Figure 70). This particular configuration offers the advantage that the gain can
be linearly set by one resistor:
VO =
R6
× (VB – VA)
R5
Adjusting R6 varies the gain. The value of R6 always should be greater than, or equal to, the value of R5 to
ensure stability. The disadvantage of this instrumentation amplifier topology is the high degree of CMRR
degradation resulting from mismatches between R1, R2, R3, and R4. For this reason, these four resistors
should be 0.1%-tolerance resistors.
VCC+
–
VA
R1
10 kΩ
0.1%
R3
10 kΩ
0.1%
+
U1A
U1C
–
VO
+
R5
100 kΩ
U1B
U1D
–
VB
+
R6
1 MΩ
–
R2
10 kΩ
0.1%
R4
10 kΩ
0.1%
+
VCC–
R7
100 kΩ
NOTE A: U1A through U1D = TL03x; VCC± = ±15 V
Figure 70. Instrumentation Amplifier With Linear Gain-Adjust Circuit
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
49
PACKAGE OPTION ADDENDUM
www.ti.com
18-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9086102Q2A
OBSOLETE
LCCC
FK
20
None
Call TI
Call TI
TL031ACD
OBSOLETE
SOIC
D
8
None
Call TI
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TL031ACP
OBSOLETE
PDIP
P
8
None
Call TI
Call TI
TL031AID
OBSOLETE
SOIC
D
8
None
Call TI
Call TI
TL031AIP
OBSOLETE
PDIP
P
8
None
Call TI
Call TI
TL031CD
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TL031CDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TL031CP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL031CPWLE
OBSOLETE
TSSOP
PW
8
None
Call TI
TL031ID
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TL031IP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL032ACD
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032ACDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032ACP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL032AID
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032AIDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032AIP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL032CD
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032CDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032CP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL032CPSR
ACTIVE
SO
PS
8
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TL032CPWLE
OBSOLETE
TSSOP
PW
8
None
Call TI
TL032ID
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032IDR
ACTIVE
SOIC
D
8
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL032IP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL032MFKB
OBSOLETE
LCCC
FK
20
None
Call TI
Call TI
TL032MJGB
OBSOLETE
CDIP
JG
8
None
Call TI
Call TI
TL034ACD
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL034ACDR
ACTIVE
SOIC
D
14
2500
Pb-Free
CU NIPDAU
Level-2-250C-1 YEAR
Addendum-Page 1
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
18-Feb-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL034ACN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL034AID
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL034AIDR
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL034AIN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL034CD
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL034CDR
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL034CN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
TL034CNSR
ACTIVE
SO
NS
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
TL034CPW
ACTIVE
TSSOP
PW
14
90
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL034CPWLE
OBSOLETE
TSSOP
PW
14
None
Call TI
TL034CPWR
ACTIVE
TSSOP
PW
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
TL034ID
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-250C-1 YEAR
TL034IDR
OBSOLETE
SOIC
D
14
None
Call TI
TL034IN
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
Lead/Ball Finish
MSL Peak Temp (3)
(RoHS)
Call TI
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Level-NC-NC-NC
TL034MD
OBSOLETE
SOIC
D
14
None
Call TI
Call TI
TL034MFKB
OBSOLETE
LCCC
FK
20
None
Call TI
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TL034MJB
OBSOLETE
CDIP
J
14
None
Call TI
Call TI
TL034MN
OBSOLETE
PDIP
N
14
None
Call TI
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(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
18-Feb-2005
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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• DALLAS, TEXAS 75265
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