SEMTECH SC4519H

SC4519H
600kHz, 3A Step-Down
Switching Regulator
POWER MANAGEMENT
Description
Features
The SC4519H is a current mode switching regulator with
an integrated switch, operating at 600kHz with separate
sync and enable functions. The integrated switch allows
for cost effective low power solutions (peak switch current
3 amps). The sync function allows customers to
synchronize to a faster clock in order to avoid frequency
beating in noise sensitive applications. High frequency
of operation allows for very small passive components.
Current mode operation allows for fast dynamic response
and instantaneous duty cycle adjustment as the input
varies (ideal for CPE applications where the input is a
wall plug power).
‹
‹
‹
‹
‹
‹
Integrated 3 Amp switch
600kHz frequency of operation
Current mode controller
Synchronizable to higher frequency up to 1.2MHz
Precision enable threshold
SO-8 EDP package. Lead free product, fully WEEE
and RoHS compliant
Applications
‹
‹
‹
The low shutdown current makes it ideal for portable ‹
applications where battery life is important.
XDSL modems
CPE equipment
DC-DC point of load applications
Portable equipment
The SC4519H is a 600kHz switching regulator
synchronizable to a faster frequency from 750kHz to
1.2MHz.
Typical Application Circuit
D1
C1
1
BST
VIN
2
Enable
5
EN
8
SYNC
C3
IN
SW
SC4519H
FB
COMP
VOUT
R1
6
7
GND
4
L1
3
C4
C2
D2
R2
R3
Revision: September 11, 2007
1
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SC4519H
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may
affect device reliability.
Parameter
Symbol
Limits
Units
Input Supply Voltage
VIN
-0.3 to +28 (1)
V
Boost Pin Above VSW
(VBST - VSW)
16
V
Boost Pin Voltage
V BST
-0.3 to +32
V
EN Pin Voltage
V EN
-0.3 to +24
V
FB Pin Voltage
V FB
-0.3 to +6
V
FB Pin Current
IFB
1
mA
SYNC Pin Current
ISYNC
1
mA
Thermal Impedance Junction to Ambient
θJ A
36.5(2)
°C/W
Operating Ambient Temperature Range
TA
-40 to +85
°C
Maximum Junction Temperature
TJ
+150
°C
Storage Temperature Range
TSTG
-65 to +150
°C
Lead Temperature (Soldering) 10 sec
TLEAD
300
°C
ESD Rating (Human Body Model)
ESD
2
kV
Notes:
(1) For proper operation of device, VIN should be within maximum Operating Input Voltage as defined in Electrical
Characteristics.
(2) ThetaJA is calculated from a package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under exposed
pad per JESD51 standards.
Electrical Characteristics
Unless specified: VIN = 12V, VCOMP = 0.8V, VBST = VIN + 5V, EN = tied to VIN, SYNC = 0, SW = open.
TA = TJ = -40°C to 125°C.
Parameter
Symbol
Operating Input Voltage
VIN
Maximum Switch Current Limit
ISW
Oscillator Frequency
fOSC
Switch On Voltage Drop
VD(SW)
VIN Undervoltage Lockout
VUVLO
Conditions
TA = 25°C, D = 50%
ISW = 3A
Standby Current
 2007 Semtech Corp.
Typ
3.5
500
600
Max
Units
24(1)
V
5.5
A
700
kHz
220
3.9
VIN UVLO Hysteresis
VIN Supply Current
Min
mV
4.4
60
V
mV
IQ
V FB = 1V
3
5
mA
IQ(OFF)
V E N = 0V
100
150
µA
2
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SC4519H
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VIN = 12V, VCOMP = 0.8V, VBST = VIN + 5V, EN = tied to VIN, SYNC = 0, SW = open.
TA = TJ = -40°C to 125°C.
PARAMETER
FB Input Current
SYMBOL
CONDITIONS
IFB
Feedback Voltage
Feedback Voltage Line
Regulation
FB to VCOMP Voltage Gain(3)
FB to VCOMP
Transconductance(3)
MIN
0.784
4.4V < VIN < 24V(2)
TYP
MAX
UNITS
-0.25
-1
µA
0.8
0.816
V
+3
mV/V
V/V
0.9V ≤ VCOMP ≤ 2.0V
150
350
∆ ICOMP = ± 10µA
500
850
1300
µMho
VCOMP Pin Source Current
VFB = 0.6V
70
110
µA
VCOMP Pin Sink Current
VFB = 1.0V
-70
-110
µA
VCOMP = 1.25V
5
A/V
Duty cycle = 0%
0.6
V
VCOMP OCP Threshold
VCOMP rising
2
V
VCOMP Hiccup Retry Threshold
VCOMP falling
0.25
V
Maximum Switch Duty Cycle
VCOMP = 1.2V, ISW = 400mA
VCOMP Pin to Switch Current
Transconductance
VCOMP Pin Maximum
Switching Threshold
Minimum Boost Voltage
Above Switch(3)
Boost Current
 2007 Semtech Corp.
85
%
2.7
V
ISW = 1A
10
15
ISW = 3A
30
45
3
mA
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SC4519H
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VIN = 12V, VCOMP = 0.8V, VBST = VIN + 5V, EN = tied to VIN, SYNC = 0, SW = open.
TA = TJ = -40°C to 125°C.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.1
1.27
1.5
V
Enable Input Threshold Voltage
VETH
Enable Output Bias Current
IEOL
EN = 50mV below threshold
8
µA
IEOH
EN = 50mV above threshold
10
µA
1.5
V
SYNC Threshold Voltage
SYNC Input Frequency
800
(4)
SYNC Pin Resistance
VSYNC = 0.5V
1200
20
kHz
kΩ
Notes:
(1) The device may not function properly outside its operating input voltage range.
(2) The required minimum input voltage for a regulated output depends on the output voltage and load condition.
(3) Guaranteed by design.
(4) Please contact factory for SYNC applications.
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SC4519H
POWER MANAGEMENT
Pin Configurations
Ordering Information
TOP VIEW
BST
1
8
SYNC
IN
2
7
COMP
SW
3
6
FB
GND
4
5
EN
Part Number (1)(2)
P ackag e
SC4519HSETRT
SO-8 EDP
SC4519HEVB
EVALUATION BOARD
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is WEEE and
RoHS compliant.
(SO-8 EDP)
Pin Descriptions
Pin #
Pin Name Pin Function
1
BST
This pin provides power to the internal NPN switch. The minimum turn on voltage for this switch
is 2.7V.
2
IN
Pin IN delivers all power required by control and power circuitry. This pin sees high di/dt during
switching. A decoupling capacitor should be attached to this pin as close as possible.
3
SW
Pin SW is the emitter of the internal switch. The external freewheeling diode should be connected
as close as possible to this pin.
4
GND
All voltages are measured with respect to this pin. The decoupling capacitor and the freewheeling
diode should be connected to GND as short as possible.
5
EN
This is the chip enable input. The regulator is switched on if EN is high, and it is off if EN is low.
The regulator is in standby mode when EN is low, and the input supply current is reduced to a few
microamperes.
6
FB
Feedback input for adjustable output controllers.
7
COMP
Thi s i s the output of the i nternal error ampli fi er and i nput of the peak current comparator. A
compensation network is connected to this pin to achieve the specified performance.
8
SYNC
This is synchronous control pin used to synchronize the internal oscillator to an external pulse
control signal. When not used, it should be connected to GND.
-
THERMAL P ad for heatsi nki ng purposes. C onnect to ground plane usi ng multi ple vi as. Not connected
PAD
internally.
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SC4519H
POWER MANAGEMENT
Block Diagram
+
+
Is
IN
ISEN
+
40m
SLOPE
COMP
FB
BST
-
+
PWM
S
EA
Q
POWER
TRANSISTOR
R
SW
Is
1V
REFERENCE
EN
UVLO
SOFT START
HICCUP
GND
OL
0.7V
SLOPE
FB
SLOPE COMP
SYNC
OSCILLATOR
FREQUENCY
CLK
Typical Characteristic - OCP Limit
SC4519H OCP Limit vs Duty Cycle
7
6.5
6
Current Limit (A)
5.5
5
ILIM @-40C
4.5
ILIM @25C
ILIM @125C
4
3.5
3
2.5
2
0
20
40
60
80
100
Duty Cycle (%)
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SC4519H
POWER MANAGEMENT
Application Information
The SC4519H is a current mode buck converter regulator.
SC4519H has an internal fixed-frequency clock. The
SC4519H uses two feedback loops that control the duty
cycle of the internal power switch. The error amplifier
functions like that of the voltage mode converter. The
output of the error amplifier works as a switch current
reference. This technique effectively removes one of the
double poles in the voltage mode system. With this, it is
much simpler to compensate a current mode converter
to have better performance. The current sense amplifier
in the SC4519H monitors the switch current during each
cycle. Overcurrent protection (OCP) is triggered when the
current limit exceeds the upper limit of 3A, detected by a
voltage on COMP greater than about 2V. When an OCP
fault is detected, the switch is turned off and the external
COMP capacitor is discharged at the rate of dv/dt = 3µA/
Ccomp. Once the COMP voltage has fallen below 250mV,
the part enters a normal startup cycle. Ccomp is the total
capacitance value attached to COMP. In the case of
sustained overcurrent or dead-short, the part will
continually cycle through the retry sequence as described
above, at a rate dependent on the value of Ccomp. During
start up, the voltage on COMP rises roughly at the rate of
dv/dt = 120µA/Ccomp. Therefore, the retry time for a
sustained overcurrent can be approximately calculated
as:
Tretry = Ccomp •
Oscillator
Its internal free running oscillator sets the PWM frequency
at 600kHz for the SC4519H without any external
components to program the frequency. An external clock
with a duty cycle from 20% to 80% connected to the
SYNC pin activates synchronous mode. The frequency
of the external clock can be from 700kHz to 1.2MHz.
UVLO
When the EN pin is pulled and held above 1.8V, the voltage
on Pin IN determines the operation of the SC4519H. As
V increases during power up, the internal circuit senses
IN
V and keeps the power transistor off until V reaches
IN
IN
4.4V.
Load Current
The peak current IPEAK in the switch is internally limited.
For a specific application, the allowed load current IOMAX
will change if the input voltage drifts away from the original
design as given for continuous current mode:
IOMAX = 3 −
VO ⋅ (1 − D)
2 ⋅ L ⋅ fs
Where:
fs = switching frequency,
Vo = output voltage and
D = duty ratio, VO/VI
V = input voltage.
2V
2V
+ Ccomp •
120uA
3uA
Figure 1 shows the voltage on COMP during a sustained
overcurrent condition.
I
Figure 2 shows the theoretical maximum load current
for the specific cases. In a real application, however, the
allowed maximum load current also depends on the layout
and the air cooling condition. Therefore, the maximum
load current may need to be derated according to the
thermal situation of the application.
Figure 1. Voltage on COMP for Startup and OCP
Enable
Pulling and holding the EN pin below 0.4V activates the
shut down mode of the SC4519H which reduces the input
supply current to less than 150µA. During the shut down
mode, the switch is turned off. The SC4519H is turned
on if the EN pin is pulled high.
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SC4519H
POWER MANAGEMENT
Application Information (Cont.)
The peak to peak inductor current is:
I p − p = δ • I OMAX
Iomax (A)
Maximum Load Current vs Input Voltage
L=10uH
2.900
2.880
2.860
2.840
2.820
2.800
2.780
2.760
2.740
2.720
2.700
After the required inductor value is selected, the proper
selection of the core material is based on the peak
inductor current and efficiency specifications. The core
must be able to handle the peak inductor current IPEAK
without saturation and produce low core loss during the
high frequency operation.
Vo=2.5V
Vo=3.3V
IPEAK = IOMAX +
Vo=5V
4
6
8
10
12
14
16
2
The power loss for the inductor includes its core loss and
copper loss. If possible, the winding resistance should
be minimized to reduce inductor’s copper loss. The core
must be able to handle the peak inductor current IPEAK
without saturation and produce low core loss during the
high frequency operation. The core loss can be found in
the manufacturer’s datasheet. The inductor’s copper loss
can be estimated as follows:
18
Vi (V)
Figure 2. Theoretical maximum load current curves
Inductor Selection
PCOPPER = I 2LRMS ⋅ R WINDING
Where:
ILRMS is the RMS current in the inductor. This current can
be calculated as follows:
The factors for selecting the inductor include its cost,
efficiency, size and EMI. For a typical SC4519H
application, the inductor selection is mainly based on its
value, saturation current and DC resistance. Increasing
the inductor value will decrease the ripple level of the
output voltage while the output transient response will
be degraded. Low value inductors offer small size and
fast transient responses while they allow large ripple
currents, poor efficiencies and require more output
capacitance for low output ripple. The inductor should
be able to handle the peak current without saturating
and its copper resistance in the winding should be as low
as possible to minimize its resistive power loss. A good
trade-off among its size, loss and cost is to set the
inductor ripple current to be within 15% to 30% of the
maximum output current.
ILRMS = IOMAX ⋅ 1 +
L=
1 2
⋅δ
12
Output Capacitor Selection
Basically there are two major factors to consider in
selecting the type and quantity of the output capacitors.
The first one is the required ESR (Equivalent Series
Resistance) which should be low enough to reduce the
output voltage deviation during load changes. The second
one is the required capacitance, which should be high
enough to hold up the output voltage. Before the
SC4519H regulates the inductor current to a new value
during a load transient, the output capacitor delivers all
the additional current needed by the load. The ESR and
ESL of the output capacitor, the loop parasitic inductance
between the output capacitor and the load combined
with inductor ripple current are all major contributors to
the output voltage ripple. Surface mount ceramic
capacitors are recommended.
The inductor value can be determined according to its
operating point under its continuous mode and the
switching frequency as follows:
VO ⋅ (VI − VO )
VI ⋅ f s ⋅ δ ⋅ IOMAX
Where:
fs = switching frequency,
δ = ratio of the peak to peak inductor current to the
output load current and
VO = output voltage.
 2007 Semtech Corp.
Ip − p
Input Capacitor Selection
The input capacitor selection is based on its ripple current
level, required capacitance and voltage rating. This
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SC4519H
POWER MANAGEMENT
Application Information (Cont.)
capacitor must be able to provide the ripple current
drawn by the converter. For the continuous conduction
mode, the RMS value of the input capacitor current
ICIN(RMS) can be calculated from:
ICIN (RMS) = I OMAX ⋅
Where:
IB = the boost current and
VD= discharge ripple voltage.
With fs = 600kHz, VD = 0.5V and IB =0.045A, the required
minimum capacitance for the boost capacitor is:
VO ⋅ (VI − VO )
V
2
I
This current gives the capacitor’s power loss through its
RCIN(ESR) as follows:
Cboost =
The internal driver of the switch requires a minimum 2.7V
to fully turn on that switch to reduce its conduction loss.
If the output voltage is less than 2.7V, the boost capacitor
can be connected to either the input side or an
independent supply with a decoupling capacitor. But the
Pin BST should not see a voltage higher than its maximum
rating.
PCIN = I2CIN (RMS) • R CIN(ESR)
The input ripple voltage mainly depends on the input
capacitor’s ESR and its capacitance for a given load, input
voltage and output voltage. Assuming that the input
current of the converter is constant, the required input
capacitance for a given voltage ripple can be calculated
by:
CIN = IOMAX ⋅
Freewheeling Diode Selection
D ⋅ (1 − D)
fs ⋅ ( ∆VI − IOMAX ⋅ RCIN(ESR) )
This diode conducts during the switch’s off-time. The diode
should have enough current capability for full load and
short circuit conditions without any thermal concerns.
Its maximum repetitive reverse block voltage has to be
higher than the input voltage of the SC4519H. A low
forward conduction drop is also required to increase the
overall efficiency. The freewheeling diode should be
turned on and off fast with minimum reverse recovery
because the SC4519H is designed for high frequency
applications. SS23 Schottky rectifier is recommended
for certain applications. The average current of the diode,
ID_AVG can be calculated by:
Where:
∆VI = the given input voltage ripple.
Because the input capacitor is exposed to the large surge
current, attention is needed for the input capacitor. If
tantalum capacitors are used at the input side of the
converter, one needs to ensure that the RMS and surge
ratings are not exceeded. For generic tantalum
capacitors, it is suggested to derate their voltage ratings
at a ratio of about two to protect these input capacitors.
Boost Capacitor and its Supply Source Selection
ID- AVG = Iomax ⋅ (I − D)
The boost capacitor selection is based on its discharge
ripple voltage, worst case conduction time and boost
current. The worst case conduction time Tw can be
estimated as follows:
TW =
Thermal Considerations
There are three major power dissipation sources for the
SC4519H. The internal switch conduction loss, its
switching loss due to the high frequency switching actions
and the base drive boost circuit loss. These losses can
be estimated as:
1
⋅ D max
fs
Where:
fs = the switching frequency and
Dmax = maximum duty ratio, 0.85 for the SC4519H.
2
Ptotal = Io ⋅ R on ⋅ D + 10.8 ⋅ 10 −3 ⋅ Io ⋅ VI +
 2007 Semtech Corp.
10
⋅ Io ⋅ D ⋅ (Vboost )
1000
Where:
IO = load current;
Ron = on-equivalent resistance of the switch;
VBOOST = input voltage or output based on the boost circuit
connection.
The required minimum capacitance for the boost
capacitor will be:
C boost =
0.045
1
IB 1
⋅ ⋅ Dmax =
⋅
⋅ 0.85 = 128nF
0.5 600k
VD fs
IB
⋅ TW
VD
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SC4519H
POWER MANAGEMENT
Application Information (Cont.)
5
θ JA is the thermal resistance from junction to ambient.
Its value is a function of the IC package, the application
layout and the air cooling system.
COMP
Vout
6
R1
C
7
R2
R3
D2
Figure 3. Compensation network provides 2 poles and
1 zero.
The compensation network gives the following
characteristics:
Loop Compensation Design
The SC4519H has an internal error amplifier and requires
a compensation network to connect between the COMP
pin and GND pin as shown in Figure 3. The compensation
network includes C4, C5 and R3. R1 and R2 are used to
program the output voltage according to:
s
R2
ωZ
G COMP (s) = ω1 ⋅
⋅ gm ⋅
s
R1 + R 2
s ⋅ (1 +
)
ωP2
1+
Where:
R1
)
R2
Assuming the power stage ESR (equivalent series
resistance) zero is an order of magnitude higher than
the closed loop bandwidth, which is typically one tenth of
the switching frequency, the power stage control to output
transfer function with the current loop closed (Ridley
model) for the SC4519H will be as follows:
ω1 =
1
C 4 + C5
ωZ =
1
R 3 ⋅ C4
ω P2 =
5 ⋅ RL
s
1+
1
RL ⋅ C
C 4 + C5
R 3 ⋅ C 4 ⋅ C5
The loop gain will be given by:
s
1+
R
R
1
ω
2
Z
⋅
T(s) = GCOMP (s) ⋅ G VD (s) = 4.25 ⋅ 10 −3 ⋅ L ⋅
C 4 R1 + R 2 s (1 + s ) ⋅ (1 + s )
ωP1
ωP2
Where:
RL – Load and
C – Output capacitor.
Where:
ωp1 =
The goal of the compensation design is to shape the loop
to have a high DC gain, high bandwidth, enough phase
margin, and high attenuation for high frequency noises.
Figure 3 gives a typical compensation network which
offers 2 poles and 1 zero to the power stage:
 2007 Semtech Corp.
FB
L1
3
C4
Pdiode = VF ⋅ Io ⋅ (1 − D)
G VD (s) =
SYNC
SW
C5
The freewheeling diode also contributes a significant
portion of the total converter loss. This loss should be
minimized to increase the converter efficiency by using
Schottky diodes with low forward drop (VF).
VO = 0.8 • (1 +
EN
SC4519H
4
8
IN
GND
TJ = TA + θ JA ⋅ Ptotal
2
BST
1
The junction temperature of the SC4519H can be
further determined by:
1
RL ⋅ C
One integrator is added at origin to increase the DC gain.
ωZ is used to cancel the power stage pole ωP1 so that the
loop gain has –20dB/dec rate when it reaches 0dB line.
ωP2 is placed at half switching frequency to reject high
frequency switching noises. Figure 4 gives the asymptotic
diagrams of the power stage with current loop closed
and its loop gain.
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SC4519H
POWER MANAGEMENT
Application Information (Cont.)
Layout Guidelines:
Mag
In order to achieve optimal electrical and thermal
performance for high frequency converters, special
attention must be paid to the PCB layouts. The goal of
layout optimization is to identify the high di/dt loops and
minimize them. The following guidelines should be used
to ensure proper operation of the converters.
Loop gain T(s)
ωp1
Power stage
ωC
ωP2
ω
ωZ
1. A ground plane is suggested to minimize switching
noises and trace losses and maximize heat
transferring.
2. Start the PCB layout by placing the power components
first. Arrange the power circuit to achieve a clean
power flow route. Put all power connections on one
side of the PCB with wide copper filled areas if
possible.
3. The VIN bypass capacitor should be placed next to
the VIN and GND pins.
4. The trace connecting the feedback resistors to the
output should be short, direct and far away from any
noise sources such as switching node and switching
components.
5. Minimize the loop including input capacitor, the
SC4519H and freewheeling diode D 2. This loop
passes high di/dt current. Make sure the trace width
is wide enough to reduce copper losses in this loop.
6. Maximize the trace width of the loop connecting the
inductor, freewheeling diode D 2 and the output
capacitor.
7. Connect the ground of the feedback divider and the
compensation components directly to the GND pin
of the SC4519H by using a separate ground trace.
8. Connect Pin 4 to a large copper area to remove the
IC heat and increase the power capability of the
SC4519H. A few feedthrough holes are required to
connect this large copper area to a ground plane to
further improve the thermal environment of the
SC4519H. The traces attached to other pins should
be as wide as possible for the same purpose.
Figure 4. Asymptotic diagrams of power stage with
current loop closed and its loop gain.
The design guidelines for the SC4519H applications are
as following:
1. Set the loop gain crossover corner frequency ωC for
given switching corner frequency ωC = 2πfC
2. Place an integrator at the origin to increase DC and
low frequency gains.
3. Select ωZ such that it is placed at ωP1 to obtain a
-20dB/dec rate to go across the 0dB line.
4. Place a high frequency compensator pole
ωP2 (ωP2 = πfs) to get the maximum attenuation of
the switching ripple and high frequency noise with
the adequate phase lag at ωC.
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SC4519H
POWER MANAGEMENT
Application Information (Cont.)
Design Example: 16V to 5V at 2A
D3
C1
0.22u
1
L1
C3
10u
4.
4.75k
5
R4
SW
SC4519H
FB
IN
EN
SYNC
Vo=5V
3
8.2uH
6
R1
C2
10u
52.3k
7
COMP
4
8
BST
2
GND
V IN =16V
C4
3.3n
R2
10kk
C5
180p
R3
3.4k
D2
Bill of Materials
Item
Qty
Reference
Value
Part No./Manufacturer
1
1
C1
0.22uF, 25V, 0805, X7R
Vishay
2
2
C 2, C 3
10u, 1210, X5R, 25V
Panasonic
3
1
C4
3.3n, 0805, X7R, 25V
Vishay
4
1
C5
180pF
5
1
D1
1N4148WS, SOD-323
6
1
D2
S S 33
Fairchild P/N: SS33
7
1
L1
8.2uH
COOPER P/N:DR125-8R2
8
1
R1
52.3K
9
1
R2
10k
10
1
R3
3.4k
11
1
R4
4.75k
12
1
U1
S C 4519H
Semtech
Unless specified, all resistors have 1% precision with 0603 package.
Resistors are +/-1% and all capacitors are +/-20%
 2007 Semtech Corp.
12
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SC4519H
POWER MANAGEMENT
Application Information (Cont.)
(COMPONENT - BOTTOM)
(COMPONENT - TOP)
SC4518
8
(PCB - TOP)
 2007 Semtech Corp.
(PCB - BOTTOM)
13
www.semtech.com
SC4519H
POWER MANAGEMENT
Outline Drawing - SOIC-8L EDP
A
D
e
N
DIM
E1 E
1
2
e/2
B
D
aaa C
A2 A
SEATING
PLANE
C
A1
bxN
bbb
.053
.069
.000
.005
.049
.065
.020
.012
.007
.010
.189 .193 .197
.150 .154 .157
.236 BSC
.050 BSC
.116 .120 .130
.085 .095 .099
.010
.020
.016 .028 .041
(.041)
8
0°
8°
.004
.010
.008
A
A1
A2
b
c
D
E1
E
e
F
H
h
L
L1
N
01
aaa
bbb
ccc
2X E/2
ccc C
2X N/2 TIPS
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
C A-B D
1.75
1.35
0.13
0.00
1.65
1.25
0.51
0.31
0.17
0.25
4.80 4.90 5.00
3.80 3.90 4.00
6.00 BSC
1.27 BSC
2.95 3.05 3.30
2.15 2.41 2.51
0.25
0.50
0.40 0.72 1.04
(1.05)
8
0°
8°
0.10
0.25
0.20
h
F
EXPOSED PAD
h
H
H
c
GAGE
PLANE
0.25
L
(L1)
SEE DETAIL
A
DETAIL
01
A
SIDE VIEW
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION BA.
Land Pattern - SOIC-8L EDP
E
SOLDER MASK
D
DIM
(C)
F
G
C
D
E
F
G
P
X
Y
Z
Z
Y
THERMAL VIA
Ø 0.36mm
P
X
DIMENSIONS
INCHES
MILLIMETERS
(.205)
.134
.201
.101
.118
.050
.024
.087
.291
(5.20)
3.40
5.10
2.56
3.00
1.27
0.60
2.20
7.40
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A.
3.
THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
 2007 Semtech Corp.
14
www.semtech.com