FAIRCHILD FDS6982AS_08

FDS6982AS
tmM
®
™
Dual Notebook Power Supply N-Channel PowerTrench SyncFET
General Description
Features
The FDS6982AS is designed to replace two single SO8 MOSFETs and Schottky diode in synchronous
DC:DC power supplies that provide various peripheral
voltages for notebook computers and other battery
powered electronic devices. FDS6982AS contains two
unique 30V, N-channel, logic level, PowerTrench
MOSFETs designed to maximize power conversion
efficiency. The high-side switch (Q1) is designed with
specific emphasis on reducing switching losses while
the low-side switch (Q2) is optimized to reduce
conduction losses. Q2 also includes an integrated
Schottky diode using Fairchild’s monolithic SyncFET
technology.
•
Applications
•
Q2:
Optimized to minimize conduction losses
Includes SyncFET Schottky body diode
8.6A, 30V
RDS(on) max= 13.5mΩ @ VGS = 10V
RDS(on) max= 16.5mΩ @ VGS = 4.5V
•
Low gate charge (21nC typical)
•
Q1:
Optimized for low switching losses
6.3A, 30V
RDS(on) max= 28.0mΩ @ VGS = 10V
RDS(on) max= 35.0mΩ @ VGS = 4.5V
Low gate charge (11nC typical)
• Notebook
D1
D1
4
5
D2
Q1
6
D2
3
2
7
SO-8
S2
G2
S1
G1
Absolute Maximum Ratings
Symbol
Drain-Source Voltage
Gate-Source Voltage
ID
Drain Current
PD
8
- Continuous
- Pulsed
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
Q2
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
TJ, TSTG
1
TA = 25°C unless otherwise noted
Parameter
VDSS
VGSS
Q2
Operating and Storage Junction Temperature Range
Q1
Units
30
30
±20
8.6
30
±20
6.3
20
V
V
2
1.6
A
W
1
0.9
–55 to +150
°C
78
40
°C/W
°C/W
Thermal Characteristics
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
Package Marking and Ordering Information
Device Marking
FDS6982AS
©2008 Fairchild Semiconductor Corporation
Device
FDS6982AS
Reel Size
13”
Tape width
12mm
Quantity
2500 units
FDS6982AS Rev B1
FDS6982AS
May 2008
TA = 25°C unless otherwise noted
Symbol
Test Conditions
Parameter
Type Min Typ Max Units
Off Characteristics
BVDSS
∆BVDSS
∆TJ
IDSS
IGSS
Drain-Source Breakdown
Voltage
Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain
Current
Gate-Body Leakage
On Characteristics
VGS = 0 V,
ID = 1 mA
ID = 250 uA
VGS = 0 V,
ID = 1 mA, Referenced to 25°C
ID = 250 µA, Referenced to 25°C
VDS = 24 V,
VGS = 0 V
VGS = ±20 V,
VDS = 0 V
VDS = VGS,
VDS = VGS,
ID = 1 mA
ID = 250 µA
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
30
30
Q2
Q1
1
1
V
28
24
mV/°C
500
1
±100
µA
3
3
V
nA
(Note 2)
VGS(th)
Gate Threshold Voltage
∆VGS(th)
∆TJ
Gate Threshold Voltage
Temperature Coefficient
RDS(on)
Static Drain-Source
On-Resistance
Q2
–3.1
ID = 250 uA, Referenced to 25°C
Q1
–4.3
VGS = 10 V, ID = 8.6 A
VGS = 10 V, ID = 8.6 A, TJ = 125°C
VGS = 4.5 V, ID = 7.5 A
VGS = 10 V, ID = 6.3 A
VGS = 10 V, ID = 6.3 A, TJ = 125°C
VGS = 4.5 V, ID = 5.6 A
VGS = 10 V,
VDS = 5 V
Q2
11
16
13
20
26
25
ID = 1 mA, Referenced to 25°C
ID(on)
On-State Drain Current
gFS
Forward Transconductance
1.4
1.9
VDS = 5 V,
VDS = 5 V,
ID = 8.6 A
ID = 6.3 A
VDS = 10 V,
f = 1.0 MHz
VGS = 0 V,
Q1
Q2
Q1
Q2
Q1
30
20
mV/°C
13.5
20.0
16.5
28
33
35
mΩ
A
32
19
S
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
1250
610
410
180
130
85
1.4
2.2
pF
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
9
10
6
7
27
24
11
3
12
12
13
14
19
15
10
5
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
VGS = 15mV,
f = 1.0 MHz
pF
pF
Ω
(Note 2)
VDD = 15 V, ID = 1 A,
VGS = 10V, RGEN = 6 Ω
VDD = 15 V, ID = 1 A,
VGS = 4.5V, RGEN = 6 Ω
18
20
12
14
44
39
20
6
22
22
23
25
34
27
20
10
ns
ns
ns
ns
ns
ns
ns
ns
FDS6982AS Rev B1
FDS6982AS
Electrical Characteristics
Symbol
Parameter
Switching Characteristics
Qg(TOT)
Qg
Qgs
Qgd
TA = 25°C unless otherwise noted
(continued)
Test Conditions
Type Min
Typ Max Units
(Note 2)
Total Gate Charge at Vgs=10V
Total Gate Charge at Vgs=5V
Q2:
VDS = 15 V, ID = 11.5A
Q1:
VDS = 15 V, ID = 6.3A
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Gate–Source Charge
Gate–Drain Charge
21
11
12
6
3.1
1.8
3.6
2.4
30
15
16
9
nC
nC
nC
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
Trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
Trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VSD
Drain-Source Diode Forward
Voltage
IF = 11.5 A,
diF/dt = 300 A/µs
Q2
Q1
Q2
(Note 3)
IF = 6.3 A,
diF/dt = 100 A/µs
(Note 2)
(Note 2)
(Note 2)
A
19
ns
12
nC
ns
Q1
20
Q2
Q2
Q1
9
0.5
0.6
0.8
(Note 3)
VGS = 0 V, IS = 3 A
VGS = 0 V, IS = 6 A
VGS = 0 V, IS = 1.3 A
3.0
1.3
nC
0.7
1.0
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a)
78°C/W when
mounted on a
2
0.5in pad of 2
oz copper
b)
125°C/W when
mounted on a
0.02 in2 pad of
2 oz copper
c)
135°C/W when
mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3. See “SyncFET Schottky body diode characteristics” below.
4
5
FDS6982AS Rev B1
FDS6982AS
Electrical Characteristics
FDS6982AS
Typical Characteristics: Q2
30
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
2.6
3.0V
VGS = 10V
3.5V
4.5V
20
10
2.5V
2.2
2
1.8
1.6
0
3.5V
4.0V
1.2
4.5V
1
0.5
1
1.5
VDS, DRAIN-SOURCE VOLTAGE (V)
0
2
Figure 1. On-Region Characteristics.
6.0V
10V
10
20
ID, DRAIN CURRENT (A)
30
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.4
0.05
ID = 8.6A
VGS = 10V
ID = 4.3 A
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3.0V
1.4
0.8
0
1.2
1
0.8
0.6
-50
-25
0
25
50
75
o
TJ, JUNCTION TEMPERATURE ( C)
100
0.04
0.03
o
TA = 125 C
0.02
o
TA = 25 C
0.01
0
125
2
Figure 3. On-Resistance Variation with
Temperature.
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
30
VGS = 0V
IS, REVERSE DRAIN CURRENT (A)
VDS = 5V
25
ID, DRAIN CURRENT (A)
VGS = 2.5V
2.4
20
15
o
TA = 125 C
-55oC
10
5
25oC
0
1
1.5
2
2.5
3
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
3.5
1
o
TA = 125 C
o
25 C
-55oC
0.1
0.01
0
0.2
0.4
0.6
VSD, BODY DIODE FORWARD VOLTAGE (V)
0.8
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6982AS Rev B1
FDS6982AS
Typical Characteristics: Q2
2000
8
1600
VDS = 10V
20V
6
15V
4
1200
Ciss
800
Coss
2
400
0
0
Crss
0
5
10
15
Qg, GATE CHARGE (nC)
20
25
0
Figure 7. Gate Charge Characteristics.
5
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance Characteristics.
100
P(pk), PEAK TRANSIENT POWER (W)
50
RDS(ON) LIMIT
100µs
1ms
10ms
10
100ms
1s
10s
1
DC
VGS = 10V
SINGLE PULSE
RθJA = 135oC/W
0.1
o
TA = 25 C
0.1
1
10
VDS, DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
100
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
ID, DRAIN CURRENT (A)
f = 1MHz
VGS = 0 V
ID = 8.6A
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
0.01
0.1
1
t1, TIME (sec)
10
100
1000
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
RθJA = 135°C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
t1
0.01
SINGLE PULSE
0.001
0.0001
0.001
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6982AS Rev B1
FDS6982AS
Typical Characteristics Q1
VGS = 10V
4.0V
2.6
3.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
20
16
6.0V
12
4.5V
8
3.0V
4
0
1
VDS, DRAIN-SOURCE VOLTAGE (V)
1.8
3.5V
1.4
4.0V
4.5V
6.0V
1
0
2
Figure 12. On-Region Characteristics.
1.6
10V
5
10
ID, DRAIN CURRENT (A)
15
20
Figure 13. On-Resistance Variation with
Drain Current and Gate Voltage.
0.1
ID = 6.3A
VGS = 10V
ID = 3.15 A
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2.2
0.6
0
1.4
1.2
1
0.8
0.08
0.06
o
TA = 125 C
0.04
0.02
TA = 25oC
0
0.6
-50
-25
0
25
50
75
100
o
TJ, JUNCTION TEMPERATURE ( C)
125
2
150
Figure 14. On-Resistance Variation with
Temperature.
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 15. On-Resistance Variation with
Gate-to-Source Voltage.
100
20
IS, REVERSE DRAIN CURRENT (A)
VDS = 5V
ID, DRAIN CURRENT (A)
VGS = 3.0V
15
10
o
TA = 125 C
o
-55 C
5
25oC
VGS = 0V
10
o
TA = 125 C
1
25oC
0.1
o
-55 C
0.01
0.001
0.0001
0
1
1.5
2
2.5
3
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 16. Transfer Characteristics.
3.5
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 17. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6982AS Rev B1
FDS6982AS
Typical Characteristics Q1
800
f = 1MHz
VGS = 0 V
ID = 6.3A
8
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
VDS = 10V
6
20V
15V
4
600
Ciss
400
Coss
200
2
Crss
0
0
0
3
6
Qg, GATE CHARGE (nC)
9
0
12
Figure 18. Gate Charge Characteristics.
10
15
20
Figure 19. Capacitance Characteristics.
100
P(pk), PEAK TRANSIENT POWER (W)
50
RDS(ON) LIMIT
100µs
10
1ms
10ms
100ms
1s
10s
1
DC
VGS = 10V
SINGLE PULSE
o
RθJA = 135 C/W
0.1
TA = 25oC
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 135°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 20. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
ID, DRAIN CURRENT (A)
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
t1, TIME (sec)
10
100
1000
Figure 21. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * RθJA
RθJA = 135°C/W
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
0.001
0.0001
t1
0.01
SINGLE PULSE
0.001
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 22. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6982AS Rev B1
FDS6982AS
Typical Characteristics (continued)
SyncFET Schottky Body Diode
Characteristics
Schottky barrier diodes exhibit significant leakage at
high temperature and high reverse voltage. This will
increase the power in the device.
0.1
IDSS, REVERSE LEAKAGE CURRENT (A)
Current: 1.6A/DIV
Fairchild’s SyncFET process embeds a Schottky diode
in parallel with PowerTrench MOSFET. This diode
exhibits similar characteristics to a discrete external
Schottky diode in parallel with a MOSFET. Figure 23
shows the reverse recovery characteristic of the
FDS6982AS.
TA = 125oC
0.01
0.001
TA = 100oC
0.0001
0.00001
TA = 25oC
0.000001
0
5
10
15
20
VDS, REVERSE VOLTAGE (V)
25
30
Figure 25. SyncFET body diode reverse
leakage versus drain-source voltage and
temperature
Time: 10nS/DIV
Figure 23. FDS6982AS SyncFET body
diode reverse recovery characteristic.
Current: 1.6A/DIV
For comparison purposes, Figure 24 shows the reverse
recovery characteristics of the body diode of an
equivalent size MOSFET produced without SyncFET
(FDS6982).
Time: 10nS/DIV
Figure 24. Non-SyncFET (FDS6982) body
diode reverse recovery characteristic.
FDS6982AS Rev B1
FDS6982AS
Typical Characteristics
L
VDS
tP
VGS
RGE
+
DUT
VGS
-
0V
tp
vary tP to obtain
required peak IAS
BVDSS
VDS
IAS
VDD
VDD
IAS
0.01Ω
tAV
Figure 26. Unclamped Inductive Load Test
Circuit
Figure 27. Unclamped Inductive
Waveforms
Drain Current
Same type as
+
50kΩ
10V
-
10µF
1µF
+
VDD
VGS
-
QG(TOT)
10V
DUT
QGD
QGS
VGS
Ig(REF
Charge, (nC)
Figure 28. Gate Charge Test Circuit
Figure 29. Gate Charge Waveform
tON
VDS
VGS
RGEN
td(ON)
RL
VDS
+
VDD
DUT
VGSPulse Width ≤ 1µs
Duty Cycle ≤ 0.1%
Figure 30. Switching Time Test
Circuit
-
10%
0V
90%
10%
90%
VGS
0V
tr
90%
tOFF
td(OFF
tf
)
50%
10%
50%
Pulse Width
Figure 31. Switching Time Waveforms
FDS6982AS Rev B1
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidianries, and is not intended to be an exhaustive list of all such trademarks.
ACEx®
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Current Transfer Logic™
EcoSPARK®
EfficentMax™
EZSWITCH™ *
FPS™
F-PFS™
FRFET®
Global Power ResourceSM
Green FPS™
Green FPS™ e-Series™
GTO™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
MotionMax™
Motion-SPM™
OPTOLOGIC®
OPTOPLANAR®
™
®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
FAST®
FastvCore™
FlashWriter® *
®
PDP-SPM™
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
QS™
Quiet Series™
RapidConfigure™
Saving our world 1mW at a time™
SmartMax™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SuperMOS™
®
The Power Franchise®
tm
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™
UHC®
Ultra FRFET™
UniFET™
VCX™
VisualMax™
tm
* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1.
Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body or (b)
support or sustain life, and (c) whose failure to perform when
properly used in accordance with instructions for use provided
in the labeling, can be reasonably expected to result in a
significant injury of the user.
2.
A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve the design.
Obsolete
Not In Production
This datasheet contains specifications on a product that is discontinued by
Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I34
FDS6982AS Rev.B1