STMICROELECTRONICS 74LCX16244

74LCX16244
Low voltage CMOS 16-bit bus buffer (3-state)
with 5V tolerant inputs and outputs
Features
■
5V tolerant inputs and outputs
■
High speed:
– tPD = 4.5ns (Max) at VCC = 3V
■
Power down protection on inputs and outputs
■
Symmetrical output impedance:
– |IOH| = IOL = 24mA (Min) at VCC = 3V
■
PCI bus levels guaranteed at 24mA
■
Balanced propagation delays:
– tPLH ≅ tPHL
■
Operating voltage range:
– VCC (Opr) = 2.0V to 3.6V
■
Pin and function compatible with
74 series 16244
■
Latch-up performance exceeds
500mA (JESD 17)
■
ESD performance:
– HBM > 2000V
(MIL STD 883 method 3015); MM > 200V
TSSOP48
Description
The 74LCX16244 is a low voltage CMOS 16 bit
bus buffer (non-inverted) fabricated with submicron silicon gate and double-layer metal wiring
C2MOS technology. It is ideal for low power and
high speed 3.3V applications; it can be interfaced
to 5V signal environment for both inputs and
outputs.
Any nG output control governs four BUS
BUFFERS. Output Enable input (nG) tied together
gives full 16-bit operation.
When nG is LOW, the outputs are on. When nG is
HIGH, the output are in high impedance state.
This device is designed to be used with 3 state
memory address drivers, etc.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Order codes
Part number
Package
Packaging
74LCX16244TTR
TSSOP48
Tape and reel
February 2007
Rev 6
1/15
www.st.com
15
Contents
74LCX16244
Contents
1
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
2.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
4
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15
74LCX16244
1
Logic symbols and I/O equivalent circuit
Logic symbols and I/O equivalent circuit
Figure 1.
IEC logic symbols
Figure 2.
Input and output equivalent circuit
3/15
Pin settings
74LCX16244
2
Pin settings
2.1
Pin connection
Figure 3.
4/15
Pin connection (top through view)
74LCX16244
2.2
Logic states
Pin description
Table 1. Pin description
Pin N°
Symbol
1
1G
2, 3, 5, 6
1Y1 to 1Y4
Data outputs
8, 9, 11, 12
2Y1 to 2Y4
Data outputs
13, 14, 16, 17
3Y1 to 3Y4
Data outputs
19, 20, 22, 23
4Y1 to 4Y4
Data outputs
24
4G
Output enable input
25
3G
Output enable input
30, 29, 27, 26
4A1 to 4A4
Data outputs
36, 35, 33, 32
3A1 to 3A4
Data outputs
41, 40, 38, 37
2A1 to 2A4
Data outputs
47, 46, 44, 43
1A1 to 1A4
Data outputs
48
2G
4, 10, 15, 21, 28, 34, 39,
45
GND
Ground (0V)
7, 18, 31, 42
VCC
Positive supply voltage
3
Logic states
3.1
Truth table
Name and function
Output enable input
Output enable input
Table 2. Truth table
Inputs
Note:
Output
G
An
Yn
L
L
L
L
H
H
H
X
Z
X : Do not care
Z : High impedance
5/15
Maximum rating
4
74LCX16244
Maximum rating
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. these are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. exposure to absolute maximum rating conditions for
extended periods may affect device reliability. refer also to the STMicroelectronics sure
program and other relevant quality documents.
Table 3. Absolute maximum ratings
Symbol
Value
Unit
Supply voltage
-0.5 to +7.0
V
VI
DC input voltage
-0.5 to +7.0
V
VO
DC output voltage (OFF state)
-0.5 to +7.0
V
VO
DC output voltage (high or low state) (1)
-0.5 to VCC + 0.5
V
IIK
DC input diode current
-50
mA
IOK
DC output diode current (2)
-50
mA
IO
DC output current
±50
mA
ICC
DC supply current per supply pin
± 100
mA
IGND
DC ground current per supply pin
± 100
mA
Tstg
Storage temperature
-65 to +150
°C
300
°C
Value
Unit
2.0 to 3.6
V
VCC
TL
Parameter
Lead temperature (10 sec)
1. IO absolute maximum rating must be observed
2. VO < GND
4.1
Recommended operating conditions
Table 4. Recommended operating conditions
Symsbol
VCC
Parameter
Supply voltage (1)
VI
Input voltage
0 to 5.5
V
VO
Output voltage (OFF state)
0 to 5.5
V
VO
Output voltage (high or low state)
0 to VCC
V
IOH, IOL
High or low level output current (VCC = 3.0 to 3.6V)
± 24
mA
IOH, IOL
High or low level output current (VCC = 2.7V)
± 12
mA
-40 to 85
°C
0 to 10
ns/V
Top
dt/dv
Operating temperature
Input rise and fall time (2)
1. Truth table guaranteed: 1.5V to 3.6V
2. VIN from 0.8V to 2V at VCC = 3.0V
6/15
74LCX16244
5
Electrical characteristics
Electrical characteristics
Table 5. DC specifications
Test condition
Symbol
Parameter
VIH
High level input voltage
VIL
Low level input voltage
VOH
-40 to 85°C
VCC
(V)
Min
Unit
Max
2.0
V
2.7 to 3.6
0.8
2.7 to 3.6
IO = -100µA
VCC-0.2
2.7
IO = -12mA
2.2
IO = -18mA
2.4
IO = -24mA
2.2
High level output voltage
3.0
VOL
Value
V
2.7 to 3.6
IO = 100µA
0.2
2.7
IO = 12mA
0.4
IO = 16mA
0.4
IO = 24mA
0.55
Low level output voltage
3.0
V
V
II
Input leakage current
2.7 to 3.6
VI = 0 to 5.5V
±5
µA
Ioff
Power OFF leakage
current
0
VI or VO = 5.5V
10
µA
IOZ
High impedance output
leakage current
2.7 to 3.6
VI = VIH or VIL
VO = 0 to VCC
±5
µA
Quiescent supply current
2.7 to 3.6
VI = VCC or GND
20
ICC
VI or VO = 3.6 to 5.5V
± 20
VIH = VCC - 0.6V
500
∆ICC
I incr. per Input
2.7 to 3.6
µA
µA
Table 6. Dynamic switching characteristics
Test condition
Symbol
VOLP
VOLV
Parameter
Dynamic low level quiet
output (1)
TA = 25 °C
VCC
(V)
3.3
Value
Min
CL = 50pF
VIL = 0V, VIH = 3.3V
Typ
Unit
Max
0.8
V
-0.8
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the LOW state.
7/15
Electrical characteristics
74LCX16244
Table 7. AC electrical characteristics
Test condition
Symbol
Parameter
tPLH tPHL
Propagation delay
time
tPZL tPZH
Output enable
time
tPLZ tPHZ
Output disable
time
tOSLH
tOSHL
Output to output
skew time (1) (2)
VCC
(V)
Value
CL
(pF)
RL
(Ω)
ts = tr
(ns)
50
500
2.5
2.7
2.7
500
50
500
5.2
1.5
4.5
1.5
6.3
1.5
5.5
1.5
5.7
1.5
5.4
2.5
ns
3.0 to 3.6
3.0 to 3.6
1.5
ns
2.7
500
Max
2.5
3.0 to 3.6
50
Min
Unit
ns
3.0 to 3.6
50
-40 to 85 °C
2.5
1.0
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|,
tOSHL = | tPHLm - tPHLn|)
2. Parameter guaranteed by design
Table 8. Capacitive characteristics
Test condition
Symbol
Parameter
Value
TA = 25 °C
VCC
(V)
Min
Typ
Unit
Max
Input capacitance
3.3
VIN = 0 to VCC
7
pF
COUT
Output capacitance
3.3
VIN = 0 to VCC
8
pF
CPD
Power dissipation
capacitance (1)
3.3
fIN = 10MHz
VIN = 0 or VCC
20
pF
CIN
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to Test Circuit). Average operating current can be
obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
8/15
74LCX16244
6
Test circuit
Test circuit
Figure 4.
Test circuit
Figure 5.
Test circuit
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V
tPZH, tPHZ
GND
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
9/15
Waveforms
7
10/15
74LCX16244
Waveforms
Figure 6.
Propagation delays (f = 1MHz; 50% duty cycle)
Figure 7.
Output enable and disable time (f = 1MHz; 50% duty cycle)
74LCX16244
8
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/15
Package mechanical data
74LCX16244
TSSOP48 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
A
MIN.
TYP.
1.2
A1
0.05
0.047
0.15
A2
MAX.
0.002
0.006
0.9
0.035
b
0.17
0.27
0.0067
0.011
c
0.09
0.20
0.0035
0.0079
D
12.4
12.6
0.488
0.496
E
8.1 BSC
E1
6.0
0.318 BSC
6.2
e
0.236
0.5 BSC
0.244
0.0197 BSC
K
0°
8°
0°
8°
L
0.45
0.75
0.018
0.030
A
A2
A1
b
K
e
L
E
c
D
E1
PIN 1 IDENTIFICATION
1
7065588D
12/15
74LCX16244
Package mechanical data
Tape & Reel TSSOP48 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
30.4
0.519
1.197
Ao
8.7
8.9
0.343
0.350
Bo
13.1
13.3
0.516
0.524
Ko
1.5
1.7
0.059
0.067
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
13/15
Revision history
9
74LCX16244
Revision history
Table 9. Revision history
14/15
Date
Revision
Changes
15-Sep-2004
5
Ordering Codes Revision - pag. 1.
06-Feb-2007
6
Document reformatted, temperature ranges updated
74LCX16244
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15/15