STMICROELECTRONICS 74VHC138MTR

74VHC138
3 TO 8 LINE DECODER (INVERTING)
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HIGH SPEED: tPD = 5.7ns (TYP.) at VCC = 5V
LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
HIGH NOISE IMMUNITY:
VNIH = VNIL = 28% VCC (MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHC138 is an advanced high-speed
CMOS 3 TO 8 LINE DECODER (INVERTING)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
If the device is enabled, 3 binary select (A, B, and
C) determine which one of the outputs will go low.
If enable input G1 is held low or either G2A or G2B
is held high, the decoding function is inhibited and
all the 8 outputs go to high.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
T&R
SOP
TSSOP
74VHC138MTR
74VHC138TTR
Tree enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
November 2004
Rev. 4
1/12
74VHC138
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
1, 2, 3
4, 5
6
15, 14, 13,
12, 11, 10, 9,
7
8
16
A, B, C
G2A, G2B
G1
Y0 to Y7
GND
VCC
NAME AND FUNCTION
Address Inputs
Enable Inputs
Enable Input
Outputs
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
INPUTS
OUTPUTS
ENABLE
SELECT
G2B
G2A
G1
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
H
L
L
L
L
L
L
L
L
X
H
X
L
L
L
L
L
L
L
L
L
X
X
H
H
H
H
H
H
H
H
X
X
X
L
L
L
L
H
H
H
H
X
X
X
L
L
H
H
L
L
H
H
X
X
X
L
H
L
H
L
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
X : Don’t care
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
2/12
74VHC138
Table 4: Absolute Maximum Ratings
Symbol
VCC
Parameter
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Current
ICC or IGND DC VCC or Ground Current
Storage Temperature
Tstg
TL
Lead Temperature (10 sec)
Value
Unit
-0.5 to +7.0
V
-0.5 to +7.0
V
-0.5 to VCC + 0.5
- 20
V
mA
± 20
mA
± 25
mA
± 75
mA
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions
Symbol
VCC
Parameter
Supply Voltage
Value
Unit
2 to 5.5
V
VI
Input Voltage
0 to 5.5
V
VO
Output Voltage
0 to VCC
V
Top
Operating Temperature
-55 to 125
°C
0 to 100
0 to 20
ns/V
dt/dv
Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V)
(VCC = 5.0 ± 0.5V)
1) VIN from 30% to 70% of VCC
3/12
74VHC138
Table 6: DC Specifications
Test Condition
Symbol
VIH
VIL
VOH
VOL
II
ICC
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
Value
TA = 25°C
VCC
(V)
Min.
2.0
3.0 to
5.5
2.0
3.0 to
5.5
Typ.
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
1.5
1.5
1.5
0.7VCC
0.7VCC
0.7VCC
Max.
V
0.5
0.5
0.5
0.3VCC
0.3VCC
0.3VCC
2.0
IO=-50 µA
1.9
2.0
1.9
1.9
3.0
IO=-50 µA
2.9
3.0
2.9
2.9
4.5
IO=-50 µA
4.4
4.5
3.0
IO=-4 mA
2.58
3.94
4.4
4.4
2.48
2.4
Unit
V
V
4.5
IO=-8 mA
2.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=50 µA
0.0
0.1
0.1
0.1
4.5
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=4 mA
0.36
0.44
0.55
4.5
IO=8 mA
0.36
0.44
0.55
0 to
5.5
VI = 5.5V or GND
± 0.1
±1
±1
µA
5.5
VI = VCC or GND
4
40
40
µA
3.8
3.7
V
Table 7: AC Electrical Characteristics (Input tr = tf = 3ns)
Test Condition
Symbol
tPLH
tPHL
Parameter
Propagation Delay
Time
A, B, C, to Y
VCC
(V)
CL
(pF)
3.3(*)
(*)
(**)
Propagation Delay
Time
G to Y
Propagation Delay
Time
G2A, G2B to Y
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
4/12
-55 to 125°C
Min.
Max.
Min.
Max.
15
8.2
11.4
1.0
13.0
1.0
13.0
50
10.0
15.8
1.0
18.0
1.0
18.0
15
5.7
8.1
1.0
9.5
1.0
9.5
5.0(**)
50
7.2
10.1
1.0
11.5
1.0
11.5
3.3(*)
15
8.1
12.8
1.0
15.0
1.0
15.0
(*)
50
10.6
16.3
1.0
18.5
1.0
18.5
(**)
15
5.6
8.1
1.0
9.5
1.0
9.5
5.0(**)
50
7.1
10.1
1.0
11.5
1.0
11.5
3.3(*)
15
8.2
11.4
1.0
13.5
1.0
13.5
3.3(*)
50
10.7
14.9
1.0
17.0
1.0
17.0
5.0(**)
15
5.8
8.1
1.0
9.5
1.0
9.5
5.0(**)
50
7.3
10.1
1.0
11.5
1.0
11.5
3.3
3.3
Min.
-40 to 85°C
Max.
5.0
tPLH
tPHL
TA = 25°C
Typ.
5.0
tPLH
tPHL
Value
Unit
ns
ns
ns
74VHC138
Table 8: Capacitive Characteristics
Test Condition
Symbol
Parameter
Value
TA = 25°C
Min.
Typ.
Max.
10
CIN
Input Capacitance
6
CPD
Power Dissipation
Capacitance
(note 1)
34
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
Figure 4: Test Circuit
CL =15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
Figure 5: Waveform - Propagation Delays For Inverting Outputs (f=1MHz; 50% duty cycle)
5/12
74VHC138
Figure 6: Waveform - Propagation Delays For Non-inverting Outputs (f=1MHz; 50% duty cycle)
6/12
74VHC138
SO-16 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.25
a2
MAX.
0.004
0.010
1.64
0.063
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
9.8
10
0.385
0.393
E
5.8
6.2
0.228
0.244
e
1.27
e3
0.050
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.62
0.024
8° (max.)
0016020D
7/12
74VHC138
TSSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
8/12
74VHC138
Tape & Reel SO-16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
22.4
0.519
0.882
Ao
6.45
6.65
0.254
0.262
Bo
10.3
10.5
0.406
0.414
Ko
2.1
2.3
0.082
0.090
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
9/12
74VHC138
Tape & Reel TSSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
10/12
TYP
0.504
22.4
0.519
0.882
Ao
6.7
6.9
0.264
0.272
Bo
5.3
5.5
0.209
0.217
Ko
1.6
1.8
0.063
0.071
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
74VHC138
Table 9: Revision History
Date
Revision
12-Nov-2004
4
Description of Changes
Order Codes Revision - pag. 1.
11/12
74VHC138
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to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
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