HDMIULC6-2x6 Ultra large bandwidth ESD protection Features ■ 2-line ESD protection (at 15 kV air and contact discharge, exceeds IEC 61000-4-2) ■ Ultra low capacitance: 0.6 pF @ 825 MHz ■ Ultra high bandwidth - no influence on signal rise and fall times - maximised number of signal harmonics ■ Very low leakage current: 0.5 µA max. ■ Fast response time compared with varistors Complies with these standards ■ Protects VBUS when applicable ■ ■ RoHS compliant IEC 61000-4-2 level 4 – 15 kV air discharge – 8 kV contact discharge ■ MIL STD883G-Method 3015-7 Benefits ■ ESD standards compliance guaranteed at device level, thus greater immunity at system level µQFN (pin view) HDMIULC6-2M6 SOT-666 HDMIULC6-2P6 Applications ■ ESD protection of VBUS when applicable. ■ HDMI ports at 1.65 Gb/s and up to 3.2 Gb/s ■ High efficiency due to low residual voltage when confronted by an ESD surge ■ IEEE 1394a, b, or c up to 3.2 Gb/s ■ USB 2.0 ports up to 480 Mb/s (Hi-Speed) ■ Large bandwidth to minimize impact on data signal quality ■ Ethernet port: 10/100/1000 Mb/s ■ Video line protection ■ Consistent D+ / D- signal balance: – Ultra low impact on intra- and inter-pair skew – Matching high bit rate HDMI requirements and ready for future evolution ■ Low PCB space occupation - 1.45 mm2 for µQFN ■ Low leakage current for longer operation of battery powered devices ■ Higher reliability offered by monolithic integration ■ 500 µm pitch for µQFN 6 leads May 2008 Description The HDMIULC6-2x6 is a monolithic, application specific discrete device dedicated to ESD protection of the HDMI connection. It also offers the same high level of protection for IEEE 1394a and IEEE 1394b/c, USB 2.0, Ethernet links, and video lines. Its ultra high cutoff frequency (5.9 GHz) secures a high level of signal integrity. The device topology provides this integrity without compromising the complete protection of ICs against the most stringent ESD strikes. Rev 1 1/17 www.st.com Characteristics 1 HDMIULC6-2x6 Characteristics Figure 1. Functional diagram I/O1 1 6 I/O1 VBUS GND 2 5 VBUS I/O2 I/O2 3 4 I/O2 I/O1 1 6 I/O1 GND 2 5 I/O2 3 4 µQFN 6 leads SOT666 When used with a HDMI application, Pin 5 should not be connected to protect against backdrive current flow on data lines. Table 1. Absolute ratings Symbol Parameter VPP Peak pulse voltage Tstg Storage temperature range Value Unit ±15 ±15 ±25 kV -55 to +150 °C IEC 61000-4-2 air discharge IEC 61000-4-2 contact discharge MIL STD883G-Method 3015-7 Tj Maximum junction temperature 125 °C TL Lead solder temperature (10 seconds duration) 260 °C Table 2. Electrical characteristics (Tamb = 25 °C) Value Symbol Parameter Test Conditions Unit Min. IRM Leakage current VRM = 5 V VBR Breakdown voltage between VBUS and GND IR = 1 mA VCL Ci/o-GND ΔCi/o-GND Ci/o-i/o 2/17 Typ. Max 0.5 6 µA V IPP = 1 A, tp = 8/20 µs Any I/O pin to GND 12 V IPP = 5 A, tp = 8/20 µs Any I/O pin to GND 17 V 0.85 pF Clamping voltage Capacitance between I/O and GND VR = 0 V, F = 825 MHz Capacitance variation between I/O and GND VR = 0 V, F = 1 MHz Capacitance between I/O VR = 0 V, F = 825 MHz 0.02 pF 0.5 pF HDMIULC6-2x6 Figure 2. Characteristics Line capacitance versus line voltage (typical values) Figure 3. C(pF) Line capacitance versus frequency (typical values) HDMIULC6-2M6 C(pF) 1.0 1.0 F=825MHz Vosc=500mVRMS VBUS OPEN Tj =25 °C 0.9 0.8 0.7 Vosc=30mVRMS Tj =25°C VI-O/GND = 0V VBUS OPEN 0.9 0.8 0.7 0.6 0.6 0.5 CI/O - GND 0.5 0.4 0.4 0.3 0.3 0.2 CI/O - GND 0.2 0.1 CI/O - CI/O 0.1 Data line voltage (v) 0 F(MHz) 0 0.0 Figure 4. 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1 10 Line capacitance versus frequency Figure 5. (typical values) HDMIULC6-2P6 100 1000 10000 Frequency response (typical values) HDMIULC6-2M6 S21(db) 0.00 C(pF) 1.0 Fc=5.9GHz Vosc=30mVrms Tj = 25 °C VI-O/GND = 0V VBUS OPEN 0.9 0.8 - 4.00 0.7 C I/O - GND 0.6 - 8.00 0.5 0.4 0.3 C I/O – I/O 0.2 - 12.00 0.1 F(MHz) F(Hz) 0.0 1 10 100 1000 10000 - 16.00 300.0k Figure 6. Frequency response (typical values) HDMIULC6-2P6 Figure 7. 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Relative variation of leakage current versus junction temperature (typical values) S21(db) 0.00 IRM[Tj] / IRM[Tj=25°C] 5 Fc=5.3GHz 4 - 4.00 3 - 8.00 2 - 12.00 Tj(°C) F(Hz) 1 25 - 16.00 300.0k 1.0M 3.0M Ligne 10.0M 30.0M 100.0M 300.0M 1.0G 50 75 100 125 3.0G 2 3/17 Characteristics Figure 8. Eye diagram at 1.65 Gbps amplitude 500 mV PCB + HDMIULC6-2M6 Horizontal: 100 ps/div Vertical: 200 mV/div Figure 10. Eye diagram at 1.65 Gbps amplitude 500 mV PCB + HDMIULC6-2P6 Horizontal: 100 ps/div Vertical: 200 mV/div 4/17 HDMIULC6-2x6 Figure 9. Eye diagram at 3.2 Gbps amplitude 500 mV PCB + HDMIULC6-2M6 Horizontal: 50 ps/div Vertical: 200 mV/div Figure 11. Eye diagram at 3.2 Gbps amplitude 500 mV PCB + HDMIULC6-2P6 Horizontal: 50 ps/div Vertical: 200 mV/div HDMIULC6-2x6 2 Application examples Application examples Figure 12. HDMI single link application Host (Set Top Box, DVD player, PC) HDMI HDMI Tx0Tx0+ 1 6 1 6 2 5 2 5 3 4 3 4 TMDS transmitter video Tx1+ Multimedia controller TMDS receiver 1 6 1 6 2 5 2 5 3 4 3 4 Rx1- video Rx1+ audio audio Ctrl / status Rx0+ HDMI connectors Tx1- Display (TV, flat panel, monitor, projector) Rx0- HDMIULC6-2P6 HDMIULC6-2M6 controller Tx2- 1 2 5 2 5 Tx2+ 3 4 3 4 TCTC+ 1 6 6 1 6 1 6 2 5 2 5 3 4 3 4 Ctrl / status Rx2Rx2+ RCRC+ TMDS links CEC CEC SCL SCL Vcc 5V Vcc 5V HDMIULC6-4SC6 HDMIULC6-4SC6 or USBLC6-4SC6 SDA SDA HPD HPD Control links Figure 13. T1/E1/Ethernet protection +VCC Tx 100nF SMP75-8 D A TA TRANSCEIVER +VCC Rx 100nF SMP75-8 5/17 Application examples 2.1 HDMIULC6-2x6 PCB layout considerations Figure 14. PCB layout example Width=100 µm Space=400 µm All dimensions in µm 3160 3160 Width=215 µm PCB Characteristics Space=100 µm Substrate: H = 730 m, Er =3.9 Z0diff=100 Ω Tracks: H = 35 µm copper Coatinbg: H = 35 µm above substrate: H = 10 µm above tracks, Er = 3.4 GND plane on the bottom layer Figure 15. TDR results for HDMIULC6-2M6 with PCB layout example 6/17 HDMIULC6-2x6 Technical information 3 Technical information 3.1 Surge protection The HDMIULC6-2x6 is particularly optimized to perform ESD surge protection based on the rail to rail topology. The clamping voltage VCL can be calculated as follows: VCL+ = VTRANSIL + VF for positive surges VCL- = - VF for negative surges with: VF = VT + Rd.Ip (VF forward drop voltage) / (VT forward drop threshold voltage) and VTRANSIL = VBR + Rd_TRANSIL . IP Calculation example We assume that the value of the dynamic resistance of the clamping diode is typically: Rd = 0.5 Ω and VT = 1.1 V. We assume that the value of the dynamic resistance of the transil diode is typically Rd_TRANSIL = 0.5 Ω and VBR = 6.1 V For an IEC 61000-4-2 surge Level 4 (Contact Discharge: Vg= 8 kV, Rg= 330 Ω), VBUS = +5 V, and, in first approximation, we assume that: Ip = Vg / Rg = 24 A. We find: VCL+ = +31.2 V VCL- = -13.1 V Note: The calculations do not take into account phenomena due to parasitic inductances. 3.2 Surge protection application example If we consider that the connections from the pin VBUS to VCC, from I/O to data line, and from GND to PCB GND plane are two tracks 10 mm long and 0.5 mm wide, we can assume that the parasitic inductances, LVBUS, LI/O, and LGND, of these tracks are about 6 nH. So when an IEC 61000-4-2 surge occurs on the data line, due to the rise time of this spike (tr = 1 ns), the voltage VCL has an extra value equal to LI/O.dI/dt + LGND.dI/dt. The dI/dt is calculated as: dI/dt = Ip/tr = 24 A/ns for an IEC 61000-4-2 surge level 4 (contact discharge Vg = 8 kV, Rg = 330 Ω) The over voltage due to the parasitic inductances is: LI/O.dI/dt = LGND.dI/dt = 6 x 24 = 144 V By taking into account the effect of these parasitic inductances due to unsuitable layout, the clamping voltage will be: VCL+ = +31.2 + 144 +144 = 319.2 V VCL- = -13.1 - 144 -144 = -301.1 V We can reduce as much as possible these phenomena with simple layout optimization. 7/17 Technical information HDMIULC6-2x6 Figure 16. ESD behavior: parasitic phenomena due to unsuitable layout ESD surge on data line VCL+ VBUS Data line LI/O LI/O di L VBUS dt L I/O di di + L GND dt dt POSITIVE SURGE Vcc pin VF VTRANSIL VTRANSIL +VF VCL I/O pin t tr=1ns GND pin LGND LGND tr=1ns di dt t -VF di di + L GND dt dt di di - L GND dt dt VCL + = VTRANSIL + VF + L I/O surge > 0 VCL - = - VF - L I/O surge < 0 - L I/O di di - L GND dt dt NEGATIVE SURGE VTRANSIL = VBR + Rd.Ip VCL- Figure 17. ESD behavior - measurement conditions ESD SURGE TEST BOARD IN Figure 18. Remaining voltage after the HDMIULC6-2M6 during positive ESD surge Figure 19. Remaining voltage after the HDMIULC6-2M6 during negative ESD surge 10V/Div 10V/Div 100ns/Div 8/17 OUT 100ns/Div HDMIULC6-2x6 Technical information Figure 20. Remaining voltage after the HDMIULC6-2P6 during positive ESD surge Figure 21. Remaining voltage after the HDMIULC6-2P6 during negative ESD surge 10V/Div 10V/Div 100ns/Div 100ns/Div Important An important precaution to take is to put the protection device as close as possible to the disturbance source (generally the connector). 3.3 Crosstalk behavior Figure 22. Crosstalk phenomena RG1 Line 1 VG1 RL1 RG2 VG2 RL2 DRIVERS α 1 VG1 + β12VG2 Line 2 α 2VG2 + β21VG1 RECEIVERS The crosstalk phenomena is due to the coupling between 2 lines. The coupling factor (β12 or β21) increases when the gap across lines decreases, particularly in silicon dice. In the example above the expected signal on load RL2 is α2VG2, in fact the real voltage at this point has got an extra value β21VG1. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or high load impedance (few kΩ). 9/17 Technical information HDMIULC6-2x6 Figure 23. Analog crosstalk measurements TEST BOARD NETWORK ANALYSER PORT 2 NETWORK ANALYSER PORT 1 Figure 23 gives the measurement circuit for the analog application. In usual frequency range of analog signals (up to 240 MHz) the effect on disturbed line is less than -40 dB (see Figure 24 and Figure 25). Figure 24. Analog crosstalk results (typical values) for HDMIULC6-2M6 dB 0.00 -7.6dB@7GHz - 30.00 - 60.00 - 90.00 F (Hz) - 120.00 300.0k 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Figure 25. Analog crosstalk results (typical values) for HDMIULC6-2P6 dB 0.00 7.2dB@7GHz - 30.00 - 60.00 - 90.00 F (Hz) - 120.00 300.0k 10/17 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G HDMIULC6-2x6 Recommendation on PCB assembly 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness) Figure 26. Stencil opening dimensions. L T b) W General Design Rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- ≥ 1.5 T L×W Aspect Area = ---------------------------- ≥ 0.66 2T ( L + W ) 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 90%. Figure 27. Recommended stencil window position (µQFN only) 7 µm 7 µm 620 µm 650 µm 15 µm 236 µm 15 µm 250 µm Footprint Stencil window Footprint 11/17 Recommendation on PCB assembly 4.2 4.3 4.4 12/17 HDMIULC6-2x6 Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed. 4. Solder paste with fine particles: powder particle size is 20-45 µm. Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. HDMIULC6-2x6 4.5 Recommendation on PCB assembly Reflow profile Figure 28. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec Note: 6 7 Time (min) 90 sec max Minimize air convection currents in the reflow oven to avoid component movement. 13/17 Package information 5 HDMIULC6-2x6 Package information ● Epoxy meets UL94, V0 In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Table 3. Micro QFN 1.45x1.00 6L dimensions Dimensions D Ref. N E 1 2 A A1 1 Millimeters Inches Min. Typ. Max. Min. Typ. A 0.50 0.55 0.60 0.020 0.022 0.024 A1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.18 0.25 0.30 0.007 0.010 0.012 D 1.45 0.057 E 1.00 0.039 e 0.50 0.020 Max. 2 L k b e K 0.20 L 0.30 0.008 0.35 0.40 0.012 0.014 0.016 Figure 29. µQFN 6 leads footprint dimensions in mm [inches] 0.50 [0.020] 0.25 [0.010] 0.65 [0.026] 0.30 1.60 [0.012] [0.063] Note: 14/17 Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. HDMIULC6-2x6 Package information Table 4. SOT-666 dimensions Dimensions b1 Ref. Millimeters Inches L1 Min. L3 Typ. Max. Min. Typ. Max. A 0.45 0.60 0.018 0.024 A3 0.08 0.18 0.003 0.007 b 0.17 0.34 0.007 0.013 b1 0.19 D 1.50 1.70 0.059 0.067 E 1.50 1.70 0.059 0.067 E1 1.10 1.30 0.043 0.051 b D E1 0.27 0.34 0.007 0.011 0.013 A L2 E A3 e 0.50 0.020 L1 0.19 0.007 L2 0.10 0.30 0.004 0.012 e L3 0.10 0.004 Figure 30. Footprint (dimensions in mm) 0.50 0.62 2.60 0.99 0.30 15/17 Ordering information 6 HDMIULC6-2x6 Ordering information Table 5. Ordering information Order code Marking Package Weight Base qty Delivery mode HDMIULC6-2M6 T(1) µQFN 6 leads 2.2 mg 3000 Tape and reel HDMIULC6-2P6 R SOT-666 2.9 mg 3000 Tape and reel 1. The marking can be rotated by 90° to diferentiate assembly location 7 Revision history Table 6. 16/17 Document revision history Date Revision 06-May-2008 1 Description of changes First issue. HDMIULC6-2x6 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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