L3914A L3924A - L3934A SPEECH AND 14 MEMORY DIALER WITH HOLD FUNCTION ADVANCE DATA SPEECH CIRCUIT 2 TO 4 WIRES CONVERSION PRESENT THE PROPER DC PATH FOR THE LINE CURRENT AND THE FLEXIBILITY TO ADJUST IT AND ALLOW PARALLEL PHONE OPERATION PROVIDES SUPPLY WITH LIMITED CURRENT FOR EXTERNAL CIRCUITRY SYMMETRICAL HIGH IMPEDANCE MICROPHONE INPUTS SUITABLE FOR DYNAMIC ELECTRET OR PIEZOELECTRIC TRANSDUCER ASYMMETRICAL EARPHONE OUTPUT SUITABLE FOR DYNAMIC TRANSDUCER LINE LOSS COMPENSATION INTERNAL MUTING TO DISABLE SPEECH DURING DIALING HOLD FUNCTION FOR PARALLEL PHONE WITH 400ms DELAY TO PREVENT FALSE RELEASE DIALER CIRCUIT 32 DIGITS FOR LAST NUMBER REDIAL BUFFER 18 DIGITS FOR 13 MEMORY REDIAL ALLOW MIXED MODE DIALING IN EITHER TONE OR PULSE MODE PACIFIER TONE PROVIDES AUDIBLE INDICATION OF VALID KEY PRESSED IN A BUZZER OR/AND IN THE EARPHONE TIMED PABX PAUSE FLASH INITIATES TIMED BREAK: MASK OPTIONS WITH 585ms,300ms,100ms CONTINUOUS TONE FOR EACH DIGIT UNTIL KEY RELEASE USES INEXPENSIVE 3.579545MHz CERAMIC RESONATOR POWERED FROM TELEPHONE LINE, LOW OPERATING VOLTAGE FOR LONG LOOP APPLICATION DESCRIPTION The device consists of the speech and the dialer. It provides the DC line interface circuit that terminates the telephone line, analog amplifier for speech transmission and necessary signals for either DTMF or loop disconnect (pulse) dialing. January 1995 DIP28 SO28 ORDERING NUMBERS: L3914AN L3914AD L3924AN L3924AD L3934AN L3934AD PIN CONNECTION (Top view) KEYPAD CONFIGURATION Note: PAUSE/LND: PAUSE and LND functions are sharing the same key with different sequence. Hereafter, PAUSE and LND keys arereferring to the same key. 1/15 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. L3914A - L3924A - L3934A BLOCK DIAGRAM When mated with a tone ringer, a complete telephone can be produced with just two ICs. The DC line interface circuit develops its own line voltage across the device and it is adjustable by external resistor to suit different country’s specification. The speech network provides the two to four wires interface, electronic switching between dialing and speech and automatic gain control on transmit and receive. The dialing network buffers up to 32 digits into the LND memory that can be later redialed with a single key input. Additionally, another 13 memories (including 3 emergency memories) of 18 digits memory is available. Users can store all 13 signalling keys and access several unique functions with single key entries. These functions include: Pause/Last Number Dialed (LND), Softswitch, Flash and Hold. The FLASH key simulates a timed hook flash to 2/15 transfer calls or to activate other special features provided by the PABX or central office. The PAUSE key stores a timed pause in the number sequence. Redial is then delayed until an outside line can be accessed or some other activity occurs before normal signaling resumes. A LND key input automatically redials the last number dialed. The HOLD key allows the user to suspend the conversation and resume the call on either the same phone by pressing the HOLD key again or resume the conversation at a parallel phone. FUNCTION PIN DESCRIPTION C1, C2, C3, C4, R5, R4, R3, R2, R1 Keyboards inputs. Pins 1, 2, 3, 4, 24, 25, 26, 27, 28. The one chip phone interfaces with either the standard 2-of-9 with negative common or the single-contact (Form A) keyboard. L3914A - L3924A - L3934A FUNCTION PIN DESCRIPTION (continued) A valid keypad entry is either a single Row connected to a single Column or GND simultaneously presented to both a single Row and a single Colunm. In its quiescent or standby state, during normal off-hook operation, either the Rows or the Columns are at logic level 1 (VDD). Pulling one input low enables the on chip oscillator. Keyboard scanning then begins. Scanning consists of Rows and Columns alternately switching high through on chip pullups. After both a Row and Column key have been detected, the debounce counter is enabled and any noise (bouncing contacts, etc) is ignored for a debounce period (TKD) of 32ms. At this time, the keyboard is sampled and if both the Row and Column information are valid, the information is buffered into the LND location. After scanning starts, the row and column inputs will assume opposite states. In the tone mode, if two or more keys in the same row or if two or more keys in the same column are depressed a single tone will be output. The tone will corresponds to the row or column for which the two keys were pushed. This feature is for testing purposes, and single tone will not be redialed. Also in the tone mode, the output tone is continuous in the manual dialing as long as the key is pushed. The output tone duration follows the Table 1. When redialing in the tone mode, each DTMF output has 100ms duration, and the tone separation (inter signal delay) is 100ms. Table 1: Output Tone Duration Key-Push Time, T Tone Output T<= 32ms No output, ignored by one chip phone. 100ms Duration 32ms < = T < = 100ms + Tkd T > = 100ms + Tkd Output Duration = T - Tkd OSC Output. Pin 5. Only one pin is needed to connect the ceramic resonator to the oscillator circuit. The other end of the resonator is connected to GND (pin 8). The nominal resonator frequency is 3.579545MHz and any deviation from this standard is directly reflected in the Tone output frequencies. The ceramic resonator provides the time reference for all circuit functions. A ceramic resonator with tolerance of ±0.25% is recommended. PULSE Output. Pin 6. This is an output consisting of an open drain N-Channel device. During on-hook, pulse output pin is in high impedance and once off-hooked, it will be pulled high by external resistor. The pulse out will go high when the Hold key is pressed, in this way the phone will stay connected to the line untill the parallel phone is hooked-OFF or the Hold Key is pressed again. MODE/PACIFIER TONE Input (MODE). Pin 7. MODE determines the dialer’s default operating mode. When the device is powered up or the hookswitch input is switched from on-hook (VDD) to off-hook (GND), the default determines the signalling mode. A VDD connection defaults to tone mode operation and a GND connection defaults to pulse mode operation. When dialing in the pulse mode, a softswitch feature will allow a change to the tone mode whenever the * key is depressed. Subsequent* key inputs will cause the DTMF code for an * to be dialed.. The softswitch will only switch from pulse to tone. After returning to on-hook and back to off-hook, the phone will be in pulse mode. Redial by the LND key or the MEM key will repeat the softswitch. Output (PACIFIER TONE). Pin 7. In pulse mode, all valid key entries activate the pacifier tone. In tone mode, any non DTMF entry (FLASH, PROG, PAUSE, LND, HOLD, MEM, E1, E2 and E3), activates the pacifier tone. The pacifier tone provides audible feedback, confirming that key has been properly entered and accepted. It is a 500Hz square wave activated upon acceptance of valid key input after the 32ms debounce time. The square wave terminates after a maximum of 75ms or when the valid key is no longer present. The pacifier tone signal is simultaneously sent to earphone and the buzzer. The buzzer can be removed without affecting this function. HKS Input. Pin 8. This is the hookswitch input to the one chip phone. This is a high impedance input and must be switched high for on-hook operation or low for off-hook operation. A transition on this input causes the on chip logic to initialize, terminating any operation in progress at the time. The signaling mode defaults to the mode selected at pin 7. Figures 1 and 2 illustrate the timing for this pin. GND Pin 9 is the negative line terminal of the device. This is the voltage reference for all specifications. RXOUT, GRX, RXIN RXOUT (pin 10), GRX (pin 11) and RXIN (pin 12). The receive amplifier has one input RXIN and a non inverting output RXOUT. Amplification from RXIN to RXOUT is typically 31dB and it can be adjusted between 11dB and 41dB to suit the sensitivity of the earphone used. The amplification is proportional to the external resistor connected between GRX and RXOUT. 3/15 L3914A - L3924A - L3934A FUNCTION PIN DESCRIPTION (continued) IREF Pin 13. An external resistor of 3.6kOhm connected between IREF and GND will set the internal current level. Any change of this resistor value will influence the microphone gain, DTMF gain, earphone gain and sidetone. VCC Pin 14, VCC is the positive supply of the speech network. It is stabilized by a decoupling capacitor between VCC and GND. The VCC supply voltage may also be used to supply external peripheral circuits. LED Pin 15. The LED connected to this pin will start to blink when the HOLD key is pressed and will turn off if the HOLD key is pressed again. Otherwise, it will continue to blink at 1Hz frequency when the phone is on-hooked and then turn off when the parallel phone goes off-hook. ILINE Pin 16. A recommended external resistor of 20ohm is connected between ILINE and GND. Changing this resistor value will have influence on microphone gain, DTMF gain, sidetone, maximum output swing on LN and on the DC characteristics (especially in the low voltage region). LN Pin 17. LN is the positive line terminal of the device. REG Pin 18. The internal voltage regulator has to be decoupled by a capacitor from REG) to GND). The DC characteristics can be changed with an external resistor connected between LN and REG or between REG and ILINE . GTX, MIC–, MIC+ GTX (pin 19), MIC– (pin 20) and MIC+ (pin 21). The one chip phone has symmetrical microphone inputs. The amplification from microphone inputs to LN is 51.5dB and it can be adjusted between 43.5 and 51.5dB. The amplification is proportional to external resistor connected between GTX and REG. GDTMF Pin 22. When the DTMF input is enabled, the microphone inputs and the receive amplifier input will be muted and the dialing tone will be sent to the line. The voltage amplification from GDTMF to LN 4/15 is 40dB. Final output level on LN can be adjusted via the external resistor connected between GDTMF and GND through a decoupling capacitor. A confidence tone is sent to the earphone during tone dialing. The attenuation of the confidence tone from LN to Vear is –32dB typically. VDD Pin 23. VDD is the positive supply for the dialing network and must meet the maximum and minimum voltage requirements. DEVICE OPERATION During on-hook all keypad inputs are high impedance internally and it requires very low current for memory retention. At anytime, Row and Column inputs assume opposite states at off-hook. The circuit verifies that a valid key has been entered by alternately scanning the Row and Column inputs. If the input is still valid following 32ms of debounce, the digit is stored into memory, and dialing begins after a pre-signal delay of approximately 40ms (measured from the initial key closure). Output tone duration is shown in Table 1. The device allows manual dialing of an indefinite number of digits, but if more than 32 digits are dialed, it will ”wrap around”. That is, the extra digits beyond 32 will be stored at the beginning of LND buffer, and the first 32 digits will no longer be available for redial. Table 2: DTMF Output Frequency Key Input Stadard Frequency Actual % Deviation Frequency ROW 1 ROW 2 ROW 3 ROW 4 697 770 852 941 699.1 766.2 847.4 948.0 +0.31 –0.49 –0.54 +0.74 COL 1 COL 2 COL 3 1209 1336 1477 1215.9 1331.7 1471.9 +0.57 –0.32 –0.35 NORMAL DIALING D1 D2 D3 ....etc Normal dialing is straighforward, all keyboard entries will be stored in the buffer and signaled in succession. PROGRAMMING AND REPORTORY DIALING To program, enter the following: PROG D1 D2 Dn MEM (location 0-9) or PROG D1 D2 Dn E1-E3 During programming, dialing is inhibited. L3914A - L3924A - L3934A FUNCTION PIN DESCRIPTION (continued) To dial a number from repertory memory (HKS must be low), enter the following: MEM (Location 0-9) or E1-E3 To save the last number dialed, enter the following: PROG MEM (location 0-9) or E1-E3 HOOK FLASH D1 FLASH D2 ...etc Hook flash may be entered into the dialed sequence at any point by keying in the function key, FLASH. Flash consists of a timed break of 585ms, 300ms or 100ms depending on the Mask option. When a FLASH key is pressed, no further key inputs will be accepted until the hookflash function has been dialed. The key input following a FLASH will be stored as the initial digit of the new number, overwriting the number dialed before the FLASH, unless it is another FLASH. FLASH key pressed immediately after hookswitch or LND will not clear the LND buffer unless digits are entered following the FLASH key. Example: FLASH LND not cleared LND FLASH LND not cleared LND FLASH D1 D2 LND buffer will contain D1, D2 PAUSE/LAST NUMBER DIALED If the PAUSE/LND key is pressed right after off hook or FLASH key, it is considered as LND, if it is pressed after a digit, it will be considered as PAUSE. LAST NUMBERED DIALED OFF-HOOK PAUSE/LND or FLASH PAUSE/LND Last number dialing is accomplished by entering the PAUSE/LND key. PAUSE OFF-HOOK D1 PAUSE/LND D2 ...etc A pause may be entered into the dialed sequence at any point by keying in the special function key, PAUSE/LND. Pause inserts a 3.1 second delay into the dialing sequence. The total delay, including predigit and post-digit pauses is shown in Table 3. Table 3: Special Function Delays Each delay shown below represents the time required after the special function key is depressed until a new digit is dialed. The time is considered ”FIRST” key if all previous inputs have been completely dialed. The time is considered ”AUTO” if in redial, or if previous dialling is still in progress. Delay (seconds) Function First/Auto SOFTSWITC H FIRST AUTO 0.2 1.0 PAUSE FIRST AUTO 2.6 3.4 Pulse Tone 3.0 3.1 HOLD When HOLD key is pressed during off hook, there are two options. The first option is to mute the phone (LED will blink) and the conversation can be resumed by pressing the HOLD key again. The second option is to mute the phone (LED will blink), on-hook the phone (LED will still blink at 1Hz frequency) and automatic switch off the phone when parallel phone is off-hook. The HOLD function is disabled when the line current drops below 20mA. SOFTSWITCH FUNCTION USING TONE/PULSE MODE SWITCH When dialing in Pulse mode after off-hook, switching TONE/PULSE mode switch from Pulse to Tone will cause the device to change the signaling mode into tone signal and store the softswitch function in the LND memory for redial. To redial the softswitch function (mixed mode dialing) in the pulse mode after going on-hook and back to off-hook, you have to switch the TONE/PULSE mode switch back to pulse mode either before going on-hook or after offhook or during on-hook. Subsequentmode change from Tone to Pulse will change the signaling mode to pulse dialing sequence but this mode change will not be stored in .the LND memory. When dialing in Tone mode after off-hook, a switching of TONE/PULSE mode Switch from Tone to Pulse will cause the device to change the signaling mode into pulse mode but this mode change will not be stored in the LND memory. When LND key is pressed in Tone mode after going off-hook, the device will output all tone signals. A pacifier tone of 75ms is provided after 32ms deboun ce time when switching from Pulse to Tone mode. Redial by the LND key will repeat the mixed dialing sequence in Pulse mode. 5/15 L3914A - L3924A - L3934A Figure 1: Tone Mode Timing Figure 2: Pulse Mode Timing 6/15 L3914A - L3924A - L3934A ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VLN Positive Line Voltage Continuous 12 V ILN Line Current 140 mA VDD Logic Voltage 7.0 V VI Maximum Voltage on Any Pin GND(-0.3) VDD(+0.3) V Tamb Operating Temperature Range -25 to +75 °C Tstg Storage Temperature -40 to 125 °C Ptot Total Power Dissipation 700 mW ELECTRICAL CHARACTERISTICS (IL = 10 to 120mA; VDD = 3V; f = 1KHz; Tamb = 25°C, unless otherwise specified) Symbol VLN Parameter Line Voltage Test Condition IL = 4mA IL = 15mA IL = 120mA RA = 68KΩ ; IL = 15mA RB = 39KΩ ; IL = 15mA Min. Typ. Max. Unit Fig. 3.50 2.50 3.85 7.0 V V V V V 3 3.15 6.00 6.00 V V 3 3.2 4.1 VDD Logic Voltage) TONE MODE PULSE MODE IDD Supply Current Into VDD TONE MODE PULSE MODE 600 400 µA µA 3 2.50 2.20 ICC Supply Current Into VCC IL = 15mA 1.30 mA 3 ILED Supply Current to HOLD LED IL = 15mA IL = 120mA 4 30 mA mA 3 VMR Memory Retention Voltage IMR Memory Retention Current IS Off-Hook Stand-by Current 1.50 VDD = 4.0V 150 V 4 1.00 µA 4 250 µA 3 IPL Pulse Output Sink Current VO = 0.5V 1.00 3.00 mA 3 IPO Pacifier Tone Sink/Source Current VO = 0.5V (Sink) VO = 2.5V (Source) 1 0.6 3 1 mA mA 3 VIL HKS, Mode, Keyboard Inputs Low V - VIH HKS, Mode, Keyboard Inputs High V - GTX Transmit Gain AGTX Transmit Gain Variation with R GTX 0.3xVDD 0.7xVDD Vmic = 2mVrms IL = 15mA; RGTX = 68KΩ IL = 60mA; RGTX = 68KΩ IL = 15mA Vmic = 2mVrms RGTX = 43KΩ RGTX = 27KΩ DTX Transmit Distortion IL = 15mA; VLN = 1Vrms NTX Transmit Noise IL = 15mA; Vmic = 0V ZMIC Microphone Input Impedance GDTMF DTMF Gain (Output @ LN) CDTMF Confidence Tone Level Vear/VLN IL = 15mA ; RDTMF = 2.25KΩ 6 50.0 44.5 51.5 46.5 –8 53.0 48.5 dB dB 0 dB –4 –8 6 dB dB 2 % 6 –72 dBmp 6 64 KΩ 5 38 40 42 dB 7 –34 –32 –30 dB 7 7/15 L3914A - L3924A - L3934A ELECTRICAL CHARACTERISTICS (continued) Symbol VDTMF Parameter DTMF Level on the line High Frequency Group Low Frequency Group Test Condition RDTMF = 2.25KΩ, CDTMF = 22nF Min. Typ. Max. Unit Fig. –8 –10 –6 –8 –4 –6 dBm dBm 7 1.0 2 3.0 dB 7 8 % 7 PEI Pre-emphasis DIS DTMF Output Distortion 5 DTMF Att. pin Impedance 32 ZDTMF GRX AGRX D RX Receive Gain Receive Gain Variation Reveive Output Distortion N RX Receive Noise ZOUT VPT Vinp = 5mVrms; Re = 300Ω RGRX = 100KΩ IL = 15mA IL = 60mA IL =15mA; Re = 300Ω RGRX = 10KΩ RGRX = 300KΩ KΩ 8 29.5 24 31.0 26 –20 32.5 28 dB dB +10 dB dB dB 2 2 2 % % % –20 +10 8 8 IL = 15mA; RGRX = 100KΩ Re = 150Ω; VC = 0.25Vrms Re = 300Ω; VC = 0.45Vrms Re = 450Ω; VC = 0.55Vrms µV IL = 15mA; R L = 300Ω; RGRX = 100KΩ; VINP = 0V 200 Receive Output Impedance IL = 15mA 35 Ω 8 Pacifier Tone Level on Earphone IL= 15mA; Rp = ∞ Rp = 430K 60 600 mVrms mVrms 8 32 250 100 500 ms Hz KΩ Ω 75 500 10 60 40 820 50 ms Hz PPS ms ms ms ms 8 KEYBOARD INTERFACE TKD FKS KRU KRD Keypad Keypad Keypad Keypad Debounce Time Scan Frequency Pullup Resistance Pulldown Resistance PULSE MODE TPT FPT PR TB TM IDP PDP Pacifier Tone Duration Pacifier Tone Frequency Pulse Rate Break Time Make Time Inter Digit Pause Predigit Pause TONE MODE TRIS TR TPSD TISD TDUR 5 Tone Output Rise Time Tone Signalling Rate Pre Signal Delay Inter Signal Delay Tone Output Duration THD Hold Mode Delay tHFP Hook Flash Timing 5 40 L3914A L3924A L3934A 100 100 ms 1/s ms ms ms 400 ms 585 300 100 ms ms ms Notes: 1. All inputs unloaded. Quiescent mode (oscillator off). 2. Pulse output sink current for VOUT = 0.5V. 3. Pacifier tone sink current for VOUT = 0.5V. Source current for VOUT = 2.5V. 4. Memory retention voltage is the point where memory is guaranteed but circuit operation is not. Proper memory retention is guaranteed if either the minimum IMR is provided or the minimum VMR. The design does not have to provide both the minimum current and voltage simultaneously. 8/15 L3914A - L3924A - L3934A TEST CIRCUITS Figure 3. 470nF 2.25K GDTMF 22 4 3 IDD 22nF RDTMF VDD 470K 23 PULSE 3.58MHz SW2 PULSE TONE 2 VDD 6 OSC /PT 100K Re 25 24 21 8 GND 9 RXOUT 300Ω 26 7 HKS SW1 27 5 MODE 100K 1 28 20 11 19 RGRX 10µF 13 18 3.6K VCC RGIN V1 620Ω 17 14 15 12 16 100nF V1 VCC C2 C1 R1 1 2 3 FLASH R2 4 5 6 PROG R3 7 8 9 P/LND * 0 # HOLD R4 E1 E2 E3 MEM R5 MIC+ 1µF MIC1µF GTX 4.7µF RGTX 68K IREF 100µF ICC = C3 2.2K 10 GRX C4 VLN RA REG LN RB LED 130K 100µF ILED 390Ω ILINE IL 3.9K 20Ω 390Ω 600Ω ICC D95TL169 Figure 4. 470nF 2.25K GDTMF 22 4 3 VMR IMR 22nF VDD 470K PULSE 3.58MHz PULSE TONE SW2 OSC MODE 100K /PT HKS SW1 GND RXOUT 300Ω Re GRX 10µF 2 23 6 5 7 8 10 11 100µF RGIN 620Ω 100nF 27 26 25 24 21 C3 C2 C1 R1 1 2 3 FLASH R2 4 5 6 PROG R3 7 8 9 P/LND R4 * 0 # R5 E1 E2 E3 MEM MIC+ 2.2K 20 19 HOLD 1µF MIC1µF GTX 4.7µF RGTX 13 3.6K VCC 28 9 RGRX IREF 1 C4 14 12 18 17 15 16 REG LN 130K LED ILED ILINE 20Ω 390Ω 3.9K 390Ω D95TL170 9/15 L3914A - L3924A - L3934A TEST CIRCUITS(continued) Figure 5. 470nF 2.25K GDTMF 22 C4 4 22nF VDD 470K PULSE 3.58MHz SW2 PULSE TONE OSC MODE /PT 100K HKS SW1 GND RXOUT 300Ω Re GRX 27 5 26 IREF 100µF RGIN 620Ω 3 FLASH 5 6 PROG R3 7 8 9 P/LND * 0 # HOLD E1 E2 E3 MEM Imic 1.2V 9 MIC- 20 10 11 4.7µF GTX 19 RGTX 13 REG 18 3.6K VCC 2 4 MIC+ 21 RGRX 10µF 1 R2 R5 24 8 R1 R4 25 7 Imic C1 1 28 6 1.2V C2 2 23 ZMIC = C3 3 LN 17 14 12 130K LED 15 ILED 16 390Ω ILINE 100nF 20Ω 3.9K 390Ω D95TL171 Figure 6. 470nF 2.25K GDTMF 22 4 3 IDD 22nF VDD VDD 470K PULSE 3.58MHz PULSE TONE SW2 OSC MODE 100K /PT HKS SW1 GND RXOUT 100K Re 10µF GRX 2 23 6 5 7 8 10 11 100µF RGIN 620Ω 100nF 26 25 24 21 GTX=20log C3 C1 R1 1 2 3 FLASH R2 4 5 6 PROG R3 7 8 9 P/LND R4 * 0 # HOLD R5 E1 E2 E3 MEM MIC+ 2.2K 20 19 14 12 18 17 15 16 VLN Vrms NTX measured with Vrms=0 C2 1µF Vrms MIC1µF GTX RGTX 88K 13 3.6K VCC 27 9 RGRX IREF 1 28 C4 REG 4.7µF VLN LN 130K LED 100µF ILED ILINE 20Ω 390Ω IL 3.9K 390Ω 600Ω D95TL172 10/15 L3914A - L3924A - L3934A TEST CIRCUITS(continued) Figure 7. 470nF 2.25K GDTMF 22 4 3 VMF 22nF IDD RDTMF 4.0V VDD 470K SW2 OSC 100K Re 25 24 21 8 GND 10µF 26 7 /PT 20 10 GRX 11 19 C2 Vear 18 3.6K 17 VCC 100µF 14 RGIN 620Ω 15 12 16 Vear CDTMF=20log R1 1 2 3 FLASH R2 4 5 6 PROG R3 7 8 9 P/LND * 0 # R4 VLN HOLD E1 E2 E3 MEM R5 MIC+ 1µF MIC1µF GTX RGTX 88K 13 VMF C1 RGRX IREF VLN GDTMF=20log C3 2.2K 9 RXOUT 300Ω 27 5 HKS SW1 28 6 MODE 100K 1 23 PULSE 3.58MHz PULSE TONE 2 C4 REG 4.7µF VLN LN 130K LED 100µF ILED 390Ω ILINE 100nF 20Ω IL 3.9K 600Ω 390Ω D95TL173 Figure 8. 470nF 2.25K GDTMF 22 4 3 IDD 22nF 4.0V 470K 23 PULSE 3.58MHz PULSE TONE 2 VDD SW2 6 OSC 5 MODE 100K 7 /PT HKS SW1 8 GND 27 26 25 24 21 10 GRX 11 19 Vear 13 3.6K VCC 100µF 14 RGIN 620Ω 12 18 17 15 16 Vear Vinp NRX with Vin=0 C2 C1 R1 1 2 3 FLASH R2 4 5 6 PROG R3 7 8 9 P/LND R4 * 0 # R5 E1 E2 E3 MEM HOLD MIC+ 1µF MIC1µF GTX RGTX RGRX IREF GRX=20log C3 2.2K 20 RXOUT 10µF 28 9 RP Re 1 C4 REG 4.7µF VLN LN 130K LED 100µF ILED ILINE 390Ω IL 3.9K Vinp 100nF 20Ω 390Ω D95TL167 11/15 L3914A - L3924A - L3934A Figure 9:Typical Application Circuit. 10 R1 TIP 1N4004 x 4 D1 D4 HP5A94 Q1 D14 TPA270 RING D2 100K D3 10M R6 10V D15 R3 3.3K R4 150K 10K R2 R5 HF393 Q3 SW1A 220µF 16V C1 1.2K R7 1N4140 PULSE 4.7K RMF GDTMF 23 6 22 2 1 28 OSC 27 5 26 CERAMIC RESONATOR 25 BUZZER 24 MODE SW2 100K R8 /PT HKS SW1B GND RXOUT HOOK 100K RGRX GRX 3.6K R9 IREF VCC 100µF C5 RGIN 1K RAC D95TL175 12/15 4 3 4.7nF CMF 3.579MHz x1 10µF/50V C3 22µF/16V C23 VDD 5.6V D10 0.47µF 25V C10 4.7nF C6 21 7 8 20 9 10 19 11 18 13 17 14 12 16 C3 1.2K R14 C2 C1 R1 1 2 3 FLASH R2 4 5 6 PROG R3 7 8 9 P/LND R4 * 0 # HOLD R5 E1 E2 E3 MEM MIC+ MIC- GTX REG 1.2K R15 4.7µF/25V 56K RGTX C7 LN ILINE 390Ω R11 3.9K R12 120Ω RS1 15 LED 100nF C4 C4 D12 LED 20Ω R10 470Ω RS2 220nF CS 130K R13 L3914A - L3924A - L3934A SO28 PACKAGE MECHANICAL DATA mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 2.65 MAX. 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45° (typ.) D 17.7 18.1 0.697 0.713 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 F 7.4 7.6 0.291 0.299 L 0.4 1.27 0.016 0.050 S 8° (max.) 0016572 13/15 L3914A - L3924A - L3934A DIP28 PACKAGE MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. a1 0.63 0.025 b 0.45 0.018 b1 0.23 b2 0.31 MAX. 0.009 0.012 1.27 0.050 D 37.34 E 15.2 1.470 16.68 0.598 0.657 e 2.54 0.100 e3 33.02 1.300 F 14.1 0.555 I 4.445 0.175 L 3.3 0.130 G L D a2 E C1 Q K F N e3 A 28 15 B 1 14 CDIP28 0016130 14/15 L3914A - L3924A - L3934A Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1995 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. 15/15