SN54LS06, SN74LS06, SN74LS16 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS The SN74LS16 is obsolete and is no longer supplied. D D D D D SDLS020B – MAY 1990 – REVISED JANUARY 2002 SN54LS06 . . . J PACKAGE SN74LS06, SN74LS16 . . . D, N, OR NS PACKAGE (TOP VIEW) Convert TTL Voltage Levels to MOS Levels High Sink-Current Capability Input Clamping Diodes Simplify System Design Open-Collector Driver for Indicator Lamps and Relays Inputs Fully Compatible With Most TTL Circuits 1A 1Y 2A 2Y 3A 3Y GND description These hex inverter buffers/drivers feature high-voltage open-collector outputs to interface with high-level circuits (such as MOS), or for driving high-current loads, and also are characterized for use as inverter buffers for driving TTL inputs. The ’LS06 devices have a rated output voltage of 30 V, and the SN74LS16 has a rated output voltage of 15 V. The maximum sink current for the SN54LS06 is 30 mA, and for the SN74LS06 and SN74LS16 is 40 mA. 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 1A NC VCC 6A SN54LS06 . . . FK PACKAGE (TOP VIEW) 2A NC 2Y NC 3A 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 6Y NC 5A NC 5Y 3Y GND NC 4Y 4A These devices are compatible with most TTL families. Inputs are diode-clamped to minimize transmission effects, which simplifies design. Typical power dissipation is 175 mW and average propagation delay time is 8 ns. 4 NC – No internal connection ORDERING INFORMATION TOP-SIDE MARKING Tube SN74LS06D Tape and reel SN74LS06DR SOP – NS Tape and reel SN74LS06NSR 74LS06 SSOP – DB Tape and reel SN74LS06DBR LS06 PDIP – N Tube SN74LS06N SN74LS06N Tube SN54LS06J SN54LS06J Tube SNJ54LS06J SNJ54LS06J Tube SNJ54LS06FK SNJ54LS06FK SOIC – D 0°C to 70°C ORDERABLE PART NUMBER PACKAGE† TA CDIP – J –55°C to 125°C LCCC – FK LS06 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54LS06, SN74LS06, SN74LS16 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS The SN74LS16 is obsolete and is no longer supplied. SDLS020B – MAY 1990 – REVISED JANUARY 2002 logic diagram (positive logic) 1A 2A 3A 4A 5A 6A 1 2 1Y 3 4 2Y 5 6 9 8 11 10 13 12 3Y 4Y 5Y 6Y Pin numbers shown are for the D, J, N, and NS packages. schematic (each gate) VCC 9 kΩ 2.5 kΩ 15 kΩ 1 kΩ Output 2.5 kΩ Input 2 kΩ 2 kΩ GND Resistor values shown are nominal. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LS06, SN74LS06, SN74LS16 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS The SN74LS16 is obsolete and is no longer supplied. SDLS020B – MAY 1990 – REVISED JANUARY 2002 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Output voltage, VO (see Notes 1 and 2): SN54LS06, SN74LS06 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V SN74LS16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. This is the maximum voltage that should be applied to any output when it is in the off state. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions SN74LS06 SN74LS16 SN54LS06 VCC VIH Supply voltage VIL Low-level input voltage High-level input voltage VOH High level output voltage High-level IOL TA Low-level output current NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 2 2 ’LS06 0.8 0.8 V 30 30 V 15 V 40 mA 70 °C 30 –55 V V SN74LS16 Operating free-air temperature UNIT MIN 125 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN74LS06 SN74LS16 SN54LS06 TEST CONDITIONS‡ PARAMETER MIN VIK VCC = MIN, II = –12 mA IOH VCC = MIN MIN, VIL = 0 0.8 8V ’LS06, VOH = 30 V SN74LS16, VOH = 15 V VOL VCC = MIN, VIH = 2 V IOL = 16 mA IOL = 30 mA IOL = 40 mA TYP§ MAX MIN TYP§ UNIT MAX –1.5 –1.5 0.25 0.25 0.25 0.25 0.4 0.25 V V 0.4 V 0.7 0.7 II IIH VCC = MAX, VCC = MAX, VI = 7 V VI = 2.4 V 1 1 20 20 µA IIL ICCH VCC = MAX, VCC = MAX VI = 0.4 V –0.2 –0.2 mA 18 18 mA 60 mA ICCL VCC = MAX 60 ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. § All typical values are at VCC = 5 V, and TA = 25°C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 mA 3 SN54LS06, SN74LS06, SN74LS16 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS The SN74LS16 is obsolete and is no longer supplied. SDLS020B – MAY 1990 – REVISED JANUARY 2002 switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1) 4 PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y POST OFFICE BOX 655303 TEST CONDITIONS RL = 110 Ω Ω, • DALLAS, TEXAS 75265 CL = 15 pF MIN MAX 7 15 10 20 UNIT ns SN54LS06, SN74LS06, SN74LS16 HEX INVERTER BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS The SN74LS16 is obsolete and is no longer supplied. SDLS020B – MAY 1990 – REVISED JANUARY 2002 PARAMETER MEASUREMENT INFORMATION VCC Test Point VCC RL From Output Under Test CL (see Note A) CL (see Note A) High-Level Pulse 1.3 V S2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 3V Timing Input 1.3 V 5 kΩ Test Point LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 2-STATE TOTEM-POLE OUTPUTS S1 (see Note B) CL (see Note A) RL (see Note B) RL From Output Under Test VCC From Output Under Test Test Point 1.3 V 0V tw Low-Level Pulse 1.3 V tsu 0V In-Phase Output (see Note D) 3V 1.3 V 1.3 V 0V tPZL tPLZ tPHL VOH 1.3 V 1.3 V Waveform 1 (see Notes C and D) VOL tPZH tPLH VOH 1.3 V 1.3 V VOL Waveform 2 (see Notes C and D) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ≈1.5 V 1.3 V VOL tPHL Out-of-Phase Output (see Note D) 1.3 V 0V Output Control (low-level enabling) 1.3 V tPLH 1.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.3 V 3V Data Input 1.3 V VOLTAGE WAVEFORMS PULSE DURATIONS Input th VOL + 0.5 V tPHZ VOH 1.3 V VOH – 0.5 V ≈1.5 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL. E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 1.5 ns, tf ≤ 2.6 ns. G. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. 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