M54HC73 RAD HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 80MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 73 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9203-071 DESCRIPTION The M54HC73 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. DILC-14 FPC-14 ORDER CODES PACKAGE FM EM DILC FPC M54HC73D M54HC73K M54HC73D1 M54HC73K1 Depending on the logic level applied to J and K inputs, this device changes state on the negative going transition of clock input pulse (CK). The clear function is accomplished independently of the clock condition when the clear input (CLR) is taken low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION June 2004 Rev. 1 1/11 M54HC73 Figure 1: IEC Logic Symbols Figure 2: Input And Output Equivalent Circuit Table 1: Pin Description PIN N° SYMBOL 1, 5 1CK, 2CK 2, 6 12, 9 13, 8 14, 7, 3, 10 11 4 NAME AND FUNCTION Clock Input Asynchronous Reset 1CLR, 2CLR Inputs 1Q, 2Q True Flip-Flop Outputs Complement Flip-Flop 1Q, 2Q Outputs 1J, 2J, 1K, Synchronous Inputs 2K Flip-Flop 1 and 2 GND Ground (0V) VCC Positive Supply Voltage Table 2: Truth Table INPUTS OUTPUTS FUNCTION CLR J K CK X Q L X X L H CLEAR H L L Qn Qn NO CHANGE H L H L H ---- H H L H L ---- H H H Qn Qn TOGGLE H X X Qn Qn NO CHANGE X : Don’t Care 2/11 Q M54HC73 Figure 3: Logic Diagram Table 3: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 ± 20 V mA IIK DC Input Diode Current IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current Power Dissipation PD Tstg Storage Temperature TL Lead Temperature (10 sec) 300 mW -65 to +150 °C 265 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 4: Recommended Operating Conditions Symbol VCC Parameter Supply Voltage Value Unit 2 to 6 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature Input Rise and Fall Time tr, tf -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns 3/11 M54HC73 Table 5: DC Specifications Test Condition Symbol VIH VIL VOH VOL II ICC 4/11 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 Unit V 0.5 1.35 1.8 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 V V 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 2 20 40 µA V M54HC73 Table 6: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CK - Q) tPLH tPHL Propagation Delay Time (CLR - Q) fMAX Maximum Clock Frequency tW(H) tW(L) Minimum Pulse Width (CK) tW(L) Minimum Pulse Width (CLR) ts th tREM Minimum Set-up Time Minimum Hold Time Minimum Removal Time Value TA = 25°C VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Min. Typ. Max. 75 15 13 125 25 21 145 29 25 6 30 35 30 8 7 42 14 12 54 18 15 15 60 80 18 6 6 21 7 6 30 8 6 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 155 31 26 180 36 31 4.8 24 28 75 15 13 75 15 13 75 15 13 0 0 0 75 15 13 25 7 6 Max. 110 22 19 190 38 32 220 44 37 4 20 24 95 19 16 95 19 16 95 19 16 0 0 0 95 19 16 Unit ns ns ns MHz 110 22 19 110 22 19 110 22 19 0 0 0 110 22 19 ns ns ns ns ns Table 7: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5.0 5 CPD Power Dissipation Capacitance (note 1) 5.0 35 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per FLIP/ FLOP) 5/11 M54HC73 Figure 4: Test Circuit CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) Figure 5: Waveform - Minimum Removal Time (f=1MHz; 50% duty cycle) 6/11 M54HC73 Figure 6: Waveform - Minimum Pulse Width, Propagation Delay Time (f=1MHz; 50% duty cycle) Figure 7: Waveform - Propagation Delay Time, Minimum Pulse Width, Setup And Hold Time (f=1MHz; 50% duty cycle) 7/11 M54HC73 DILC-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 2.1 2.54 0.083 0.100 a1 3.00 3.70 0.118 0.146 a2 0.63 0.88 1.14 0.025 0.035 0.045 B 1.82 2.03 2.39 0.072 0.080 0.094 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 D 18.79 19.00 19.20 0.740 0.748 0.756 E 7.36 7.62 7.87 0.290 0.300 0.310 e 2.54 0.100 e1 15.11 15.24 15.37 0.595 0.600 0.605 e2 7.62 7.87 8.12 0.300 0.310 0.320 F 7.11 7.75 0.280 I 0.305 3.70 K 10.90 L 1.14 1.27 0.146 12.1 0.429 1.5 0.045 0.476 0.050 0.059 0016173H 8/11 M54HC73 FPC-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 6.75 6.91 7.06 0.266 0.272 0.278 B 9.76 9.95 10.14 0.384 0.392 0.399 C 1.49 1.95 0.059 D 0.10 0.127 0.15 0.004 0.005 0.006 E 7.50 7.62 7.75 0.295 0.300 0.305 F G 1.27 0.38 0.050 0.43 H L 0.077 0.48 0.015 0.017 6.0 0.019 0.236 18.75 22.0 0.738 0.866 M 0.38 0.015 N 4.31 0.170 G F D H 14 8 L N A 7 1 H E B M C 016029E 9/11 M54HC73 Table 8: Revision History Date Revision 01-Jun-2004 1 10/11 Description of Changes First Release M54HC73 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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