ST6G3238BE Dual supply level translator for SD/ MINISD/ T-FLASH With ±8KV contact discharge ESD protection Features ■ High speed: tPD = 4.4ns (Typ.) at TA = 85°C VCCB = 2.7V VCCA = 1.8V ■ Low power dissipation: ICCA = ICCB = 5µA (Max.) at TA = 85°C ■ Balanced propagation delays: TPLH ≈ TPHL ■ Power down protection on inputs and outputs ■ 26Ω series resistor on A-Side ■ EMI filter on B side ■ Integrated pull-up and pull-down resistor on B side ■ Operating voltage range: – VCCA (Opr) = 1.4V to VCCB – VCCB (Opr) = 1.4V to 3.6V ■ Latch-up performance exceeds 500mA (JESD17) ■ ESD protection for card side (B port, CD and WP pins) ±8kV, IEC 61000-4-2 ESD or contact discharge: HBM > ±15kV (MIL STD 883 method 3015); ■ ESD protection for A-port: HBM > ±2kV (MIL STD 883 method 3015); ■ ROHS Compliant for µTFBGA25 Package µTFBGA25 Description The ST6G3238BE is a dual supply low voltage CMOS Level Translator for SD/ MiniSD/ T-Flash fabricated with sub-micron silicon gate and fivelayer metal wiring C2MOS technology. Designed for use as an interface between a 3.3V bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V, 3.3V/2.5V and 2.5V/1.8V supply systems, it achieves high speed operation while maintaining the CMOS low power dissipation. The A port is designed to track VCCA. The B port is designed to track VCCB. This device is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by CMD-dir/ DATA0-dir/ DAT123-dir inputs. The Bport interfaces with the 3V bus, the A-port with the 2.5V and 1.8V bus. All inputs are equipped with protection circuits against static discharge, giving them ±2kV (on Aside except CD and WP pins) and ±15kV on (B side, CD and WP pins) ESD immunity and transient excess voltage. See the section on integrated ESD protections and resistors for more information. Order code Part Number Package Packaging ST6G3238BE µTFBGA25 Tube ST6G3238BETBR µTFBGA25 Tape and Reel March 2007 Rev 1 1/17 www.st.com 17 ST6G3238BE Contents Contents 1 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin connection and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 I/O and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 ST6G3238BE 1 Logic diagram Logic diagram Figure 1. Block diagram VCCB R8 R9 R10 R11 R12 A-SIDE B-SIDE CMD-dir CMD.h DATA0-dir DAT0.h R0 R2 R0 R3 CMD DAT0 DAT123-dir R0 R4 DAT1 DAT1.h DAT2.h R0 R5 R0 R6 DAT2 DAT3 DAT3.h R0 CLK.h R1 CLK R7 CLK-f VCCA R13 R14 GND WP CD GND Table 1. Integrated ESD protection and resistor on B-Side Resistors Value R1, R2, R3, R4, R5, R6 40Ω Vbr min. 14V @ 1mA R0 25Ω Line capacitance < 20 pF Tolerance ±20% R10, R11, R12 70kΩ R9 15kΩ R7 470kΩ Tolerance ±30% Table 2. Bi-directional Zener diodes Integrated pull-up resistors on WP and CD pins on A-Side Resistors Value R13 100kΩ R14 100kΩ Tolerance ±30% 3/17 ST6G3238BE Pin connection and function 2 Figure 2. Pin connection and function Pin connection (top through view for µTFBGA) 1 2 3 4 5 DAT0-dir 1 VCCA 2 CMD-dir 3 CMD.h 4 DAT0.h 5 D DAT1.h 6 E DAT2.h 7 DAT3.h 8 CLK-f 9 CLK.h 10 GND 11 NC 12 A B C µTFBGA25 1 2 3 4 5 A DAT2.h CMDdir DAT0. dir NC DAT2 B DAT3.h NC VCCA VCCB DAT3 C CLK.h NC GND GND CLK D DAT0.h CMD.h CD CMD DAT0 E DAT1.h CLK-f DAT12 3-dir WP DAT1 µTFBGA25 4/17 ST6G3238BE 2.1 Pin connection and function Pin function ● CMD, Command is a bi-directional line. The host and card drivers are operating in pushpull. ● DAT0-3, Data lines are bi-directional lines. The host and the card drivers are operating in push-pull mode. ● CLK, Clock is a host to card signal. CLK operates in push-pull mode. ● Feedback (return) Clock is feedback clock signal from level shifter to host for controlling delays. ● CD, Card detect, pulls HIGH state of input to VCCA. This pin is protected against ESD up to 8kV contact. ● WP, Write protect, pulls HIGH state of input to VCCA. This pin is protected against ESD up to 8kV contact. Table 3. Pin description µTFBGA Pin N° Type Side Symbol A2 I A-side CMD-dir D2 I/O A-side CMD.h D4 I/O B-Side CMD Name and function Command direction HIGH = A to B LOW = B to A A-side Command B-side Command Data Direction HIGH = A to B (write) LOW = B to A (read) A3 I A-Side DAT0-dir D1 I/O A-Side DAT0.h Data Input / Output D5 I/O B-Side DAT0 Data Input / Output E3 I A-Side DAT123-dir E1 I/O A-Side DAT1.h Data Input / Output A1 I/O A-Side DAT2.h Data Input / Output B1 I/O A-Side DAT3.h Data Input / Output E5 I/O B-Side DAT1 Data Input / Output A5 I/O B-Side DAT2 Data Input / Output B5 I/O B-Side DAT3 Data Input / Output C1 I A-Side CLK.h Clock Input Data Direction HIGH = A to B (write) LOW = B to A (read) C5 O B-Side CLK E2 O A-Side CLK-f Clock Output D3 - A-Side CD Card Detect E4 - A-Side WP Write Protect B3 - A-Side VCCA Power supply B4 - B-Side VCCB Power supply C3, C4 - - GND Ground (0V) A4, B2, C2 - - NC No connect Clock Feedback 5/17 ST6G3238BE Summary description 3 Summary description Table 4. Truth table Function CMD-dir DAT0-dir DAT123-dir CMD DAT0.h DAT0 DAT1.h DAT1 DAT2.h DAT2 DAT3.h DAT3 H X X INPUT OUTPUT X X X X B=A L X X OUTPUT INPUT X X X X A=B X H X X X INPUT OUTPUT X X B=A X L X X X OUTPUT INPUT X X A=B X X H X X X X INPUT OUTPUT B=A X X L X X X X OUTPUT INPUT A=B Note: 6/17 CMD.h Output X = Don't care; Z = High Impedance ST6G3238BE 4 Maximum rating Maximum rating Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 5. Absolute maximum ratings Symbol Parameter Value Unit VCCA Supply voltage -0.5 to 4.6 V VCCB Supply voltage -0.5 to 4.6 V DC input voltage -0.5 to 4.6 V VI/OA DC I/O voltage (output disabled) -0.5 to 4.6 V VI/OB DC I/O voltage (output disabled) -0.5 to 4.6 V VI/OA DC output voltage -0.5 to VCCA + 0.5 V VI/OB DC output voltage -0.5 to VCCB + 0.5 V VI IIK DC input diode current -20 mA IOK DC output diode current -50 mA IOA DC output current ±50 mA IOB DC output current ±50 mA ICCA DC VCC or ground current ±100 mA ICCB DC VCC or ground current ±100 mA PD Power dissipation 400 mW Tstg Storage temperature -65 to +150 °C 260 °C Value Unit TL Table 6. Lead temperature (10 sec) Recommended operating conditions Symbol Parameter VCCA Supply voltage 1.4 to VCCB V VCCB Supply voltage 1.4 to 3.6 V Input voltage (CMD-dir/DAT0-dir/DAT123-dir) 0 to VCCA V VI/OA I/O voltage 0 to VCCA V VI/OB I/O voltage 0 to VCCB V Operating temperature -40 to +85 °C 0 to 10 ns/V VI Top dt/dv Input rise and fall time (1) 1. VIN from 0.8V to 2.0V at VCC = 3.0V 7/17 ST6G3238BE DC and AC parameters 5 DC and AC parameters Table 7. DC specification Test conditions Symbol Parameter High level input (A port) voltage Low level input (A port) voltage VIH High level input (B port) voltage VIL Low level input (B port) voltage VOH High level output (A port) voltage VOL Low level output (A port) voltage High level output (B port) voltage 8/17 Min. VCCA to 1.95-2.7 3.6 2.7-3.6 1.4 to VCCB Min. 0.65VCCA 1.7 1.7 2.0 2.0 VCCA to 1.95-2.7 3.6 2.7-3.6 1.4 to VCCB Max. -40 to 85°C 0.65VCCA 1.4-1.95 VIL Note: TA = 25°C VCCB (V) 1.4-1.95 VIH VOH VCCA (V) Value Max. V 0.35VCCA 0.35VCCA 0.7 0.7 0.8 0.8 1.4-1.95 0.65VCCB 0.65VCCB 1.95-2.7 1.7 1.7 2.7-3.6 2.0 2.0 Unit V V 1.4-1.95 0.35VCCB 0.35VCCB 1.95-2.7 0.7 0.7 2.7-3.6 0.8 0.8 1.4-3.6 1.4-3.6 IOH = -100µA VCCA-0.1 VCCA-0.1 1.4 1.4 IOH = -1 mA 1.20 1.20 1.65 1.65 IOH = -2 mA 1.40 1.40 2.3 2.3 IOH = -4 mA 1.90 1.90 3 3 IOH = -8 mA 2.45 2.45 1.4-3.6 1.4-3.6 IOL = 100µA 0.10 0.10 1.4 1.4 IOL = 1 mA 0.20 0.20 1.65 1.65 IOL = 2 mA 0.25 0.25 2.3 2.3 IOL = 4 mA 0.40 0.40 3 3 IOL = 8 mA 0.55 0.55 1.4-3.6 1.4-3.6 IOH = -100µA VCCA-0.2 VCCA-0.2 1.4 1.4 IOH = -1 mA 1.05 1.05 1.65 1.65 IOH = -4 mA 1.20 1.20 2.3 2.3 IOH = -6 mA 1.75 1.75 3 3 IOH = -8 mA 2.30 2.30 V V V V All A-port I/Os and control inputs are powered by VCCA. All B-port I/Os are powered by VCCB. ST6G3238BE Table 7. DC and AC parameters DC specification (continued) Test conditions Symbol Parameter VOL Low level output (B port) voltage IIA Input leakage current for Aside Value TA = 25°C -40 to 85°C Unit VCCA (V) VCCB (V) 1.4-3.6 1.4-3.6 IOL = 100µA 0.20 0.20 1.4 1.4 IOL = 1 mA 0.35 0.35 1.65 1.65 IOL = 4 mA 0.45 0.45 2.3 2.3 IOL = 6 mA 0.55 0.55 3 3 IOL = 8 mA 0.70 0.70 ±0.5 ±5 µA ±0.5 ±5 µA 0.5 5 µA 0.5 5 µA 1.8 2.9 Min. VIA=VCC or GND DIR=HIGH VCD=VWP=V Max. Min. Max. V CCA VCLK.h=VCCA VCMD= VCCB IIB Input leakage current for Bside 1.8 2.9 VDAT0,DAT1,D AT2=VCCB VDAT3=GND DIR=LOW VCD=VWP=V CCA 1.4 ICCA Quiescent supply current for A-side 1.4 - 3.6 VIA=VCCA or GND 1.4 - 3.6 0 VCD = VWP = VCCA 1.4 - 3.6 3.6 DIR = A to B 1.4 ICCB IWP ICD Quiescent supply current for B-side WP pin input leakage current CD pin input leakage current 1.4 - 3.6 1.8 1.8 1.4 - 3.6 VCLK.h=VCCA or GND VIB=OPEN 3.6 DIR = B to A VCD = VWP= VCCA 3.0 VIA=VCCA or GND DIR=HIGH VWP=GND 36 µA 3.0 VIA=VCCA or GND DIR=HIGH VCD=GND 36 µA 9/17 ST6G3238BE DC and AC parameters Table 8. AC electrical characteristics (f = 1MHz, 50% duty cycle, CL = 30pF, RL = 500Ω) Test condition TA = -40 to 85 °C Symbol VCCA = 1.8 ± 0.15V Parameter VCCB=2.5 ± 0.2V VCCA=1.8 ± 0.15V VCCA=2.5 ± 0.2V Unit VCCB=2.7 ± 0.3V VCCB=2.7 ± 0.3V Min. Max. Min. Max. Min. Max. tPLH tPHL Propagation delay time An to Bn 1.0 7.2 1.0 6.6 1.0 6.1 tPLH tPHL Propagation delay time Bn to An 1.0 5.8 1.0 5.4 1.0 4.8 ns tOSLH tOSHL Output to output skew time (1)(2) 0.5 0.5 0.5 ns tCDLH tCDHL Clock and data skew time 0.5 0.5 0.5 ns Clock fmax Data From A to B 52 52 52 From B to A 52 52 52 From A to B 52 52 52 From B to A 52 52 52 MHz Mbps 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW ( tOSLH = | tPLHm = tPLHn |, tOSHL = | tPHLm – tPHLn | ) 2. Parameter guaranteed by design. Table 9. Output slew rate (f = 1MHz, 50% duty cycle, CL=30pF, RL=500Ω) Test condition TA = -40 to 85 °C Symbol Parameter From VCCA = 1.8V ± 0.15V To Unit VCCB = 3V ± 0.3V Min. Max. tr Rise time 20% 80% 3 ns tf Fall time 80% 20% 3 ns Table 10. Capacitance characteristics Test condition Symbol Parameter VCCB (V) VCCA (V) Value Unit TA = 25 °C Min. Typ. -40 to 85 °C Max. Min. Max. CINB Input capacitance open open 9 pF CI/OA Input/Output capacitance for A-SIDE 3.3 2.5 17 pF CI/OB Input/Output capacitance for B-SIDE 3.3 2.5 33 pF CPD(1) Power dissipation capacitance 3.3 2.5 3.3 1.8 f = 10MHz 29 29 pF 1. CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) - CPD x VCC x fIN + ICC/16 (per circuit) Note: 10/17 VIA = Input I/Os including CLK.h, CMD.h, DAT0.h, DAT1.h, DAT2.h, DAT3.h VIB = Input I/Os including CMD, DAT0, DAT1, DAT2, DAT3 ST6G3238BE 6 I/O and test circuit I/O and test circuit Figure 3. Input and output equivalent circuit Figure 4. Test cicuit Table 11. Test values Test tPLH, tPHL tPZL, tPLZ (VCC = 3.0 to 3.6V) Switch Open 6V tPZL, tPLZ (VCC = 2.3 to 2.7V or VCC = 1.6 to 1.95V) 2VCC tPZH, tPHZ GND 11/17 ST6G3238BE Waveforms 7 Waveforms Figure 5. Waveform - propagation delay (f = 1 MHz, 50% duty cycle) Table 12. Waveform symbol value VCC Symbol Note: 3.0 to 3.6V 2.3 to 2.7V 1.65 to 1.95V VIH VCC VCC VCC VM 1.5V VCC/2 VCC/2 VX VOL+0.3V VOL+0.15V VOL+0.15V VY VOL-0.3V VOL-0.15V VOL-0.15V CL = 30pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) 12/17 ST6G3238BE 8 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 13/17 ST6G3238BE Package mechanical data Table 13. µTFBGA25 mechanical data Dimension (mm) Dimension (inch) Dim Ref A Min. Typ. Max Min. Typ. Max 1.0 1.10 1.16 0.039 0.043 0.046 A1 0.25 A2 0.78 b 0.25 D 2.90 D1 E 0.86 0.031 0.30 0.35 0.010 0.012 0.014 3.0 3.10 0.114 0.118 0.122 2.0 2.90 3.0 0.034 0.079 3.10 0.114 0.118 E1 2.0 0.079 e 0.50 0.020 SE 0.25 0.010 Figure 6. 14/17 0.010 Package dimensions 0.122 ST6G3238BE Table 14. Package mechanical data µTFBGA25 tape and reel information Dimension (mm) Dimension (inch) Dim Ref Min. Typ. A Max Min. Typ. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T Max 0.504 0.519 14.4 0.567 Ao 3.3 0.130 Bo 3.3 0.130 Ko 1.60 0.063 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 Figure 7. Reel dimension 15/17 ST6G3238BE Revision history 9 Revision history Table 15. 16/17 Revision history Date Revision 22-Mar-2007 1 Change First release ST6G3238BE Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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