STMICROELECTRONICS STD70N02L

STD70N02L
STD70N02L-1
N-channel 24V - 0.0068Ω - 60A - DPAK - IPAK
STripFET™ III Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STD70N02L
24V
<0.008Ω
60A
STD70N02L-1
24V
<0.008Ω
60A
■
RDS(ON) * Qg industry’s benchmark
■
Conduction losses reduced
■
Switching losses reduced
■
Low threshold device
3
3
2
1
DPAK
1
IPAK
Description
This series of products utilizes the latest
advanced design rules of ST’s proprietary
STripFET™ technology. This is suitable for the
most demanding DC-DC converter application
where high efficiency is to be achieved.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STD70N02L-1
D70N02L
IPAK
Tube
STD70N02L
D70N02L
DPAK
Tape & reel
May 2006
Rev 4
1/17
www.st.com
17
Contents
STD70N02L - STD70N02L-1
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STD70N02L - STD70N02L-1
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Vspike (1)
VDS
VDGR
Parameter
Value
Unit
Drain-source voltage rating
30
V
Drain-source voltage (VGS = 0)
24
V
Drain-gate voltage (R GS = 20kΩ)
24
V
± 20
V
VGS
Gate-source voltage
ID (2)
Drain current (continuous) at TC = 25°C
60
A
ID
Drain current (continuous) at TC = 100°C
42
A
IDM (3)
Drain current (pulsed)
240
A
PTOT
Total dissipation at T C = 25°C
60
W
Derating factor
0.4
W/°C
EAS (4)
Single pulse avalanche energy
280
mJ
Tj
Operating junction temperature
Storage temperature
-55 to 175
°C
Value
Unit
Rthj-case Thermal resistance junction-case Max
2.5
°C/W
Rthj-amb Thermal resistance junction-amb Max
100
°C/W
275
°C
Tstg
1. Guaranted when external Rg=4.7Ω and Tf<Tfmax
2. Value limited by wire bonding
3. Pulse width limited by safe operating area
4. Starting Tj =25°C, Id = 30A, VDD = 15V
Table 2.
Symbol
Tl
Thermal data
Parameter
Maximum lead temperature for soldering purpose
3/17
Electrical characteristics
2
STD70N02L - STD70N02L-1
Electrical characteristics
(Tcase =25°C unless otherwise specified)
Table 3.
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
ID = 25mA, V GS= 0
voltage
Zero gate voltage drain
current (VGS = 0)
IGSS
Gate body leakage
current (VDS = 0)
VGS = ±20V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250µA
RDS(on)
Static drain-source on
resistance
VGS= 5V, ID= 15A
Symbol
gfs (1)
Ciss
Coss
Crss
Qg
1
Unit
V
1
10
µA
µA
±100
nA
1.8
V
0.0068 0.008
0.090 0.014
Ω
Ω
Dynamic
Parameter
Test conditions
Forward
transconductance
VDS =15V, ID = 30A
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =16V, f=1MHz, VGS=0
Min.
VDD=10V, ID = 60A
RG
Gate input resistance
f=1MHz Gate DC Bias =0
test signal level =20mV
open drain
Output charge
VDS =16V, VGS =0V
VGS =10V
(see Figure 15)
Pulsed: pulse duration = 300µs, duty cycle 1.5%
2. Qoss.= Coss * D Vin, Coss = Cgd + Cgd. (see Appendix A)
4/17
Max.
24
VGS= 10V, ID= 30A
Qgd
QOSS(2)
Typ.
VDS = 20V,Tc = 125°C
Total gate charge
Gate-source charge
Gate-drain charge
Qgs
Min.
VDS = 20V,
IDSS
Table 4.
1.
On /off states
0.5
Typ.
Max.
Unit
27
S
1400
400
55
pF
pF
pF
24
5
3.4
32
nC
nC
nC
1.5
3
Ω
9.4
nC
STD70N02L - STD70N02L-1
Electrical characteristics
Table 5.
Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Table 6.
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Parameter
ISD
Source-drain current
Source-drain current (pulsed)
VSD (1)
trr
Qrr
IRRM
Min.
VDD=10V, ID=30A,
RG=4.7Ω, VGS=10V
(see Figure 17)
Typ.
Max Unit
ns
ns
ns
ns
10
130
27
16
21.6
Typ.
Max. Unit
Source drain diode
Symbol
ISDM
Test conditions
Test conditions
Forward on voltage
ISD=30A, V GS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=60A, di/dt = 100A/µs,
VDD=20V, Tj=150°C
(see Figure 20)
Min.
36
36
2
50
200
A
A
1.3
V
ns
nC
A
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
5/17
Electrical characteristics
STD70N02L - STD70N02L-1
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Transconductance
Figure 6.
Static drain-source on resistance
6/17
STD70N02L - STD70N02L-1
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Figure 11. Source-drain diode forward
characteristics
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 12. Normalized BVDSS vs temperature
7/17
Electrical characteristics
STD70N02L - STD70N02L-1
Figure 13. Allowable IAV vs time in avalanche
The previous curve gives the single pulse safe operating area for unclamped inductive
loads, under the following conditions:
PD(AVE) =0.5*(1.3*BVDSS *IAV )
EAS(AR) =PD(AVE) *tAV
Where:
IAV is the allowable current in avalanche
PD(AVE) is the average power dissipation in avalanche (single pulse)
tAV is the time in avalanche
8/17
STD70N02L - STD70N02L-1
Appendix A
Figure 14. Synchronous buck converter
The power losses associated with the FETs in a Synchronous Buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the wotking
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
The low side (SW2) device requires:
Very low RDS(on) to reduce conduction losses
Small Qgls to reduce the gate charge losses
Small Coss to reduce losses due to output capacitance
Small Qrr to reduce losses on SW1 during its turn-on
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source voltage to
avoid the cross conduction phenomenon.
The high side (SW1) device requires:
Small Rg and Lg to allow higher gate current peak and to limit the voltage feedback on the
gate
Small Qg to have a faster commutation and to reduce gate charge losses
Low RDS(on) to reduce the conduction losses
9/17
STD70N02L - STD70N02L-1
Table 7.
Power losses
High side switch (SW1)
Low side switch (SW2)
2
R DS ( on ) • I L • δ
Pconduction
2
R DS ( on ) • I L • ( 1 – δ )
IL
V in • ( Q gsth ( SW1 ) + Q gd ( SW1 ) ) • f • ---Ig
Pswitching
recovery
Not applicable
conduction
Not applicable
Zero voltage switching
1
Vin • Q rr ( SW2 ) • f
Pdiode
Pgate(Qg)
Q g ( SW1) • V gg • f
PQoss
V in • Q oss ( SW1 ) • f
------------------------------------------------2
Table 8.
Q gls ( SW2) • V gg • f
V in • Q oss ( SW2 ) • f
------------------------------------------------2
Power losses parameters
Paramter
10/17
V f ( SW2 ) • I L • t deadtime • f
Meaning
d
Duty-cycle
Qgsth
Post threshold gate charge
Qgls
Third quadrant gate charge
Pconduction
On state losses
Pswitching
On-off transition losses
Pdiode
Conduction and reverse recovery diode losses
Pgate
Gate driver losses
PQoss
Output capacitance losses
STD70N02L - STD70N02L-1
3
Test circuits
Test circuits
Figure 15. Switching times test circuit for
resistive load
Figure 16. Gate charge test circuit
Figure 17. Test circuit for inductive load
Figure 18. Unclamped inductive load test
switching and diode recovery times
circuit
Figure 19. Unclamped inductive waveform
Figure 20. Switching time waveform
11/17
Package mechanical data
4
STD70N02L - STD70N02L-1
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at : www.st.com
12/17
STD70N02L - STD70N02L-1
Package mechanical data
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
B5
0.033
0.3
0.012
B6
0.95
C
0.45
C2
0.48
D
6
E
6.4
6.6
0.037
0.6
0.017
0.023
0.6
0.019
0.023
6.2
0.236
0.244
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
0.047
L2
0.8
1
0.031
0.039
A1
C2
A3
A
C
H
B
B3
=
1
=
2
G
=
=
=
E
B2
=
3
B5
L
D
B6
L2
L1
0068771-E
13/17
Package mechanical data
STD70N02L - STD70N02L-1
DPAK MECHANICAL DATA
mm.
inch
DIM.
MAX.
MIN.
A
A1
A2
B
b4
MIN.
2.2
0.9
0.03
0.64
5.2
2.4
1.1
0.23
0.9
5.4
0.086
0.035
0.001
0.025
0.204
0.094
0.043
0.009
0.035
0.212
C
C2
D
D1
E
E1
0.45
0.48
6
0.6
0.6
6.2
0.017
0.019
0.236
0.023
0.023
0.244
6.6
0.252
e
e1
H
L
(L1)
L2
L4
R
V2
TYP
5.1
6.4
0.090
4.6
10.1
0.173
0.368
0.039
2.8
0.8
0.181
0.397
0.110
0.031
1
0.023
0.2
0°
0.260
0.185
2.28
0.6
MAX.
0.200
4.7
4.4
9.35
1
TYP.
0.039
0.008
8°
0°
8°
0068772-F
14/17
STD70N02L - STD70N02L-1
5
Package mechanical data
Package mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
16.4
N
50
T
TAPE MECHANICAL DATA
DIM.
mm
inch
MIN.
MAX.
A0
6.8
7
0.267 0.275
B0
10.4
10.6
0.409 0.417
B1
D
1.5
D1
1.5
E
1.65
MIN.
12.1
0.476
1.6
0.059 0.063
1.85
0.065 0.073
7.4
7.6
0.291 0.299
2.55
2.75
0.100 0.108
0.153 0.161
P0
3.9
4.1
P1
7.9
8.1
0.311 0.319
P2
1.9
2.1
0.075 0.082
40
15.7
MAX.
330
12.992
13.2
0.504 0.520
18.4
0.645 0.724
0.059
0.795
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
2500
0.059
F
R
MIN.
MAX.
K0
W
inch
MAX.
1.574
16.3
0.618
0.641
15/17
Revision history
6
STD70N02L - STD70N02L-1
Revision history
Table 9.
16/17
Revision history
Date
Revision
Changes
29-Aug-2005
1
First release
02-Dec-2005
2
Modified Appendix A
07-Apr-2006
3
New template
03-May-2006
4
New value in Table 3, new curve (see Figure 13)
STD70N02L - STD70N02L-1
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED,
AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS,
NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR
SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2006 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
17/17