STMICROELECTRONICS STP120NH03L

STB120NH03L - STI120NH03L
STP120NH03L
N-channel 30V - 0.005Ω - 60A - TO-220 / D2PAK / I2PAK
STripFET™ Power MOSFET for DC-DC conversion
General features
Type
VDSS
RDS(on)
ID
STB120NH03L
30V
<0.0055Ω
60(1)
STP120NH03L
30V
<0.0055Ω
60(1)
STI120NH03L
30V
<0.0055Ω
60(1)
3
1
3
1
2
D2PAK
TO-220
1. Value limited by wire bonding
■
RDS(on) *Qg industry’s benchmark Low
■
Conduction losses reduced
■
Switching losses reduced
■
Low Threshold device
3
12
I2PAK
Description
Internal schematic diagram
These devices utilizes the latest advanced design
rules of ST’s proprietary STripFET™ technology.
It is ideal in high performance DC-DC converter
applications where efficiency is to be achieved at
very high output currents.
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
Tape & reel
STB120NH03L
B120NH03L
STI120NH03L
120NH03L
I²PAK
Tube
STP120NH03L
P120NH03L
TO-220
Tube
February 2007
D
2PAK
Rev 7
1/17
www.st.com
17
Contents
STB120NH03L - STI120NH03L - STP120NH03L
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Packing mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2/17
................................................ 8
STB120NH03L - STI120NH03L - STP120NH03L
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
30
V
± 20
V
Drain current (continuous) at TC = 25°C
60
A
Drain current (continuous) at TC = 100°C
60
A
Drain current (pulsed)
240
A
Total dissipation at TC = 25°C
110
W
Derating factor
0.73
W/°C
EAS (3)
Single pulse avalanche energy
700
mJ
TJ
Tstg
Operating junction temperature
Storage temperature
-55 to 175
°C
VDS
Drain-source voltage (VGS = 0V)
VGS
Gate-source voltage
ID
(1)
ID (1)
IDM
(2)
PTOT
1. Value limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting TJ = 25°C, ID = 30A, VDD < 30V
Table 2.
Thermal data
RthJC
Thermal resistance junction-case max
1.30
°C/W
RthJA
Thermal resistance junction-amb max
62.5
°C/W
Maximum lead temperature for soldering
purpose
300
°C
Tl
3/17
Electrical characteristics
2
STB120NH03L - STI120NH03L - STP120NH03L
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 3.
Symbol
V(BR)DSS
On/off states
Parameter
Drain-source breakdown
voltage
Test conditions
ID = 250µA, VGS= 0
IDSS
IGSS
Gate body leakage current
VGS = ±20V
(VDS = 0)
Gate threshold voltage
VDS = VGS, ID = 250µA
RDS(on)
Static drain-source on
resistance
VGS = 10V, ID = 30A
1
VGS = 5V, ID = 30A
Unit
V
1
10
µA
µA
±100
µA
1.8
3
V
0.005
0.006
0.0055
0.0105
Ω
Ω
Typ.
Max.
Dynamic
Parameter
Test conditions
Min.
Unit
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Off voltage rise time
Fall time
VDD = 15V, ID = 30A,
RG = 4.7Ω, VGS = 10V
(see Figure 12)
16
95
48
23
ns
ns
ns
ns
Rg
Gate input resistance
f = 1MHz gate DC bias=0
test signal level=20mV
open drain
1.3
Ω
Qg
Total gate charge
Gate-source charge
Gate-drain charge
VGS =10V
(see Figure 13)
57
12
7
Qoss (1)
Output charge
VDS = 24V, VGS = 0
27
ns
Qgls (2)
Third-quadrant gate
charge
VDS < 0, VGS= 0V
55
ns
Ciss
Coss
Qgs
Qgd
VDS = 25V, f = 1MHz,
VGS = 0
VDD=15V, ID = 60A
1. Qoss = Coss* ∆VIN, Coss = Cgd + Cds. See power losses calculation
2. Gate charge for synchronous operation.
4/17
Max.
30
VDS = Max rating,
TC=125°C
VGS(th)
Symbol
Typ.
VDS = Max rating,
Zero gate voltage drain
current (VGS = 0)
Table 4.
Min.
4100
680
70
pF
pF
pF
77
nC
nC
nC
STB120NH03L - STI120NH03L - STP120NH03L
Table 5.
Symbol
ISD
ISDM
VSD (1)
trr
Qrr
IRRM
Electrical characteristics
Source drain diode
Parameter
Test conditions
Min.
Typ.
Source-drain current
Source-drain current
(pulsed)
Forward on voltage
ISD = 30A, VGS = 0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 60A,
di/dt = 100A/µs,
VDD = 30V, TJ =150°C
46
64
2.8
Max.
Unit
60
240
A
A
1.4
V
ns
nC
A
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
5/17
Electrical characteristics
STB120NH03L - STI120NH03L - STP120NH03L
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Normalized BVDSS vs temperature
Figure 6.
Static drain-source on resistance
6/17
STB120NH03L - STI120NH03L - STP120NH03L
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 11. Source-drain diode forward
characteristics
7/17
Test circuit
3
STB120NH03L - STI120NH03L - STP120NH03L
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load
Figure 15. Unclamped Inductive load test
switching and diode recovery times
circuit
Figure 16. Unclamped inductive waveform
8/17
Figure 17. Switching time waveform
STB120NH03L - STI120NH03L - STP120NH03L
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/17
Package mechanical data
STB120NH03L - STI120NH03L - STP120NH03L
TO-220 MECHANICAL DATA
DIM.
mm.
MIN.
inch
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
0.551
L
13
14
0.511
L1
3.50
3.93
0.137
L20
16.40
L30
10/17
TYP
0.154
0.645
28.90
1.137
øP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
STB120NH03L - STI120NH03L - STP120NH03L
Package mechanical data
D2PAK MECHANICAL DATA
TO-247 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
0.368
D1
E
8
10
E1
0.315
10.4
0.393
8.5
0.334
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
M
2.4
3.2
0.094
R
0º
0.126
0.015
4º
3
V2
0.4
1
11/17
Package mechanical data
STB120NH03L - STI120NH03L - STP120NH03L
TO-262 (I2PAK) MECHANICAL DATA
mm.
inch
DIM.
MIN.
12/17
MAX.
MIN.
A
4.40
TYP
4.60
0.173
TYP.
MAX.
A1
2.40
2.72
0.094
0.107
b
0.61
0.88
0.024
0.034
b1
1.14
1.70
0.044
0.066
c
0.49
0.70
0.019
0.027
0.181
c2
1.23
1.32
0.048
0.052
D
8.95
9.35
0.352
0.368
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
E
10
10.40
0.393
0.410
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L2
1.27
1.40
0.050
0.055
STB120NH03L - STI120NH03L - STP120NH03L
5
Packing mechanical data
Packing mechanical data
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
24.4
N
100
T
TAPE MECHANICAL DATA
DIM.
mm
inch
MIN.
MAX.
MIN.
A0
10.5
10.7
0.413 0.421
B0
15.7
15.9
0.618 0.626
D
1.5
1.6
0.059 0.063
D1
1.59
1.61
0.062 0.063
E
1.65
1.85
0.065 0.073
F
11.4
11.6
0.449 0.456
K0
4.8
5.0
0.189 0.197
P0
3.9
4.1
0.153 0.161
P1
11.9
12.1
0.468 0.476
P2
1.9
2.1
0.075 0.082
inch
MAX.
MIN.
MAX.
330
12.992
13.2
0.504 0.520
26.4
0.960 1.039
0.059
0795
3.937
30.4
1.197
BASE QTY
BULK QTY
1000
1000
MAX.
R
50
1.574
T
0.25
0.35 0.0098 0.0137
W
23.7
24.3
0.933 0.956
* on sales type
13/17
Appendix A
6
STB120NH03L - STI120NH03L - STP120NH03L
Appendix A
Figure 18. Buck converter: power losses estimation
The power losses associated with the FETs in a synchronous buck converter can be
estimated using the equations shown in the table below. The formulas give a good
approximation, for the sake of performance comparison, of how different pairs of devices
affect the converter efficiency. However a very important parameter, the working
temperature, is not considered. The real device behavior is really dependent on how the
heat generated inside the devices is removed to allow for a safer working junction
temperature.
●
●
The low side (SW2) device requires:
–
Very low RDS(on) to reduce conduction losses
–
Small Qgls to reduce the gate charge losses
–
Small Coss to reduce losses due to output capacitance
–
Small Qrr to reduce losses on SW1 during its turn-on
–
The Cgd/Cgs ratio lower than Vth/Vgg ratio especially with low drain to source
–
voltage to avoid the cross conduction phenomenon;
The high side (SW1) device requires:
–
14/17
Small Rg and Ls to allow higher gate current peak and to limit the voltage
feedback on the gate
–
Small Qg to have a faster commutation and to reduce gate charge losses
–
Low RDS(on) to reduce the conduction losses.
STB120NH03L - STI120NH03L - STP120NH03L
Table 6.
Appendix A
Power losses calculation
High side switching (SW1)
Low side switch (SW2)
R DS(on)SW1 * I 2L * δ
R DS(on)SW2 * I 2L * (1 − δ )
Pconduction
Pswitching
Vin * (Q gsth(SW1) + Q gd(SW1) ) * f *
IL
Ig
Zero Voltage Switching
Recovery(1)
Not applicable
Vin * Q rr(SW2) * f
Conduction
Not applicable
Vf(SW2) * I L * t deadtime * f
Pgate(QG)
Q g(SW1) * Vgg * f
Q gls(SW2) * Vgg * f
PQoss
Vin * Q oss(SW1) * f
Vin * Q oss(SW2) * f
2
2
Pdiode
1. Dissipated by SW1 during turn-on
Table 7.
Parameters meaning
Parameter
d
Meaning
Duty-cycle
Qgsth
Post threshold gate charge
Qgls
Third quadrant gate charge
Pconduction
Pswitching
On state losses
On-off transition losses
Pdiode
Conduction and reverse recovery diode losses
Pgate
Gate drive losses
PQoss
Output capacitance losses
15/17
Revision history
7
STB120NH03L - STI120NH03L - STP120NH03L
Revision history
Table 8.
16/17
Revision history
Date
Revision
Changes
20-Dec-2004
4
First release
20-Dec-2005
5
New device inserted
19-Jun-2006
6
The document has been reformatted
16-Feb-2007
7
Added I²PAK package
STB120NH03L - STI120NH03L - STP120NH03L
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17/17