SN54LV14A, SN74LV14A HEX SCHMITT-TRIGGER INVERTERS SCLS386B – SEPTEMBER 1997 – REVISED JUNE 1998 D D D D D EPIC (Enhanced-Performance Implanted CMOS) Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Package Options Include Plastic Small-Outline (D, NS), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), and Thin Shrink Small-Outline (PW) Packages, Ceramic Flat (W) Packages, Chip Carriers (FK), and DIPs (J) SN54LV14A . . . J OR W PACKAGE SN74LV14A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y SN54LV14A . . . FK PACKAGE (TOP VIEW) 1Y 1A NC VCC 6A D 2A NC 2Y NC 3A description These hex Schmitt-trigger inverters are designed for 2-V to 5.5-V VCC operation. 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 6Y NC 5A NC 5Y 3Y GND NC 4Y 4A The ’LV14A devices contain six independent inverters. These devices perform the Boolean function Y = A. 4 NC – No internal connection The SN54LV14A is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74LV14A is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each inverter) INPUT A OUTPUT Y H L L H Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1998, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54LV14A, SN74LV14A HEX SCHMITT-TRIGGER INVERTERS SCLS386B – SEPTEMBER 1997 – REVISED JUNE 1998 logic symbol† 1A 2A 3A 4A 5A 6A 1 2 3 4 5 6 9 8 11 10 13 12 1Y 2Y 3Y 4Y 5Y 6Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages. logic diagram, each inverter (positive logic) A Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stressratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 7 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LV14A, SN74LV14A HEX SCHMITT-TRIGGER INVERTERS SCLS386B – SEPTEMBER 1997 – REVISED JUNE 1998 recommended operating conditions (see Note 4) SN54LV14A VCC VIH Supply voltage High level input voltage High-level VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MAX 2 5.5 5.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC = 2 V VCC = 2.3 V to 2.7 V 0.5 0 Output voltage 0 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC × 0.3 5.5 VCC –50 –2 UNIT V V 0.5 VCC × 0.3 VCC × 0.3 Input voltage Low level output current Low-level 2 VCC × 0.7 VCC × 0.7 VI VO IOL MAX 1.5 Low level input voltage Low-level High level output current High-level MIN 1.5 VIL IOH SN74LV14A MIN VCC × 0.3 VCC × 0.3 0 0 VCC × 0.3 5.5 VCC –50 V V V µA –2 –6 –6 –12 –12 VCC = 2 V VCC = 2.3 V to 2.7 V 50 50 2 2 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 6 6 12 12 mA µA mA TA Operating free-air temperature –55 125 –40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54LV14A, SN74LV14A HEX SCHMITT-TRIGGER INVERTERS SCLS386B – SEPTEMBER 1997 – REVISED JUNE 1998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN54LV14A VCC MIN TYP SN74LV14A MAX MIN TYP MAX VT+ Positive-going threshold 2.5 V 1.75 1.75 3.3 V 2.31 2.31 5V 3.5 3.5 VT– Negative-going threshold 2.5 V 0.75 0.75 3.3 V 0.99 0.99 ∆VT Hysteresis (VT+ – VT– T ) 5V 1.5 0.25 1 0.25 1 3.3 V 0.33 1.32 0.33 1.32 0.5 2 0.5 2 VOH 2 V to 5.5 V IOH = –6 mA IOH = –12 mA IOL = 50 µA IOL = 2 mA VOL VCC–0.1 2 3V 2.48 2.48 4.5 V 3.8 II ICC VI = VCC or GND VI = VCC or GND, Ioff VI or VO = 0 to 5.5 V IO = 0 V 0.1 0.1 2.3 V 0.4 0.4 3V 0.44 0.44 4.5 V 0.55 0.55 5.5 V ±1 ±1 µA 5.5 V 20 20 µA 5 µA 0V VI = VCC or GND V 3.8 2 V to 5.5 V IOL = 6 mA IOL = 12 mA Ci 1.5 VCC–0.1 2 2.3 V V V 2.5 V 5V IOH = –50 µA IOH = –2 mA UNIT 5 3.3 V 2.3 2.3 5V 2.3 2.3 V pF F switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER tpd* tpd FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE TA = 25°C MIN TYP MAX A Y CL = 15 pF 10.2 A Y CL = 50 pF 13.3 SN54LV14A SN74LV14A UNIT MIN MAX MIN MAX 19.7 1 22 1 22 ns 24 1 27 1 27 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tpd* tpd FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE TA = 25°C MIN TYP MAX A Y CL = 15 pF 7.3 A Y CL = 50 pF 9.6 * On products compliant to MIL-PRF-38535, this parameter is not production tested. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LV14A SN74LV14A UNIT MIN MAX MIN MAX 12.8 1 15.9 1 15 ns 16.3 1 19.4 1 18.5 ns SN54LV14A, SN74LV14A HEX SCHMITT-TRIGGER INVERTERS SCLS386B – SEPTEMBER 1997 – REVISED JUNE 1998 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tpd* tpd TA = 25°C TYP MAX FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A Y CL = 15 pF 5.1 A Y CL = 50 pF 6.7 MIN SN54LV14A SN74LV14A UNIT MIN MAX MIN MAX 8.6 1 10 1 10 ns 10.6 1 12 1 12 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 5) SN74LV14A PARAMETER MIN TYP MAX UNIT VOL(P) VOL(V) Quiet output, maximum dynamic VOL 0.22 0.8 V Quiet output, minimum dynamic VOL –0.1 –0.8 V VOH(V) VIH(D) Quiet output, minimum dynamic VOH 3.1 High-level dynamic input voltage V 2.31 V VIL(D) Low-level dynamic input voltage NOTE 5: Characteristics are for surface-mount packages only. 0.99 V VCC 3.3 V TYP UNIT 5V 9.6 operating characteristics, TA = 25°C PARAMETER Cpd Power dissi dissipation ation ca capacitance acitance TEST CONDITIONS CL = 50 pF F, f = 10 MHz 8.8 pF F PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54LV14A, SN74LV14A HEX SCHMITT-TRIGGER INVERTERS SCLS386B – SEPTEMBER 1997 – REVISED JUNE 1998 PARAMETER MEASUREMENT INFORMATION RL = 1 kΩ From Output Under Test Test Point From Output Under Test VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input 0V tw tsu VCC 50% VCC 50% VCC Input th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC tPLH In-Phase Output 50% VCC VOH 50% VCC VOL 50% VCC Output Waveform 2 S1 at GND (see Note B) 50% VCC 0V Output Waveform 1 S1 at VCC (see Note B) tPLH VOH 50% VCC VOL 50% VCC tPZL tPHL tPHL Out-of-Phase Output 0V VCC Output Control tPLZ 50% VCC tPZH VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS ≈ VCC VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. Figure 1. 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