LTC1068 Series Clock-Tunable, Quad Second Order, Filter Building Blocks FEATURES DESCRIPTION Four Identical 2nd Order Filter Sections in an SSOP Package n 2nd Order Section Center Frequency Error: ± 0.3% Typical and ±0.8% Maximum n Low Noise per 2nd Order Section, Q ≤ 5: LTC1068-200 50µVRMS, LTC1068 50µVRMS LTC1068-50 75µVRMS, LTC1068-25 90µVRMS n Low Power Supply Current: 4.5mA, Single 5V, LTC1068-50 n Operation with ± 5V Power Supply, Single 5V Supply or Single 3.3V Supply The LTC®1068 product family consists of four monolithic clock-tunable filter building blocks. Each product contains four matched, low noise, high accuracy 2nd order switchedcapacitor filter sections. An external clock tunes the center frequency of each 2nd order filter section. The LTC1068 products differ only in their clock-to-center frequency ratio. The clock-to-center frequency ratio is set to 200:1 (LTC1068-200), 100:1 (LTC1068), 50:1 (LTC1068-50) or 25:1 (LTC1068-25). External resistors can modify the clockto-center frequency ratio. High performance, quad 2nd order, dual 4th order or 8th order filters can be designed with an LTC1068 family product. Designing filters with an LTC1068 product is fully supported by FilterCAD™ filter design software for Windows. n APPLICATIONS Lowpass or Highpass Filters: LTC1068-200, 0.5Hz to 25kHz; LTC1068, 1Hz to 50kHz; LTC1068-50, 2Hz to 50kHz; LTC1068-25, 4Hz to 200kHz n Bandpass or Bandreject (Notch) Filters: LTC1068-200, 0.5Hz to 15kHz; LTC1068, 1Hz to 30kHz; LTC1068-50, 2Hz to 30kHz; LTC1068-25, 4Hz to 140kHz n The LTC1068 products are available in a 28-pin SSOP surface mount package. A customized version of an LTC1068 family product can be obtained in a 16-lead SO package with internal thin-film resistors. Please contact LTC Marketing for details. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and FilterCAD is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Dual, Matched, 4th Order Butterworth Lowpass Filters, Clock-Tunable Up to 200kHz f – 3dB = fCLK/25, 4th Order Filter Noise = 60µVRMS R12 14k 1 R21 14k 2 R31 20k 3 4 5 6 7 8 5V 0.1µF 9 10 11 VIN2 R13 20k R33 20k 12 R23 14k 13 14 INV B HPB/NB INV C HPC/NC BPB BPC LPB SB NC LPC LTC1068-25 AGND V + NC SA LPA BPA HPA/NA INVA SC V– NC CLK NC SD LPD BPD HPD/ND INVD Gain vs Frequency 28 27 R22 20k 26 R32 10k 10 0 25 –10 VOUT1 24 –20 23 1µF 22 21 –5V fCLK = (25)(f – 3dB) 20 GAIN (dB) VIN1 R11 20k –30 –40 –50 –60 –70 19 18 17 R34 10k 16 R24 20k VOUT2 –80 0.1 1 RELATIVE FREQUENCY [fIN/(f – 3dB)] 10 1068 TA02 15 R14 14k 1068 TA01 1068fc 1 LTC1068 Series ABSOLUTE MAXIMUM RATINGS (Note 1) Total Supply Voltage (V + to V –).................................12V Power Dissipation............................................... 500mW Input Voltage at Any Pin.......V – – 0.3V ≤ VIN ≤ V + + 0.3V Storage Temperature Range.................... –65°C to 150°C Operating Temperature Range LTC1068C................................................. 0°C to 70°C LTC1068I............................................. –40°C to 85°C Lead Temperature (Soldering, 10 sec)................... 300°C PIN CONFIGURATION TOP VIEW INV B 1 28 INV C HPB/NB 2 27 HPC/NC BPB 3 26 BPC LPB 4 25 LPC SB 5 24 SC NC 6 23 V– AGND 7 22 NC V+ 8 NC TOP VIEW INV B 1 24 INV C HPB/NB 2 23 HPC/NC BPB 3 22 BPC LPB 4 21 LPC SB 5 20 SC AGND 6 V+ 19 V– 21 CLK 7 18 CLK 9 20 NC SA 8 17 SD LPA 9 16 LPD BPA 10 15 BPD SA 10 19 SD LPA 11 18 LPD BPA 12 17 BPD HPA/NA 13 INV A 14 HPA/NA 11 14 HPD/ND INV A 12 16 HPD/ND 13 INV D N PACKAGE 24-LEAD PDIP 15 INV D TJMAX = 110°C, θJA = 65°C/W G PACKAGE 28-LEAD PLASTIC SSOP TJMAX = 110°C, θJA = 95°C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC1068CG#PBF LTC1068CG#TRPBF LTC1068 28-Lead Plastic SSOP 0°C to 70°C LTC1068IG#PBF LTC1068IG#TRPBF LTC1068 28-Lead Plastic SSOP –40°C to 85°C LTC1068-200CG#PBF LTC1068-200CG#TRPBF LTC1068 28-Lead Plastic SSOP 0°C to 70°C LTC1068-200IG#PBF LTC1068-200IG#TRPBF LTC1068 28-Lead Plastic SSOP –40°C to 85°C LTC1068-50CG#PBF LTC1068-50CG#TRPBF LTC1068 28-Lead Plastic SSOP 0°C to 70°C LTC1068-50IG#PBF LTC1068-50IG#TRPBF LTC1068 28-Lead Plastic SSOP –40°C to 85°C LTC1068-25CG#PBF LTC1068-25CG#TRPBF LTC1068 28-Lead Plastic SSOP 0°C to 70°C LTC1068-25IG#PBF LTC1068-25IG#TRPBF LTC1068 28-Lead Plastic SSOP –40°C to 85°C LTC1068CN#PBF NA LTC1068 24-Lead PDIP 0°C to 70°C LTC1068IN#PBF NA LTC1068 24-Lead PDIP –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 1068fc 2 LTC1068 Series ELECTRICAL CHARACTERISTICS LTC1068 (Internal Op Amps). The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN Operating Supply Voltage Range TYP 3.14 Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ±5V, RL = 5k Output Short-Circuit Current (Source/Sink) VS = ± 4.75V VS = ±5V DC Open-Loop Gain UNITS ± 5.5 V 1.6 3.2 ±4.1 VP-P VP-P V 17/6 20/15 mA mA RL = 5k 85 dB GBW Product VS = ±5V 6 MHz Slew Rate VS = ±5V 10 V/µs Analog Ground Voltage (Note 4) VS = 5V, Voltage at AGND l l l 1.2 2.6 ±3.4 MAX 2.5V ±2% V LTC1068 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX Clock-to-Center Frequency Ratio (Note 5) VS = 4.75V, fCLK = 1MHz, Mode 1 (Note 3), fO = 10kHz, Q = 5, VIN = 0.5VRMS, R1 = R3 = 49.9k, R2 = 10k l VS = ± 5V, fCLK = 1MHz, Mode 1, fO = 10kHz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10k l Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ±5V, fCLK = 1MHz, Q = 5 Q Accuracy (Note 5) VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ±5V, fCLK = 1MHz, Q = 5 UNITS 100 ± 0.3 100 ±0.8 100 ±0.9 % % 100 ± 0.3 100 ±0.8 100 ±0.9 % % l l ±0.25 ±0.25 ±0.9 ±0.9 % % l l ±1 ±1 ±3 ±3 % % fO Temperature Coefficient ±1 ppm/°C Q Temperature Coefficient ±5 ppm/°C DC Offset Voltage (Note 5) (See Table 1) VS = ±5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) l 0 ±15 mV VS = ± 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) l ±2 ±25 mV VS = ±5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) l ±5 ±40 mV Clock Feedthrough VS = ± 5V, fCLK = 1MHz 0.1 mVRMS Max Clock Frequency (Note 6) VS = ±5V, Q ≤ 2.0, Mode 1 5.6 MHz Power Supply Current VS = 3.14V, fCLK = 1MHz (Note 2) VS = 4.75V, fCLK = 1MHz (Note 3) VS = ±5V, fCLK = 1MHz l l l 3.5 6.5 9.5 8 11 15 mA mA mA 1068fc 3 LTC1068 Series ELECTRICAL CHARACTERISTICS LTC1068-200 (Internal Op Amps). The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN Operating Supply Voltage Range TYP 3.14 UNITS ±5.5 V Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ±5V, RL = 5k Output Short-Circuit Current (Source/Sink) VS = ± 4.75V VS = ±5V DC Open-Loop Gain RL = 5k 85 dB GBW Product VS = ±5V 6 MHz Slew Rate VS = ±5V 10 V/µs Analog Ground Voltage (Note 4) VS = 5V, Voltage at AGND l l l 1.2 2.6 ±3.4 MAX 1.6 3.2 ±4.1 VP-P VP-P V 17/6 20/15 mA mA 2.5V ±2% V LTC1068-200 (Complete Filter) VS = ±5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX Clock-to-Center Frequency Ratio (Note 5) VS = 4.75V, fCLK = 1MHz, Mode 1 (Note 3), fO = 5kHz, Q = 5, VIN = 0.5VRMS, R1 = R3 = 49.9k, R2 = 10k l VS = ± 5V, fCLK = 1MHz, Mode 1, fO = 5Hz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10k l Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ±5V, fCLK = 1MHz, Q = 5 Q Accuracy (Note 5) VS = 4.75V, fCLK = 1MHz, Q = 5 (Note 3) VS = ±5V, fCLK = 1MHz, Q = 5 200 ±0.3 200 ±0.8 200 ±0.9 % % 200 ±0.3 200 ±0.8 200 ±0.9 % % l l ± 0.25 ± 0.25 ±0.9 ±0.9 % % l l ±1 ±1 ±3 ±3 % % fO Temperature Coefficient ±1 Q Temperature Coefficient DC Offset Voltage (Note 5) (See Table 1) UNITS ppm/°C ±5 ppm/°C VS = ±5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) l 0 ±15 mV VS = ± 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) l ±2 ±25 mV VS = ±5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) l ±5 ±40 mV Clock Feedthrough VS = ± 5V, fCLK = 1MHz 0.1 mVRMS Max Clock Frequency (Note 6) VS = ±5V, Q ≤ 2.0, Mode 1 5.6 MHz Power Supply Current VS = 3.14V, fCLK = 1MHz (Note 2) VS = 4.75V, fCLK = 1MHz (Note 3) VS = ±5V, fCLK = 1MHz l l l 3.5 6.5 9.5 8 11 15 mA mA mA 1068fc 4 LTC1068 Series ELECTRICAL CHARACTERISTICS LTC1068-50 (Internal Op Amps). The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN Operating Supply Voltage Range TYP 3.14 Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ±5V, RL = 5k Output Short-Circuit Current (Source/Sink) VS = ± 3.14V VS = ±5V DC Open-Loop Gain UNITS ± 5.5 V 1.8 3.6 ±4.1 VP-P VP-P V 17/6 20/15 mA mA RL = 5k 85 dB GBW Product VS = ±5V 4 MHz Slew Rate VS = ±5V 7 V/µs Analog Ground Voltage (Note 4) VS = 5V, Voltage at AGND l l l 1.2 2.6 ±3.4 MAX 2.175V ±2% V LTC1068-50 (Complete Filter) VS = ±5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX Clock-to-Center Frequency Ratio (Note 5) VS = 3.14V, fCLK = 250kHz, Mode 1 (Note 2), fO = 5kHz, Q = 5, VIN = 0.34VRMS, R1 = R3 = 49.9k, R2 = 10k l VS = ± 5V, fCLK = 500kHz, Mode 1, fO = 10kHz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10k l Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) VS = 3.14V, fCLK = 250kHz, Q = 5 (Note 2) VS = ±5V, fCLK = 500kHz, Q = 5 Q Accuracy (Note 5) VS = 3.14V, fCLK = 250kHz, Q = 5 (Note 2) VS = ±5V, fCLK = 500kHz, Q = 5 50 ± 0.3 50 ±0.8 50 ±0.9 % % 50 ± 0.3 50 ±0.8 50 ±0.9 % % l l ± 0.25 ± 0.25 ±0.9 ±0.9 % % l l ±1 ±1 ±3 ±3 % % fO Temperature Coefficient ±1 Q Temperature Coefficient DC Offset Voltage (Note 5) (See Table 1) UNITS ppm/°C ±5 ppm/°C VS = ±5V, fCLK = 500kHz, VOS1 (DC Offset of Input Inverter) l 0 ±15 mV VS = ± 5V, fCLK = 500kHz, VOS2 (DC Offset of First Integrator) l –2 ±25 mV VS = ±5V, fCLK = 500kHz, VOS3 (DC Offset of Second Integrator) l –5 ±40 mV Clock Feedthrough VS = ± 5V, fCLK = 500kHz 0.16 mVRMS Max Clock Frequency (Note 6) VS = ±5V, Q ≤ 1.6, Mode 1 3.4 MHz Power Supply Current VS = 3.14V, fCLK = 250kHz (Note 2) VS = 4.75V, fCLK = 250kHz (Note 3) VS = ±5V, fCLK = 500kHz l l l 3.0 4.3 6.0 5 8 11 mA mA mA 1068fc 5 LTC1068 Series ELECTRICAL CHARACTERISTICS LTC1068-25 (Internal Op Amps). The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN Operating Supply Voltage Range TYP 3.14 Voltage Swings VS = 3.14V, RL = 5k (Note 2) VS = 4.75V, RL = 5k (Note 3) VS = ±5V, RL = 5k Output Short-Circuit Current (Source/Sink) VS = ± 4.75V VS = ±5V DC Open-Loop Gain UNITS ± 5.5 V 1.6 3.4 ±4.1 VP-P VP-P V 17/6 20/15 mA mA RL = 5k 85 dB GBW Product VS = ±5V 6 MHz Slew Rate VS = ±5V 10 V/µs Analog Ground Voltage (Note 4) VS = 5V, Voltage at AGND l l l 1.2 2.6 ±3.4 MAX 2.5V ±2% V LTC1068-25 (Complete Filter) VS = ± 5V, TA = 25°V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX Clock-to-Center Frequency Ratio (Note 5) VS = 4.75V, fCLK = 500kHz, Mode 1 (Note 3), fO = 20kHz, Q = 5, VIN = 0.5VRMS, R1 = R3 = 49.9k, R2 = 10k l VS = ± 5V, fCLK = 1MHz, Mode 1, fO = 40kHz, Q = 5, VIN = 1VRMS, R1 = R3 = 49.9k, R2 = 10k l Clock-to-Center Frequency Ratio, Side-to-Side Matching (Note 5) VS = 4.75V, fCLK = 500kHz, Q = 5 (Note 3) VS = ±5V, fCLK = 1MHz, Q = 5 Q Accuracy (Note 5) VS = 4.75V, fCLK = 500kHz, Q = 5 (Note 3) VS = ±5V, fCLK = 1MHz, Q = 5 25 ±0.3 25 ±0.8 25 ±0.9 % % 25 ±0.3 25 ±0.8 25 ±0.9 % % l l ± 0.25 ± 0.25 ±0.9 ±0.9 % % l l ±1 ±1 ±3 ±3 % % fO Temperature Coefficient ±1 Q Temperature Coefficient DC Offset Voltage (Note 5) (See Table 1) UNITS ppm/°C ±5 ppm/°C VS = ± 5V, fCLK = 1MHz, VOS1 (DC Offset of Input Inverter) l 0 ±15 mV VS = ± 5V, fCLK = 1MHz, VOS2 (DC Offset of First Integrator) l –2 ±25 mV VS = ±5V, fCLK = 1MHz, VOS3 (DC Offset of Second Integrator) l –5 ±40 mV Clock Feedthrough VS = ± 5V, fCLK = 1MHz 0.25 mVRMS Max Clock Frequency (Note 6) VS = ±5V, Q ≤ 1.6, Mode 1 5.6 MHz Power Supply Current VS = 3.14V, fCLK = 1MHz (Note 2) VS = 4.75V, fCLK = 1MHz (Note 3) VS = ±5V, fCLK = 1MHz Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Production testing for single 3.14V supply is achieved by using the equivalent dual supplies of ±1.57V. Note 3: Production testing for single 4.75V supply is achieved by using the equivalent dual supplies of ±2.375V. l l l 3.5 6.5 9.5 8 11 15 mA mA mA Note 4: Pin 7 (AGND) is the internal analog ground of the device. For single supply applications this pin should be bypassed with a 1µF capacitor. The biasing voltage of AGND is set with an internal resistive divider from Pin 8 to Pin 23 (see Block Diagram). Note 5: Side D is guaranteed by design. Note 6: See Typical Performance Characteristics. 1068fc 6 LTC1068 Series ELECTRICAL CHARACTERISTICS Table 1. Output DC Offsets One 2nd Order Section MODE VOSN VOSBP VOSLP 1 VOS1[(1/Q) + 1 + ||HOLP||] – VOS3 /Q VOS3 VOSN – VOS2 1b VOS1[(1/Q) + 1 + R2/R1] – VOS3 /Q VOS3 ~(VOSN – VOS2)(1 + R5/R6) 2 [VOS1(1 + R2/R1 + R2/R3 + R2/R4) – VOS3(R2/R3)X [R4/(R2 + R4)] + VOS2[R2/(R2 + R4)] VOS3 VOSN – VOS2 3 VOS2 VOS3 VOS1[1 + R4/R1 + R4/R2 + R4/R3] – VOS2(R4/R2) – VOS3(R4/R3) TYPICAL PERFORMANCE CHARACTERISTICS 40 40 35 30 25 20 25 20 15 10 10 0 A 0 10 B 40 30 20 50 60 CENTER FREQUENCY, fO (kHz) 0 70 55 40 (FOR MODE 2, R4 < 10R2) TYPICAL MAXIMUM Q 35 30 25 20 15 A 5 0 0 4 B B 25 20 15 0 60 45 40 (FOR MODE 2, R4 ≥ 10R2) 35 30 25 20 B 15 1068 G04 0 C A 0 4 55 4 12 16 20 24 28 32 8 CENTER FREQUENCY, fO (kHz) 1068 G03 45 40 (FOR MODE 2, R4 < 10R2) 35 30 25 20 C 15 B 10 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) C A: VS = 3.3V, fCLK(MAX) = 1.1MHz B: VS = 5V, fCLK(MAX) = 2.1MHz C: VS = ±5V, fCLK(MAX) = 3.6MHz 50 A 5 0 B LTC1068-50 Maximum Q vs Center Frequency (Modes 2, 3) 5 32 A 1068 G02 A: VS = 3.3V, fCLK(MAX) = 1.1MHz B: VS = 5V, fCLK(MAX) = 2.1MHz C: VS = ±5V, fCLK(MAX) = 3.6MHz 50 10 C 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) 30 5 C 40 30 20 50 10 CENTER FREQUENCY, fO (kHz) 0 55 TYPICAL MAXIMUM Q 45 10 (FOR MODE 2, R4 ≥ 10R2) 35 LTC1068-50 Maximum Q vs Center Frequency (Modes 1, 1b, 2) A: VS = 3.3V, fCLK(MAX) = 1.2MHz B: VS = 5V, fCLK(MAX) = 3.2MHz C: VS = ±5V, fCLK(MAX) = 6.1MHz 50 A 1068 G01 LTC1068-200 Maximum Q vs Center Frequency (Modes 2, 3) 40 10 5 C 45 A: VS = 3.3V, fCLK(MAX) = 1.2MHz B: VS = 5V, fCLK(MAX) = 3.2MHz C: VS = ±5V, fCLK(MAX) = 6.1MHz 50 30 15 5 A. VS = 3.3V, fCLK(MAX) = 1MHz B. VS = 5V, fCLK(MAX) = 3MHz C. VS = ±5V, fCLK(MAX) = 5MHz (FOR MODE 2 R4 < 10R2) 45 MAXIMUM Q MAXIMUM Q 35 55 50 A. VS = 3.3V, fCLK(MAX) = 1.5MHz B. VS = 5V, fCLK(MAX) = 3.4MHz C. VS = ±5V, fCLK(MAX) = 5.6MHz (FOR MODE 2 R4 ≥ 10R2) 45 LTC1068-200 Maximum Q vs Center Frequency (Modes 1, 1b, 2) TYPICAL MAXIMUM Q 50 LTC1068 Maximum Q vs Center Frequency (Modes 2, 3) TYPICAL MAXIMUM Q LTC1068 Maximum Q vs Center Frequency (Modes 1, 1b, 2) 32 1068 G05 0 0 4 12 16 20 24 28 8 CENTER FREQUENCY, fO (kHz) 32 1068 G06 1068fc 7 LTC1068 Series TYPICAL PERFORMANCE CHARACTERISTICS LTC1068-25 Maximum Q vs Center Frequency (Modes 1, 1b, 2) 40 45 35 30 25 20 15 10 5 0 B A 0 32 A: VS = 3.3V, fCLK(MAX) = 1MHz B: VS = 5V, fCLK(MAX) = 3MHz C: VS = ±5V, fCLK(MAX) = 5MHz (FOR MODE 2, R4 < 10R2) 50 40 TYPICAL MAXIMUM Q 45 TYPICAL MAXIMUM Q 55 A: VS = 3.3V, fCLK(MAX) = 1.2MHz B: VS = 5V, fCLK(MAX) = 3.4MHz C: VS = ±5V, fCLK(MAX) = 6.1MHz (FOR MODE 2, R4 ≥ 10R2) 50 35 30 25 20 15 10 C 0 224 B A 5 64 96 128 160 192 CENTER FREQUENCY, fO (kHz) 0 32 C 64 96 128 160 FREQUENCY, fO (kHz) 192 1068 G07 MODE 3 –0.05 MODE 1 –0.10 VS = ±5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.75MHz –0.15 –0.20 –0.25 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.25 CLOCK FREQUENCY (MHz) 1068 G10 0.4 0 –0.2 –0.4 –0.6 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.25 CLOCK FREQUENCY (MHz) 1068 G09 LTC1068-25 Center Frequency Variation vs Clock Frequency 1.8 0.3 MODE 3 0.2 0.1 0 VS = ±5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.5MHz –0.1 –0.2 0.5 0.75 1.3 0.8 MODE 1 0.3 MODE 3 1.0 1.25 1.5 1.75 CLOCK FREQUENCY (MHz) 0 2.0 250 250 250 3.3V 50 0 NOISE (µVRMS) NOISE (µVRMS) 5V 100 ±5V 5V 150 3.3V 100 5 10 15 20 Q 25 30 35 40 1068 G13 0 3.0 1.5 2.0 2.5 CLOCK FREQUENCY (MHz) 3.5 1068 G12 5V ±5V 200 3.3V 150 100 50 50 0 1.0 LTC1068-25 Noise vs Q 300 200 0.5 1068 G11 LTC1068-50 Noise vs Q ±5V VS = ±5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.5MHz MODE 1 300 150 MODE 1 0.2 300 200 MODE 3 0.6 0.4 LTC1068/LTC1068-200 Noise vs Q NOISE (µVRMS) 0.8 BATTERY VOLTAGE (V) 0.10 CENTER FREQUENCY VARIATION (% ERROR) CENTER FREQUENCY VARIATION (% ERROR) 0.15 VS = ±5V Q = 5, REFERENCE CENTER FREQUENCY WITH fCLK = 0.75MHz 1.0 LTC1068-50 Center Frequency Variation vs Clock Frequency 0.20 0 224 1.2 1068 G08 LTC1068-200 Center Frequency Variation vs Clock Frequency 0.05 LTC1068 Center Frequency Variation vs Clock Frequency CENTER FREQUENCY VARIATION (% ERROR) 55 LTC1068-25 Maximum Q vs Center Frequency (Modes 2, 3) 0 5 10 15 20 Q 25 30 35 40 1068 G14 0 0 5 10 15 20 Q 25 30 35 40 1068 G15 1068fc 8 LTC1068 Series TYPICAL PERFORMANCE CHARACTERISTICS Noise Increase vs R2/R4 Ratio (Mode 3) Noise Increase vs R5/R6 Ratio (Mode 1b) 2.0 RELATIVE NOISE INCREASE (REFERENCE NOISE WHEN R5/R6 = 0.02) RELATIVE NOISE INCREASE (REFERENCE NOISE WHEN R2/R4 = 1) 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 0.2 0.3 0.4 0.5 0.6 0.7 R2/R4 RATIO 0.8 0.9 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 1.0 0 0.5 1.0 1.5 2.0 2.5 R5/R6 RATIO 3.0 1068 G17 1068 G16 LTC1068/LTC1068-200/ LTC1068-25 Power Supply Current vs Power Supply LTC1068-50 Power Supply Current vs Power Supply 8 9.5 25°C 8.5 POWER SUPPLY CURRENT (mA) POWER SUPPLY CURRENT (mA) 10.5 70°C –20°C 7.5 6.5 5.5 4.5 3.5 3 4 7 9 6 8 5 TOTAL POWER SUPPLY (V) 10 1068 G18 7 25°C 6 70°C –20°C 5 4 3 2 3 4 7 9 6 8 5 TOTAL POWER SUPPLY (V) 10 1068 G19 1068fc 9 LTC1068 Series PIN FUNCTIONS Power Supply Pins Clock Input Pin The V + and V– pins should each be bypassed with a 0.1µF capacitor to an adequate analog ground. The filter’s power supplies should be isolated from other digital or high voltage analog supplies. A low noise linear supply is recommended. Using a switching power supply will lower the signal-to-noise ratio of the filter. Figures 1 and 2 show typical connections for dual and single supply operation. Any TTL or CMOS clock source with a square-wave output and 50% duty cycle (±10%) is an adequate clock source for the device. The power supply for the clock source should not be the filter’s power supply. The analog ground for the filter should be connected to clock’s ground at a single point only. Table 2 shows the clock’s low and high level threshold values for dual or single supply operation. Analog Ground Pin POWER SUPPLY The filter’s performance depends on the quality of the analog signal ground. For either dual or single supply operation, an analog ground plane surrounding the package is recommended. The analog ground plane should be connected to any digital ground at a single point. For single supply operation, AGND should be bypassed to the analog ground plane with at least a 0.47µF capacitor (Figure 2). Two internal resistors bias the analog ground pin. For the LTC1068, LTC1068-200 and LTC1068-25, the voltage at the analog ground pin (AGND) for single supply is 0.5 × V+ and for the LTC1068-50 it is 0.435 × V+. ANALOG GROUND PLANE 1 28 2 27 3 26 4 25 5 24 6 V+ 7 0.1µF 8 STAR SYSTEM GROUND V– 23 LTC1068 0.1µF 21 9 20 19 11 18 12 17 HIGH LEVEL LOW LEVEL Dual Supply = ± 5V ≥ 1.53V ≤ 0.53V Single Supply = 5V ≥ 1.53V ≤ 0.53V Single Supply = 3.3V ≥ 1.20V ≤ 0.53V A pulsed generator can be used as a clock source provided the high level ON time is at least 25% of the pulse period. Sine waves are not recommended for clock input frequencies less than 100kHz, since excessively slow clock rise or fall times generate internal clock jitter (maximum clock rise or fall time ≤ 1µs). The clock signal should be routed from the right side of the IC package and perpendicular to it to avoid coupling to any input or output analog signal ANALOG GROUND PLANE 1 28 2 27 DEVICE RA RB LTC1068 LTC1068-200 10k 10k LTC1068-25 LTC1068-50 11.3k 8.6k 3 26 4 25 VAGND 22 10 Table 2. Clock Source High and Low Threshold Levels 5 V+ 8 0.1µF 0.47µF (1µF FOR STOPBAND FREQUENCIES ≤1kHz) 22 RA 20 19 11 18 12 17 16 15 14 15 14 STAR SYSTEM GROUND 1068 F01 Figure 1. Dual Supply Ground Plane Connections 21 9 16 DIGITAL GROUND RB 10 13 200Ω 24 23 7 13 CLOCK SOURCE LTC1068 6 FOR MODE 3, THE S NODE SHOULD BE TIED TO PIN 7 (AGND) CLOCK SOURCE 200Ω DIGITAL GROUND 1068 F02 Figure 2. Single Supply Ground Plane Connections 1068fc 10 LTC1068 Series PIN FUNCTIONS path. A 200Ω resistor between clock source and Pin 11 will slow down the rise and fall times of the clock to further reduce charge coupling (Figures 1 and 2). – 1k Output Pins LT®1354 + 1068 F03 Each 2nd order section of an LTC1068 device has three outputs that typically source 17mA and sink 6mA. Driving coaxial cables or resistive loads less than 20k will degrade the total harmonic distortion performance of any filter design. When evaluating the distortion or noise performance of a particular filter design implemented with a LTC1068 device, the final output of the filter should be buffered with a wideband, noninverting high slew rate amplifier (Figure 3). Figure 3. Wideband Buffer In a printed circuit layout any signal trace, clock source trace or power supply trace should be at least 0.1 inches away from any inverting input pins Summing Input Pins Inverting Input Pins These are voltage input pins. If used, they should be driven with a source impedance below 5k. When they are not used, they should be tied to the analog ground pin. These pins are the inverting inputs of internal op amps and are susceptible to stray capacitive coupling from low impedance signal outputs and power supply lines. The summing pin connections determine the circuit topology (mode) of each 2nd order section. Please refer to Modes of Operation. BLOCK DIAGRAM HPA/NA (13) INV A (14) – AGND (7) + BPA (12) + – + + + + + LPC (25) BPC (26) + CLK (21) RB* V– (23) + NC (9) LPD (18) BPD (17) SC (24) + AGND (7) RA* NC (6) Σ – HPD/ND (16) – *THE RATIO RA/RB VARIES ±2% V+ (8) SB (5) + INV D (15) Σ LPB (4) – HPC/NC (27) – + BPB (3) SA (10) + INV C (28) + DEVICE RA RB LTC1068 LTC1068-200 10k 10k LTC1068-25 LTC1068-50 11.3k 8.6k – HPB/NB (2) INV B (1) Σ LPA (11) NC (20) NC (22) Σ + + – SD (19) PIN 28-LEAD SSOP PACKAGE 1068 BD 1068fc 11 LTC1068 Series MODES OF OPERATION Linear Technology’s universal switched-capacitor filters are designed for a fixed internal, nominal fCLK/fO ratio. The fCLK/fO ratio is 100 for the LTC1068, 200 for the LTC1068200, 50 for the LTC1068-50 and 25 for the LTC1068-25. Filter designs often require the fCLK/fO ratio of each section to be different from the nominal ratio and in most cases different from each other. Ratios other than the nominal value are possible with external resistors. Operating modes use external resistors, connected in different arrangements to realize different fCLK/fO ratios. By choosing the proper mode, the fCLK/fO ratio can be increased or decreased from the part’s nominal ratio. The choice of operating mode also effects the transfer function at the HP/N pins. The LP and BP pins always give the lowpass and bandpass transfer functions respectively, regardless of the mode utilized. The HP/N pins have a different transfer function depending on the mode used. Mode 1 yields a notch transfer function. Mode 3 yields a highpass transfer function. Mode 2 yields a highpass notch transfer function (i.e., a highpass with a stopband notch). More complex transfer functions, such as lowpass notch, allpass or complex zeros, are achieved by summing two or more of the LP, BP or HP/N outputs. This is illustrated in sections Mode 2n and Mode 3a. Choosing the proper mode(s) for a particular application is not trivial and involves much more than just adjusting the fCLK/fO ratio. Listed here are four of the nearly twenty modes available. To make the design process simpler and quicker, Linear Technology has developed the FilterCAD for Widows design software. FilterCAD is an easy-to-use, powerful and interactive filter design program. The designer can enter a few filter specifications and the program produces a full schematic. FilterCAD allows the designer to concentrate on the filter’s transfer function and not get bogged down in the details of the design. Alternatively, those who have experience with the Linear Technology family of parts can control all of the details themselves. For a complete listing of all the operating modes, consult the appendices of the FilterCAD manual or the Help files in FilterCAD. FilterCAD can be obtained free of charge on the Linear Technology web site (www.linear.com) or you can order the FilterCAD CD-ROM by contacting Linear Technology Marketing. Mode 1 In Mode 1, the ratio of the external clock frequency to the center frequency of each 2nd order section is internally fixed at the part’s nominal ratio. Figure 4 illustrates Mode 1 providing 2nd order notch, lowpass and bandpass outputs. Mode 1 can be used to make high order Butterworth lowpass filters; it can also be used to make low Q notches and for cascading 2nd order bandpass functions tuned at the same center frequency. Mode 1 is faster than Mode 3. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. CC R3 R2 VIN R1 – S + + AGND N Σ HOLP = HON LP – fCLK ;f =f RATIO n O R2 R3 R3 Q= ;H =– ;H =– R1 OBP R1 R2 ON fO = BP DEVICE RATIO LTC1068 100 LTC1068-200 200 LTC1068-50 50 LTC1068-25 25 1068 F04 Figure 4. Mode 1, 2nd Order Filter Providing Notch, Bandpassing and Lowpass Outputs Mode 1b Mode 1b is derived from Mode 1. In Mode 1b (Figure 5) two additional resistors R5 and R6 are added to lower the amount of voltage fed back from the lowpass output into the input of the SA (or SB) switched-capacitor summer. This allows the filter’s clock-to-center frequency ratio to be adjusted beyond the part’s nominal ratio. Mode 1b maintains the speed advantages of Mode 1 and should be considered an optimum mode for high Q designs with fCLK to fCUTOFF (or fCENTER) ratios greater than the part’s nominal ratio. The parallel combination of R5 and R6 should be kept below 5k. Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. 1068fc 12 LTC1068 Series MODES OF OPERATION CC CC R6 R4 R5 R3 R3 R2 R2 VIN R1 N – S + + Σ VIN – √ ( – ) – R3 √ R4 ; Q = 1.005 (R2) √ R4 (1 – (RATIO)(0.32)(R4) ) R3 R2 R3 HOHP = – R2 ; HOBP = – R1 R1 1068 F05 ( 1 1– R3 (RATIO)(0.32)(R4) 1068 F06 CC R4 R3 R2 VIN Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. R1 HPN – + + S Σ – DEVICE RATIO LTC1068 100 LTC1068-200 200 LTC1068-50 50 LTC1068-25 25 AGND fCLK RATIO fCLK √ 1 + R4 ; f = RATIO R3 1 Q = 1.005 ( ) 1 + R2 R2 √ R4 R3 1– ( (RATIO)(0.32)(R4) ) fO = HOHPN = – HOBP = – R2 n R2 (AC GAIN, f >> fO); HOHPN = – R2 R1 R1 R3 R1 ( 1068 F07 1 1 + R2 R4 ( 1 ; HOLP = – R2 R1 R3 1– (RATIO)(0.32)(R4) ) LP BP Mode 2 Please refer to the Operating Limits paragraph under Applications Information for a guide to the use of capacitor CC. ) ; HOLP = – R4 R1 Figure 6. Mode 3, 2nd Order Section Providing Highpass, Bandpass and Lowpass Outputs Mode 3 Mode 2 is a combination of Mode 1 and Mode 3, shown in Figure 7. With Mode 2, the clock-to-center frequency ratio, fCLK/fO, is always less than the part’s nominal ratio. The advantage of Mode 2 is that it provides less sensitivity to resistor tolerances than does Mode 3. Mode 2 has a highpass notch output where the notch frequency depends solely on the clock frequency and is therefore less than the center frequency, fO. 1 R2 DEVICE RATIO LTC1068 100 LTC1068-200 200 LTC1068-50 50 LTC1068-25 25 Figure 5. Mode 1b, 2nd Order Filter Providing Notch, Bandpass and Lowpass Outputs In Mode 3, the ratio of the external clock frequency to the center frequency of each 2nd order section can be adjusted above or below the parts nominal ratio. Figure 6 illustrates Mode 3, the classical state variable configuration, providing highpass, bandpass and lowpass 2nd order filter functions. Mode 3 is slower than Mode 1. Mode 3 can be used to make high order all-pole bandpass, lowpass and highpass filters. Σ LP BP 1/4 LTC1068 f fO = CLK RATIO AGND S + + f R6 ; f = f fO = CLK RATIO (R6 + R5) n O R3 R6 ; H = – R2 ; H Q = R3 =– R1 R1 OBP R2 (R6 + R5) ON R2 R6 + R5 HOLP = – R6 R1 √ R1 DEVICE RATIO LTC1068 100 LTC1068-200 200 LTC1068-50 50 LTC1068-25 25 AGND HP LP BP ) (DC GAIN) 1 1 + R2 R4 ( ) Figure 7. Mode 2, 2nd Order Filter Providing Highpass Notch, Bandpass and Lowpass Outputs 1068fc 13 LTC1068 Series APPLICATIONS INFORMATION Operating Limits The Maximum Q vs Center Frequency (fO) graphs, under Typical Performance Characteristics, define an upper limit of operating Q for each LTC1068 device 2nd order section. These graphs indicate the power supply, fO and Q value conditions under which a filter implemented with an LTC1068 device will remain stable when operated at temperatures of 70°C or less. For a 2nd order section, a bandpass gain error of 3dB or less is arbitrarily defined as a condition for stability. the operating signal-to-noise ratio. Most of its frequency contents lie within the filter passband and cannot be reduced with post filtering. For a notch filter the noise of the filter is centered at the notch frequency. The total wideband noise (µVRMS) is nearly independent of the value of the clock. The clock feedthrough specifications are not part of the wideband noise. For a specific filter design, the total noise depends on the Q of each section and the cascade sequence. Please refer to the Noise vs Q graphs under the Typical Performance Characteristics. When the passband gain error begins to exceed 1dB, the use of capacitor CC will reduce the gain error (capacitor CC is connected from the lowpass node to the inverting node of a 2nd order section). Please refer to Figures 4 through 7. The value of CC can be best determined experimentally, and as a guide it should be about 5pF for each 1dB of gain error and not to exceed 15pF. When operating an LTC1068 device near the limits defined by the Maximum Q vs Frequency graphs, passband gain variations of 2dB or more should be expected. Aliasing is an inherent phenomenon of switched-capacitor filters and occurs when the frequency of the input signals that produce the strongest aliased components have a frequency, fIN, such as (fSAMPLING – fIN) that falls into the filter’s passband. For an LTC1068 device the sampling frequency is twice fCLK. If the input signal spectrum is not band-limited, aliasing may occur. Clock Feedthrough Demonstration Circuit 104 Clock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter’s output pins. The clock feedthrough is tested with the filter’s input grounded and depends on PC board layout and on the value of the power supplies. With proper layout techniques, the typical values of clock feedthrough are listed under Electrical Characteristics. DC104 is a surface mount printed circuit board for the evaluation of Linear Technology’s LTC1068 product family in a 28-lead SSOP package. The LTC1068 product family consists of four monolithic clock-tunable filter building blocks. Any parasitic switching transients during the rising and falling edges of the incoming clock are not part of the clock feedthrough specifications. Switching transients have frequency contents much higher than the applied clock; their amplitude strongly depends on scope probing techniques as well as grounding and power supply bypassing. The clock feedthrough, can be greatly reduced by adding a simple RC lowpass network at the final filter output. This RC will completely eliminate any switching transients. Wideband Noise The wideband noise of the filter is the total RMS value of the device’s noise spectral density and is used to determine Aliasing Demo Board 104 is available in four assembled versions: Assembly 104-A features the low noise LTC1068CG (clockto-center frequency ratio = 100), assembly 104-B features the low noise LTC1068-200CG (clock-to-center frequency ratio = 200), assembly 104-C features the high frequency LTC1068-25CG (clock-to-center frequency ratio = 25) and assembly 104-D features the low power LTC1068-50CG (clock-to-center frequency ratio = 50). All DC104 boards are assembled with input, output and power supply test terminals, a 28-lead SSOP filter device (LTC1068CG Series), a dual op amp in an SO-8 for input or output buffers and decoupling capacitors for the filter and op amps. The filter and dual op amps share the power 1068fc 14 LTC1068 Series APPLICATIONS INFORMATION supply inputs to the board. Jumpers JPA to JPD on the board configure the filter’s second order circuit modes, jumper JP1 configures the filter for dual or single supply operation and jumpers JP2 (A-D) to JP3 (A-D) configure the op amp buffers as inverting or noninverting. Surface mount pads are available on the board for 1206 size sur- face mount resistors. The printed circuit layout of DC104 is arranged so that most of the resistor connections for one 8th order filter or two 4th order filters are available on the board. A resistor makes a connection between two filter nodes on the board and for most filter designs, no wiring is required. DC104 Component Side Silkscreen DC104 Component Side DC104 Solder Side 1068fc 15 E4 SGND E13 CLK E3 VIN1 E12 FGND E2 SGND VIN2 E1 E11 V– E10 SGND E9 V+ RI1 R12 C1 0.1µF 1 2 JPA ASSEMBLED AS NONINVERTING BUFFER DUAL SUPPLY INVERTING BUFFER DUAL SUPPLY NONINVERTING BUFFER SINGLE SUPPLY FOR NONINVERTING BUFFER SINGLE SUPPLY 3 RES SHORT RES SHORT OPEN OPEN OPEN OPEN SHORT OPEN SHORT OPEN SHORT OPEN SHORT RES SHORT RES R G1 RL3 15 16 17 18 19 20 21 22 SHORT JP2D RB3 INV D HPD/ND BPD LPD SD NC CLK NC 23 24 25 26 27 28 OPEN JP2C RH3 INV A HPA/NA BPA LPA SA U1 V– SC LPC BPC HPC/NC INV C OPEN U2A JP2B 14 13 12 11 NC V+ AGND NC SB LPB BPB HPB/NB INV B JP3A OPEN SHORT OPEN SHORT RH1 SHORT JP2A RL2 RB2 RH2 R23 R33 R43 10 9 8 7 6 5 4 3 R31 R41 2 1 R21 RB1 OPEN R G2 R51 RL1 BOLD LINE INDICATES FGND SHORT R53 C5 10µF CI1 R11 JPB FGND LPD R63 R61 2 1 FGND LPB 3 BUFFERS CONFIGURATION V+ V– SINGLE 3 SUPPLY 1 DUAL SUPPLY 2 JP1 V– C7 10µF 16V C6 10µF 16V R52 RH5 OPEN SHORT OPEN SHORT SHORT OPEN OPEN OPEN JP3C R24 R34 R44 R7 200Ω U2A JP3B R42 R32 R22 DC104 Schematic RL5 JPC R62 JP3D OPEN OPEN SHORT OPEN 2 4 3 2 1 V– 4 3 5 6 7 8 5 6 7 8 5 6 3 2 U2 LT1211 LT1211 LT1213 LT1498 U2B CO1 V– 4 8 V+ CO2 U2A U1 LTC1068CG LTC1068-200CG LTC1068-25CG LTC1068-50CG JP3D JP3C JP3B JP3A C2 0.1µF JP2D JP2C JP2B DEMO BOARD DC104B-A DC104B-B DC104B-C DC104B-D RL4 RB4 RH4 R64 JPD 3 LPD FGND 1 R54 2 3 LPC FGND 1 RB5 2 1 JP2A + – 16 + – V+ 7 1068 TA03 RG1 C4 0.1µF 1 C3 0.1µF RG2 E8 SGND E7 VOUT1 BUFFER 1 E6 SGND E5 VOUT2 BUFFER 2 LTC1068 Series APPLICATIONS INFORMATION 1068fc LTC1068 Series APPLICATIONS INFORMATION A Surface Mount Printed Circuit Layout A very compact surface mount printed circuit layout can be designed with 0603 size surface mount resistors, capacitors and a 28-pin SSOP of the LTC1068 product family. An example of a printed circuit layout is shown in the following figures for an 8th order elliptic bandpass filter. The total board area of this 8th order filter is 1" by 0.8". No attempt was made to design the smallest possible printed circuit layout. 70kHz Elliptic Bandpass Filtter, fCENTER = fCLK/25 (Maximum fCENTER is 80kHz, VS = ±5V) RH1 28k RL2 23.2k RH2 11.3k 1 VIN R11 29.4k R21 4.99k 2 R31 24.9k 3 R41 20.5k R51 4.99k R61 11.3k 5V C1 0.1µF 4 5 INV B INV C HPB/NB HPC/NC BPB BPC LPB LPC 28 27 R22 4.99k 26 R32 107k 25 24 U1 SC LTC1068-25 6 23 V– NC 7 22 NC AGND 8 + 21 CLK V 9 10 R43 43.2k 11 R33 59k 12 R23 4.99k 13 14 RL3 45.3K SB NC NC SA SD LPA LPD BPA BPD HPA/NA INV A HPD/ND INV D 20 19 18 17 16 15 R52 4.99k R62 56.2k –5V C2 0.1µF 1.75MHz R64 10k R54 4.99k R44 17.4k R34 63.4k R24 7.5k RH3 15.4k VOUT 1068 TA04 Gain vs Frequency FilterCAD Custom Inputs for fC = 70kHz 10 2nd ORDER SECTION f0 (kHz) Q fN (kHz) TYPE MODE B 67.7624 5.7236 58.3011 HPN 2b C 67.0851 20.5500 81.6810 LPN 1bn –20 81.0295 LPN 2n –30 BP 2b 73.9324 15.1339 73.3547 16.3491 GAIN (dB) A D 0 –10 –40 –50 –60 –70 –80 –90 20 30 40 50 60 70 80 FREQUENCY (kHz) 90 100 1068 TA05 1068fc 17 LTC1068 Series APPLICATIONS INFORMATION Surface Mount Components (Board Area = 1" × 0.8") RH1 R11 R21 R51 R22 R31 U1 R32 R41 R61 R62 C2 C1 R52 R64 R43 R44 R33 R34 R23 R54 R24 RH2 RL3 RL2 RH3 1068 TA06 Component Side Solder Side VIN RH1 R11 R51 R21 R22 R32 R52 R31 R61 GND R41 GND V– R62 R64 R43 R44 R33 R54 V+ R34 R23 RL3 RH2 RL2 R24 RH3 VOUT 1068 TA07 1068 TA08 1068fc 18 LTC1068 Series TYPICAL APPLICATIONS LTC1068-200 8th Order Linear Phase Lowpass, fCUTOFF = fCLK/400 for Ultralow Frequency Applications RL1 23.2k VIN R11 14.3k R21 12.4k 2 R31 10k 3 R41 15.4k 4 5 7 5V 8 0.1µF 9 10 R43 12.4k 11 R33 12.4k 12 R23 10k 13 14 RL3 23.2k INV C HPB/NB HPC/NC BPB BPC LPB LPC SB NC LTC1068-200 SC V– NC AGND V+ CLK NC NC SA SD LPA LPD BPA BPD HPA/NA INV A HPD/ND INV D 28 27 R22 15.4k 26 R32 10k 25 R52 5.11k Gain and Group Delay vs Frequency 10 0 R62 9.09k 24 –10 23 –5V 22 0.1µF 21 R64 9.09k 20 19 400kHz R54 5.11k 18 VOUT 17 R34 10k 16 R24 15.4k 1.0 0.9 GAIN 0.8 –20 0.7 –30 0.6 –40 –50 0.5 GROUP DELAY 0.4 –60 0.3 –70 0.2 –80 0.1 –90 0.1 1 FREQUENCY (Hz) 15 10 GROUP DELAY (SEC) 6 INV B GAIN (dB) 1 RL2 14.3k 0 1068 TA10 RB3 23.2k 1068 TA09 FilterCAD Custom Inputs for fC = 1Hz 2nd ORDER SECTION f0 (kHz) Q TYPE MODE B 1.7947 0.7347 QN LP 3 C 1.6002 0.5195 LP 1b A 1.7961 1.1369 LPBP 3s D 1.6070 0.5217 LP 1b 1.0159 1068fc 19 LTC1068 Series TYPICAL APPLICATIONS LTC1068-50 8th Order Linear Phase Lowpass, fCUTOFF = fCLK/50 for Single Supply Low Power Applications. Maximum fCUTOFF is 20kHz with a 3.3V Supply and 40kHz with a 5V Supply VIN R11 22.6k R31 10k 3 R41 22.6k 4 5 6 7 3.3V 8 0.1µF 9 10 1µF R43 48.7k 11 R33 12.7k 12 R23 10.7k 13 14 RL3 26.7k RB1 13.3k RH2 34k INV B INV C HPB/NB HPC/NC BPB BPC LPB SB NC LPC LTC1068-50 V – NC AGND V SC + CLK NC NC SA SD LPA LPD BPA BPD HPA/NA HPD/ND INV A INV D Gain and Group Delay vs Frequency 28 27 R22 43.2k 26 R32 43.2k 25 R42 196k 0 24 23 22 21 500kHz 20 19 R44 34.8k 17 R34 14.3k 16 R24 16.9k 140 GAIN –10 130 –20 120 –30 110 GROUP DELAY –40 100 –50 90 –60 80 –70 70 –80 18 150 10 10 FREQUENCY (kHz) 1 GROUP DELAY (µs) 2 RL2 9.09k GAIN (dB) 1 R21 20.5k RA1 56.2k 60 100 1068 TA12 15 RB3 24.9k VOUT 1068 TA11 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION f0 (kHz) Q B 9.5241 0.5248 C 11.0472 1.1258 A 11.0441 1.3392 D 6.9687 0.6082 fN (kHz) QN TYPE MODE 0.5248 AP 4a3 LPN 2n LPBP 2s LP 3 21.7724 1.5781 1068fc 20 LTC1068 Series TYPICAL APPLICATIONS LTC1068-25 8th Order Lowpass, fCUTOFF = fCLK/32, Attenuation –50dB at (1.25) (fCUTOFF) and –60dB at (1.5)(fCUTOFF). Maximum fCUTOFF = 120kHz RH1 18.2k RL1 26.7k RH2 36.5k VIN R21 10k 2 R31 10k 3 4 R61 2.21k R51 4.99k 5 6 7 8 5V 0.1µF R63 8.45k 9 10 R53 4.99k 11 R33 118k 12 R23 10k 13 14 RL3 20.5K INV B INV C HPB/NB HPC/NC BPB BPC LPB LPC SB NC LTC1068-25 SC V– NC AGND + V CLK NC NC SA SD LPA LPD BPA BPD HPA/NA HPD/ND INV A INV D Gain vs Frequency 28 27 R22 10k 26 R32 32.4k 10 0 25 24 –10 R52 4.99k –20 R62 5.9k 23 22 –5V 0.1µF 21 20 19 18 GAIN (dB) 1 R11 32.4k RL2 40.2k –60 R64 3.16k –70 R54 4.99k R34 15k 16 R24 10k –40 –50 3.2MHz 17 –30 –80 100 FREQUENCY (kHz) 20 500 1069 TA14 15 RH3 53.6k VOUT 1068 TA13 FilterCAD Custom Inputs for fC = 100kHz 2nd ORDER SECTION f0 (kHz) Q fN (kHz) TYPE MODE B 70.9153 0.5540 127.2678 LPN 1bn C 94.2154 2.3848 154.1187 LPN 1bn A 101.4936 9.3564 230.5192 LPN 1bn D 79.7030 0.9340 LP 1b 1068fc 21 LTC1068 Series TYPICAL APPLICATIONS LTC1068 8th Order Linear Phase Bandpass, fCENTER = fCLK/128, Passband –3dB at (0.88)(fCENTER) and (1.12)(fCENTER). Maximum fCENTER = 40kHz with ±5V Supplies RL1 63.4k RH1 7.5k R21 4.99k VIN R11 26.1k 2 R31 19.6k 3 R41 12.1k 4 5V 0.1µF HPB/NB HPC/NC BPB BPC LPB LPC 9 10 R23 4.99k 11 12 SA SD LPA LPD BPA BPD HPA/NA INV A 23 R22 4.99k 22 R32 21.5k HPD/ND INV D 10 0 –10 –20 21 20 SC 19 V– CLK R33 14.7k RL3 14.7k INV C LTC1068 5 SB 6 AGND 7 + V 8 R43 10.7k INV B Gain vs Frequency 24 GAIN(dB) 1 RB2 16.2k 18 R52 4.99k 1.28MHz 15 14 –40 –50 –60 –5V 0.1µF 17 16 R62 7.5k –30 –70 –80 –90 R64 17.8k 1 R54 4.99k R34 28.7k 10 FREQUENCY (kHz) 100 1068 TA16 VOUT R24 4.99k 13 RH3 40.2k 24-Lead Package 1068 TA15 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION f0 (kHz) Q fN (kHz) TYPE 4.4025 HPN 3a BP 1b LPN 3a BP 1b B 8.2199 2.6702 C 9.9188 3.3388 A 8.7411 2.1125 D 11.3122 5.0830 21.1672 MODE 1068fc 22 LTC1068 Series TYPICAL APPLICATIONS LTC1068 8th Order Linear Phase Bandpass, fCENTER = fCLK/100, Passband –3dB at (0.88)(fCENTER) and (1.12)(fCENTER). Maximum fCENTER = 50kHz with ±5V Supplies RL1 24.9k RB2 14.3k RH1 51.1k VIN R11 24.3k 2 R31 25.5k 3 R41 107k 4 5 0.1µF 8 R43 16.9k HPB/NB INV C HPC/NC BPB BPC LPB LPC SB SC 6 AGND 7 + V LTC1068 5V R63 2.32k INV B R53 4.99k 9 R33 17.4k 10 R23 7.32k 11 12 V– fCLK SA SD LPA LPD BPA BPD HPA/NA INV A HPD/ND INV D 24 0 23 R22 10k 22 R32 32.4k 21 R42 26.1k –10 –20 GAIN(dB) 1 R21 10k Gain vs Frequency 10 20 –40 –50 –60 19 18 –30 –5V 0.1µF –70 –80 1MHz –90 17 16 R44 12.1k 15 R34 19.1k 14 R24 10k 1 10 FREQUENCY (kHz) 100 1068 TA18 13 RB3 18.7k VOUT 24-Lead Package 1068 TA17 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION f0 (kHz) Q fN (kHz) TYPE MODE B 10.4569 2.6999 17.4706 LPN 2n C 11.7607 3.9841 BP 2 A 8.6632 2.1384 BP 2b D 9.0909 1.8356 BP 3 1068fc 23 LTC1068 Series TYPICAL APPLICATIONS LTC1068 8th Order Linear Phase Bandpass, fCENTER = fCLK/100, Passband –3dB at (0.7)(fCENTER) and (1.3)(fCENTER), Superior Sinewave Burst Response, Maximum fCENTER = 60kHz with ±5V Supplies RL1 348k RL2 10k RH1 11k R21 14.7k VIN 2 R31 10k R11 11k 3 R41 14.3k 4 INV B HPB/NB INV C HPC/NC BPB BPC LPB LPC 5 5V 0.1µF SB 6 AGND 7 + V LTC1068 8 R43 21.5k 9 R33 11.3k 10 R23 21k 11 12 SC SA SD LPA LPD BPA BPD HPA/NA HPD/ND INV A 23 R22 18.2k 22 R32 10k 21 R42 18.7k INV D 0 –10 –20 20 19 V– fCLK Gain vs Frequency 10 24 GAIN(dB) 1 RH2 200k 18 –30 –40 –50 –60 –5V 0.1µF –70 –80 1MHz 17 –90 16 R44 10k 15 R34 17.8k 14 R24 15.4k 10 FREQUENCY (kHz) 1 100 1068 TA20 13 RH3 95.3k VOUT 24-Lead Package RL3 12.4k 1068 TA19 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION f0 (kHz) Q fN (kHz) B 10.1389 0.7087 C 9.8654 A D QN TYPE MODE 1.7779 HPN 3a 0.5540 44.7214 LPN 3a 9.8830 0.5434 27.7227 LPN 3a 12.4097 1.5264 BP 3 1068fc 24 LTC1068 Series TYPICAL APPLICATIONS LTC1068-50 8th Order Linear Phase Bandpass, fCENTER = fCLK/40, Passband –3dB at (0.8)(fCENTER) and (1.2)(fCENTER) for Single Supply Low Power Applications. Maximum fCENTER = 25kHz with a Single 5V Supply RH1 18.2k RL2 17.8k RH2 84.5k VIN R11 36.5k R21 10k 2 R31 30.1k 3 R41 10.7k 4 R61 1.74k R51 4.99k 5 6 7 5V 8 1µF 0.1µF 9 10 R43 12.1k 11 R33 26.7k 12 R23 10k 13 14 RL3 15.8K INV B INV C HPB/NB HPC/NC BPB BPC LPB LPC SB NC LTC1068-50 SC V– NC AGND V+ CLK NC NC SA SD LPA LPD BPA BPD HPA/NA HPD/ND INV A INV D Gain vs Frequency 28 27 R22 11.3k 10 26 R32 29.4k 0 25 R42 10k –10 –20 24 GAIN (dB) 1 23 22 21 –30 –40 –50 400kHz –60 20 –70 19 18 R44 22.1k 17 R34 28k 16 R24 10k –80 2 4 6 8 10 12 14 16 18 20 22 24 26 28 FREQUENCY (kHz) 1068 TA22 15 RH3 47.5k VOUT 1068 TA21 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION f0 (kHz) Q fN (kHz) TYPE MODE B 8.7384 4.0091 4.0678 HPN 2b C 11.6756 4.6752 19.1786 LPN 2n A 10.8117 4.2066 16.0127 LPN 2n D 9.6415 3.6831 BP 2 1068fc 25 LTC1068 Series TYPICAL APPLICATIONS LTC1068-25 8th Order Order Bandpass, fCENTER = fCLK/32, Passband –3dB at (0.965)(fCENTER) and (1.35)(fCENTER). Maximum fCENTER = 80kHz with ±5V Supplies RH1 118k VIN R11 121k R31 97.6k 2 3 4 R61 8.87k R51 4.99k 5 6 7 8 5V 0.1µF R63 6.49k 9 10 R53 4.99k 11 R33 124k 12 R23 4.99k 13 14 RL3 78.7K INV B HPB/NB INV C HPC/NC BPB BPC LPB LPC SB SC NC LTC1068-25 V– NC AGND V+ CLK NC NC SA SD LPA LPD BPA HPA/NA INV A BPD HPD/ND INV D 28 27 Gain vs Frequency R22 4.99k 10 R32 130k 26 0 25 24 R52 4.99k –10 R62 9.53k 23 22 –5V 0.1µF 21 20 19 18 GAIN (dB) 1 R21 4.99k RB2 47.5k 320kHz 16 R24 4.99k –40 –60 R54 4.99k 17 –30 –50 R64 6.98k R34 102k –20 –70 7.5 8 8.5 9 9.5 10 10.5 11 11.5 12 12.5 FREQUENCY (kHz) 1068 TA24 15 VOUT 1068 TA23 FilterCAD Custom Inputs for fC = 10kHz 2nd ORDER SECTION f0 (kHz) Q TYPE MODE B 10.2398 15.6469 BP 1b C 10.3699 21.1060 BP 1b A 9.6241 18.6841 LP 1b D 9.7744 15.6092 LP 1b 1068fc 26 LTC1068 Series TYPICAL APPLICATIONS LTC1068-200 8th Order Highpass, fCENTER = fCLK/200, Attenuation –60dB at (0.6)(fCENTER). Maximum fCUTOFF = 20kHz with ±5V Supplies RH1 11.8k RL1 66.5k RH2 20.5k VIN R21 10k 2 R31 16.5k 3 R41 11.3k 4 5 5V R63 2.55k 0.1µF R53 R43 20.5k 4.99k R33 36.5k R23 10k INV B INV C HPB/NB HPB/NC BPB BPC LPB LPC 27 R22 21.5k 26 R32 10.2k 0 25 R42 18.7k –10 10 11 12 13 14 10 –20 24 SC LTC1068-200 – 23 6 V NC 7 22 NC AGND 8 + 21 CLK V 9 Gain vs Frequency 28 SB NC NC SA SD LPA LPD BPA BPD HPA/NA INV A HPD INV D GAIN (dB) 1 R11 18.2k RL2 249k –5V 0.1µF –30 –40 –50 200kHz 20 –60 19 –70 –80 0.2 18 R44 21k 17 R34 14.3k 16 R24 20.5k 1 FREQUENCY (kHz) 10 1068 TA26 15 RH3 10k VOUT C23 [1/(2π • R23 • C23) = (160)(fCUTOFF)] 1068 TA25 FilterCAD Custom Inputs for fC = 1kHz 2nd ORDER SECTION f0 (kHz) Q fN (kHz) TYPE MODE B 0.9407 1.5964 0.4212 HPN 3a C 1.0723 0.5156 0.2869 HPN 3a A 0.9088 3.4293 0.5815 HPN 2b D 0.9880 0.7001 0.0000 HP 3 1068fc 27 LTC1068 Series PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. G Package 28-Lead Plastic SSOP (5.3mm) (Reference LTC DWG # 05-08-1640) 9.90 – 10.50* (.390 – .413) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1.25 ±0.12 7.8 – 8.2 5.3 – 5.7 0.42 ±0.03 7.40 – 8.20 (.291 – .323) 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 RECOMMENDED SOLDER PAD LAYOUT 2.0 (.079) MAX 5.00 – 5.60** (.197 – .221) 0° – 8° 0.09 – 0.25 (.0035 – .010) 0.65 (.0256) BSC 0.55 – 0.95 (.022 – .037) 0.05 (.002) MIN 0.22 – 0.38 (.009 – .015) TYP NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) G28 SSOP 0204 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE N Package 24-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510 Rev I) 1.280* (32.512) MAX 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 .255 ±.015* (6.477 ±0.381) .300 – .325 (7.620 – 8.255) .130 ±.005 (3.302 ±0.127) .045 – .065 (1.143 – 1.651) .020 (0.508) MIN .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 8.255 +0.889 –0.381 ) .120 (3.048) MIN .065 (1.651) TYP N24 REV I 0711 .100 (2.54) BSC .018 ±.003 (0.457 ±0.076) NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 1068fc 28 LTC1068 Series REVISION HISTORY (Revision history begins at Rev C) REV DATE DESCRIPTION PAGE NUMBER C 10/12 Correction to Electrical Characteristics table to identify characteristics of LTC1068-50 5 1068fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 29 LTC1068 Series TYPICAL APPLICATION LTC1068-200 8th Order Notch, fNOTCH = fCLK/256, f – 3dB at (0.9) (fNOTCH) and (1.05)(fNOTCH), Attenuation at fNOTCH Greater Than 70dB for fNOTCH in the Frequency Range 200Hz to 5kHz C22 470pF RH1 5.11k VIN R11 51.1k C21 470pF 1 R21 5.11k 2 R31 51.1k 3 RH2 5.11k R41 100k 4 R51 5.11k R61 8.06k 5 6 7 8 5V 0.1µF R63 8.06k 9 10 R43 178k R53 5.11k 11 12 R33 124k R23 10k 13 14 C23 470pF INV B INV C HPB/NB HPB/NC BPB BPC LPB LPC SB SC NC LTC1068-200 V– NC AGND V+ CLK NC NC SA SD LPA LPD BPA BPD HPA/NA HPD INV A INV D 28 27 R22 6.34k 26 R32 84.3k 25 RL2 66.5k R62 5.76k R52 5.11k 24 23 –5V 0.1µF 22 21 fCLK = (256)(fNOTCH) 20 R64 7.87k 19 R54 5.11k 18 17 R34 75k 16 R24 7.32k RG 15k 15 RH4 5.11k RH3 5.11k – RL4 475k + LT1354 VOUT 1068 TA27 Gain vs Frequency 10 0 –10 GAIN (dB) –20 –30 –40 –50 –60 –70 –80 –90 0.8 1.0 1.1 1.2 0.9 RELATIVE FREQUENCY (fIN/fNOTCH) 1068 TA28 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1064 Universal Filter, Quad 2nd Order 50:1 and 100:1 Clock-to-fO Ratios, fO to 100kHz, VS = Up to ± 7.5V LTC1067/LTC1067-50 Low Power, Dual 2nd Order Rail-to-Rail, VS = 3V to ±5V LTC1164 Low Power Universal Filter, Quad 2nd Order 50:1 and 100:1 Clock-to-fO Ratios, fO to 20kHz, VS = Up to ±7.5V LTC1264 High Speed Universal Filter, Quad 2nd Order 20:1 Clock-to-fO Ratio, fO to 200kHz, VS = Up to ±7.5V 1068fc 30 Linear Technology Corporation LT 1012 REV C • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 1996