SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 FEATURES • • • • • • • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V One Buffered Inverter With Schmitt-Trigger Input and Two Unbuffered Inverters Integrated Solution for Oscillator Applications Suitable for Commonly Used Clock Frequencies: – 15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz, 25 MHz, 26 MHz, 27 MHz, 28 MHz Control Input to Disable the Oscillator Circuit DCT PACKAGE (TOP VIEW) XIN 3 6 GND 4 5 Y 1 8 XOUT 2 7 • • • • Low Power Consumption (10-µA Max ICC) in Standby State ±24-mA Output Drive at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) YEP OR YZP PACKAGE (BOTTOM VIEW) DCU PACKAGE (TOP VIEW) CTRL XOUT XIN OSCOUT GND A CTRL • VCC 1 2 3 8 7 6 4 5 VCC OSCOUT A Y GND XIN XOUT CTRL 4 5 3 6 2 7 1 8 Y A OSCOUT VCC See mechanical drawings for dimensions. DESCRIPTION/ORDERING INFORMATION This device consists of one inverter with a Schmitt-trigger input and two unbuffered inverters. It is designed for 1.65-V to 5.5-V VCC operation. ORDERING INFORMATION PACKAGE (1) TA ORDERABLE PART NUMBER NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YEP –40°C to 85°C (1) (2) TOP-SIDE MARKING (2) SN74LVC1404YEPR NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) Tape and reel _ _ _44_ SSOP – DCT Tape and reel SN74LVC1404DCTR CA4_ _ _ VSSOP – DCU Tape and reel SN74LVC1404DCUR CA4_ SN74LVC1404YZPR Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2005, Texas Instruments Incorporated SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) XIN and XOUT pins can be connected to a crystal or resonator in oscillator applications. The device provides an additional unbuffered inverter (OSCOUT) and a Schmitt-trigger input inverter for signal conditioning (see Figure 3). The control (CTRL) input disables the oscillator circuit to reduce power consumption. The oscillator circuit is disabled and the XOUT output is set to low level when CTRL is low. To ensure the oscillator circuit remains disabled during power up or power down, CTRL should be connected to GND through a pulldown resistor. The minimum value of the resistor is determined by the current-sourcing capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. FUNCTION TABLES INPUTS OUTPUTS CTRL XIN XOUT H L H OSCOUT L H H L H L X L H INPUT A OUTPUT Y L H H L LOGIC DIAGRAM (POSITIVE LOGIC) CTRL XIN XOUT A 2 1 3 7 OSCOUT 2 6 5 Y SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX –0.5 6.5 V XIN, A, CTRL inputs –0.5 6.5 V Voltage range applied to any output in the high-impedance or power-off state (2) Y output –0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) (3) XOUT, OSCOUT –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA VCC Supply voltage range VI Input voltage range (2) VO Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range DCT package 220 DCU package 227 YEP/YZP package (1) (2) (3) (4) UNIT °C/W 102 –65 °C 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) Operating MIN MAX 1.65 5.5 UNIT VCC Supply voltage VI Input voltage (XIN, CTRL, A inputs) 0 5.5 V VO Output voltage (XOUT, OSCOUT, Y outputs) 0 VCC V Data retention only 1.5 VCC = 1.65 V –4 VCC = 2.3 V IOH High-level output current (OSCOUT, XOUT, Y outputs) –8 –16 VCC = 3 V Low-level output current (OSCOUT, XOUT, Y outputs) IOL (2) Low-level output current (XOUT) ∆t/∆v Input transition rise/fall time (CTRL input) TA Operating free-air temperature –32 VCC = 1.65 V 4 VCC = 2.3 V 8 16 VCC = 3 V (2) mA 24 VCC = 4.5 V 32 VCC = 1.65 V 2 VCC = 1.8 V ± 0.15 V 20 VCC = 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 VCC = 5 V ± 0.5 V (1) mA –24 VCC = 4.5 V IOL V mA ns/V 5 –40 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. CTRL = Low, XIN = GND 3 SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VT+ Positivegoing threshold VT– Negativegoing threshold ∆VT hysteresis (VT+ – VT– ) TEST CONDITIONS A input A input A input IOH = –100 µA VOH (2) VOL (2) 1.5 1.87 2.16 2.74 5.5 V 2.61 3.33 1.65 V 0.39 0.62 2.3 V 0.58 0.87 3V 0.84 1.14 4.5 V 1.41 1.79 5.5 V 1.87 2.29 1.65 V 0.37 0.62 2.3 V 0.48 0.77 3V 0.56 0.87 4.5 V 0.71 1.04 5.5 V 0.71 1.11 3V 2.4 IOH = –24 mA 3V 2.3 IOH = –32 mA 4.5 V 3.8 IOL = 100 µA 1.65 V to 5.5 V 0.1 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL = 16 mA 3V 0.4 IOL = 24 mA 3V 0.55 IOL = 32 mA 4.5 V 0.55 IOL = 100 µA 1.65 V to 5.5 V 0.1 1.65 V 0.65 IOL = 2 mA CTRL = Low, XIN = GND VI = VCC or GND, One input at VCC – 0.6 V, Other inputs at VCC or GND VI = VCC or GND IO = 0 UNIT V V V VCC – 0.1 IOH = –16 mA VI or VO = 0 to 5.5 V 4 3V 4.5 V 1.9 VI = 5.5 V or GND (1) (2) 1.56 1.2 Y output XIN 1.11 2.3 V All inputs CTRL and A inputs 2.3 V IOH = –8 mA Ioff Ci 1.16 1.65 V II CTRL and A inputs 0.79 1.65 V to 5.5 V XOUT ∆ICC MAX 1.65 V IOH = –4 mA VOL ICC MIN TYP (1) VCC V V V 0 to 5.5 V ±5 µA 0 ±10 µA 1.65 V to 5.5 V 10 µA 3 V to 5.5 V 500 µA 3.3 V 3.5 6 All typical values are at VCC = 3.3 V, TA = 25°C. VIL = 0 V and VIH = VCC for XOUT and OSCOUT; the standard VT+ and VT– levels should be applied for the Y output. pF SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 Switching Characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) A tpd XIN CTRL TO (OUTPUT) VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX Y 2.8 15.1 1.6 5.7 1.5 4.6 0.9 4.4 XOUT 1.7 9.6 1 3.2 1.1 2.4 0.9 1.8 OSCOUT 2.6 17.2 2 5.6 2 4.1 1.5 3.2 3 28.2 1.8 14.4 1.5 12.2 1.1 10.2 XOUT UNIT ns Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) A tpd XIN CTRL TO (OUTPUT) VCC = 1.8 V ± 0.15 V Y VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V MIN MAX MIN MAX MIN MAX VCC = 5 V ± 0.5 V MIN MAX 3 17.3 1.8 7.4 1.8 6.4 1 5.3 XOUT 1.2 15.8 0.8 5.8 1 5.4 0.6 4.6 OSCOUT 3.5 25.7 2.6 7.1 2.8 7.8 2 6.7 XOUT 3.3 24.5 2.1 12 1.9 12.7 1.1 11.2 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP f = 10 MHz 25 26 29 39 UNIT pF 5 SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns RL (Except tPZ) VM VLOAD CL VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MΩ 1 MΩ 1 MΩ 1 MΩ RL (tPZ) V∆ 1 kΩ 1 kΩ 1 kΩ 1 kΩ 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input tw VM 0V VI Input VM tsu VM VI 0V Data Input VM VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM VM 0V tPLH VOH Output VM VOL tPHL VM VM 0V tPLZ VLOAD/2 VM tPZH VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VM Output Waveform 1 S1 at VLOAD (see Note B) tPLH VOH Output VI Output Control tPZL tPHL VM VM 0V VOLTAGE WAVEFORMS PULSE DURATION Input th VOL + V∆ VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VM VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL VM 0V VLOAD/2 VM tPZH VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VM tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VOH Output VM tPZL tPHL VM VI Output Control VOL + V∆ VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VM VOH - V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 2. Load Circuit and Voltage Waveforms 7 SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 APPLICATION INFORMATION Figure 3 shows a typical application of the SN74LVC1404 in a Pierce oscillator circuit. The output voltage can be conditioned further by connecting OSCOUT to the Schmitt-trigger input inverter. The Schmitt-trigger input inverter produces a rail-to-rail voltage waveform. The recommended load for the crystal, shown in this example, is 16 pF. The value of the recommended load (CL) can be found in the crystal manufacturer's data sheet. Values of C1 and C 1C 2 CL C 1 C 2 and C ≈ C . R is the current-limiting resistor, and the value depends on the C2 are chosen so that 1 2 s maximum power dissipation of the crystal. Generally, the recommended value of Rs is specified in the crystal manufacturer's data sheet and, usually, this value is approximately equal to the reactance of C2 at resonance Rs XC 2 . R is the feedback resistor that is used to bias the inverter in the linear region of frequency, i.e., F operation. Usually, the value is chosen to be within 1 MΩ to 10 MΩ. CTRL(1) XOUT OSCOUT XIN CLOAD RF ≅ 2.2 MΩ CL ≅ 16 pF RLOAD Rs ≅ 1 kΩ Optional Signal-Conditioning Stage Y C1 ≅ 32 pF C2 ≅ 32 pF A CLOAD RLOAD A) Logic Diagram View (1) CTRL should be tied to logic high during normal operation of the oscillator circuit. To disable the oscillator circuit, connect CTRL to logic low. Figure 3. Oscillator Circuit 8 SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 APPLICATION INFORMATION CTRL(1) Rs ≅ 1 kΩ XOUT 1 8 VCC 2 7 OSCOUT CLOAD RLOAD RF ≅ 2.2 MΩ CL ≅ 16 pF C2 ≅ 32 pF XIN 3 6 C1 ≅ 32 pF GND A Optional Signal-Conditioning Stage 5 4 Y CLOAD RLOAD B) Oscillator Circuit in DCT or DCU Pinout (1) CTRL should be tied to logic high during normal operation of the oscillator circuit. To disable the oscillator circuit, connect CTRL to logic low. Practical Design Tips • • • • The open-loop gain of the unbuffered inverter decreases as power-supply voltage decreases. This decreases the closed-loop gain of the oscillator circuit. The value of Rs can be decreased to increase the closed-loop gain, while maintaining the power dissipation of the crystal within the maximum limit. Rs and C2 form a low-pass filter and reduce spurious oscillations. Component values can be adjusted, based on the desired cutoff frequency. C2 can be increased over C1 to increase the phase shift and help in start-up of the oscillator. Increasing C2 may affect the duty cycle of the output voltage. At high frequency, phase shift due to Rs becomes significant. In this case, Rs can be replaced by a capacitor to reduce the phase shift. 9 SN74LVC1404 OSCILLATOR DRIVER FOR CRYSTAL OSCILLATOR OR CERAMIC RESONATOR www.ti.com SCES469C – AUGUST 2003 – REVISED JULY 2005 APPLICATION INFORMATION Testing After the selection of proper component values, the oscillator circuit should be tested, using these components, to ensure that the oscillator circuit shows required performance over the recommended operating conditions. • Without a crystal, the oscillator circuit should not oscillate. To check this, the crystal can be replaced by its equivalent parallel-resonant resistance. • When the power-supply voltage drops, the closed-loop gain of the oscillator circuit reduces. Ensure that the circuit oscillates at the appropriate frequency at the lowest VCC and highest VCC. • Ensure that the duty cycle, start-up time, and frequency drift over time is within the system requirements. 10 PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC1404DCTR ACTIVE SM8 DCT 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74LVC1404DCUR ACTIVE US8 DCU 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74LVC1404DCURE4 ACTIVE US8 DCU 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM SN74LVC1404YEPR ACTIVE WCSP YEP 8 3000 TBD SNPB Level-1-260C-UNLIM SN74LVC1404YZPR ACTIVE WCSP YZP 8 3000 Pb-Free (RoHS) SNAGCU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDS049B – MAY 1999 – REVISED OCTOBER 2002 DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 8 0,13 M 5 0,15 NOM ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ 2,90 2,70 4,25 3,75 Gage Plane PIN 1 INDEX AREA 1 0,25 4 0° – 8° 3,15 2,75 0,60 0,20 1,30 MAX Seating Plane 0,10 0,10 0,00 NOTES: A. B. C. D. 4188781/C 09/02 All linear dimensions are in millimeters. This drawing is subject to change without notice. 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