SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
D
D
D
D
D
D
D
D
D, DB, DW, OR PW PACKAGE
(TOP VIEW)
Operate With 3-V to 5.5-V VCC Supply
Operate Up To 1 Mbit/s
Low Supply Current . . . 300 µA Typ
External Capacitors . . . 4 × 0.1 µF
Accept 5-V Logic Input With 3.3-V Supply
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
RS-232 Bus-Pin ESD Protection Exceeds
±15 kV Using Human-Body Model (HBM)
Applications
− Battery-Powered Systems, PDAs,
Notebooks, Laptops, Palmtop PCs, and
Hand-Held Equipment
C1+
V+
C1−
C2+
C2−
V−
DOUT2
RIN2
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
GND
DOUT1
RIN1
ROUT1
DIN1
DIN2
ROUT2
description/ordering information
The SN65C3232 and SN75C3232 consist of two line drivers, two line receivers, and a dual charge-pump circuit
with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). These devices provide the
electrical interface between an asynchronous communication controller and the serial-port connector. The
charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The devices
operate at data signaling rates up to 1 Mbit/s and a driver output slew rate of 24 V/µs to 150 V/µs.
ORDERING INFORMATION
SOIC − D
−40°C
−40
C to 85
85°C
C
SOIC − DW
SSOP − DB
TSSOP − PW
SOIC − D
0°C
0
C to 70
70°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOIC − DW
SSOP − DB
TSSOP − PW
Tube of 40
SN65C3232D
Reel of 2500
SN65C3232DR
Tube of 40
SN65C3232DW
Reel of 2000
SN65C3232DWR
Reel of 2000
SN65C3232DBR
Tube of 90
SN65C3232PW
Reel of 2000
SN65C3232PWR
Tube of 40
SN75C3232D
Reel of 2500
SN75C3232DR
Tube of 40
SN75C3232DW
Reel of 2000
SN75C3232DWR
Reel of 2000
SN75C3232DBR
Tube of 90
SN75C3232PW
Reel of 2000
SN75C3232PWR
TOP-SIDE
MARKING
65C3232
65C3232
65C3232
CB3232
75C3232
75C3232
75C3232
CA3232
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2004, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#'
+&%#$ %! # $('%%"#$ (' #,' #'!$ '-"$ $#&!'#$
$#"+"+ .""#/ +&%# (%'$$0 +'$ # '%'$$"*/ %*&+'
#'$#0 "** (""!'#'$
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
Function Tables
EACH DRIVER
INPUT
DIN
OUTPUT
DOUT
L
H
H
L
H = high level, L = low
level
EACH RECEIVER
INPUT
RIN
OUTPUT
ROUT
L
H
H
L
Open
H
H = high level, L = low
level, Open = input
disconnected or
connected driver off
logic diagram (positive logic)
11
14
DIN1
DOUT1
10
7
DIN2
DOUT2
12
13
ROUT1
RIN1
9
ROUT2
2
POST OFFICE BOX 655303
8
RIN2
• DALLAS, TEXAS 75265
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Positive output supply voltage range, V+ (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V
Negative output supply voltage range, V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to −7 V
Supply voltage difference, V+ − V− (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 V
Input voltage range, VI: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 V to 25 V
Output voltage range, VO: Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −13.2 V to 13.2 V
Receivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4 and Figure 4)
Supply voltage
VIH
Driver high-level input voltage
VIL
Driver low-level input voltage
VCC = 5 V
DIN
Driver input voltage
DIN
VI
Receiver input voltage
TA
Operating free-air temperature
DIN
VCC = 3.3 V
VCC = 5 V
VCC = 3.3 V
MIN
NOM
MAX
3
3.3
3.6
4.5
5
5.5
UNIT
V
2
V
2.4
0.8
0
5.5
−25
25
SN65C3232
−40
85
SN75C3232
0
70
V
V
°C
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER
TEST CONDITIONS
ICC
MIN
TYP‡
Supply current
No load,
VCC = 3.3 V or 5 V
0.3
‡ All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MAX
1
UNIT
mA
3
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER
TEST CONDITIONS
MIN
TYP†
VOH
VOL
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
5.4
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
−5
−5.4
IIH
IIL
High-level input current
VI = VCC
VI at GND
IOS‡
Low-level input current
Short-circuit output current
MAX
±0.01
VCC = 3.6 V,
VCC = 5.5 V,
VO = 0 V
VO = 0 V
UNIT
V
V
±1
µA
±0.01
±1
µA
±35
±60
±35
±90
mA
ro
Output resistance
VCC, V+, and V− = 0 V,
VO = ±2 V
300
10M
W
† All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
‡ Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output
should be shorted at a time.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER
Maximum data rate
(see Figure 1)
TEST CONDITIONS
RL = 3 kΩ,
kΩ
One DOUT switching
MIN
CL = 1000 pF
CL = 250 pF,
CL = 1000 pF,
TYP†
VCC = 3 V to 4.5 V
VCC = 4.5 V to 5.5 V
tsk(p)
Pulse skew§
CL = 150 pF to 2500
pF
RL = 3 kΩ to 7 kΩ,
See Figure 2
SR(tr)
Slew rate,
transition region
(see Figure 1)
RL = 3 kΩ to 7 kΩ,
VCC = 3.3 V
CL = 150 pF to 1000 pF
1000
POST OFFICE BOX 655303
UNIT
kbit/s
1000
300
18
† All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
§ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
4
MAX
250
• DALLAS, TEXAS 75265
ns
150
V/µs
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER
VOH
VOL
MIN
TYP†
VCC − 0.6 V
VCC − 0.1 V
TEST CONDITIONS
High-level output voltage
IOH = −1 mA
IOL = 1.6 mA
Low-level output voltage
VIT+
Positive-going input threshold voltage
VCC = 3.3 V
VCC = 5 V
VIT−
Negative-going input threshold voltage
VCC = 3.3 V
VCC = 5 V
Vhys
ri
Input hysteresis (VIT+ − VIT−)
MAX
UNIT
V
0.4
1.5
2.4
1.8
2.4
0.6
1.2
0.8
1.5
V
V
V
0.3
V
VI = ±3 V to ±25 V
3
5
† All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
Input resistance
7
kW
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 3)
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low- to high-level output
tsk(p)
Pulse skew‡
CL= 150 pF
Propagation delay time, high- to low-level output
MIN
TYP†
MAX
UNIT
300
ns
300
ns
300
ns
† All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
‡ Pulse skew is defined as |tPLH − tPHL| of each channel of the same device.
NOTE 4: Test conditions are C1−C4 = 0.1 µF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 µF, C2−C4 = 0.33 µF at VCC = 5 V ± 0.5 V.
PARAMETER MEASUREMENT INFORMATION
3V
Input
Generator
(see Note B)
1.5 V
RS-232
Output
50 Ω
RL
1.5 V
0V
tTHL
CL
(see Note A)
Output
tTLH
3V
−3 V
TEST CIRCUIT
SR(tr) +
t
THL
6V
or t
3V
−3 V
VOH
VOL
VOLTAGE WAVEFORMS
TLH
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 1. Driver Slew Rate
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
3V
Generator
(see Note B)
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPHL
tPLH
VOH
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 2. Driver Pulse Skew
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
50 Ω
tPHL
CL
(see Note A)
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 3. Receiver Propagation Delay Times
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLLS540B − JULY 2002 − REVISED NOVEMBER 2004
APPLICATION INFORMATION
1
+
C1
−
2
†+
C3
−
3
4
C1+
VCC 16
V+
GND
15
14
DOUT1
C1−
13
C2+
+
C2
+ CBYPASS = 0.1 µF
−
RIN1
5 kΩ
−
5 C2−
12
6
C4
DOUT2
RIN2
−
V−
11
ROUT1
DIN1
+
7
10
8
9
DIN2
ROUT2
5 kΩ
† C3 can be connected to VCC or GND.
VCC vs CAPACITOR VALUES
VCC
C1
C2, C3, C4
3.3 V ± 0.3 V
5 V ± 0.5 V
3 V to 5.5 V
0.1 µF
0.047 µF
0.1 µF
0.1 µF
0.33 µF
0.47 µF
Figure 4. Typical Operating Circuit and Capacitor Values
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN65C3232D
ACTIVE
SOIC
D
16
SN65C3232DBR
ACTIVE
SSOP
DB
SN65C3232DBRE4
ACTIVE
SSOP
SN65C3232DE4
ACTIVE
SN65C3232DR
40
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
16
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232DRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232DW
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232DWE4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232DWR
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232DWRE4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232PW
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232PWE4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232PWR
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN65C3232PWRE4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232D
ACTIVE
SOIC
D
16
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DBR
ACTIVE
SSOP
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DBRE4
ACTIVE
SSOP
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DE4
ACTIVE
SOIC
D
16
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DW
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DWE4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DWR
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232DWRE4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75C3232PW
ACTIVE
TSSOP
PW
16
CU NIPDAU
Level-1-260C-UNLIM
40
40
40
90
Addendum-Page 1
Green (RoHS &
no Sb/Br)
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN75C3232PWE4
ACTIVE
TSSOP
PW
16
SN75C3232PWR
ACTIVE
TSSOP
PW
SN75C3232PWRE4
ACTIVE
TSSOP
PW
90
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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• DALLAS, TEXAS 75265
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